![]() |
MAX32690 Peripheral Driver API
Peripheral Driver API for the MAX32690
|
Macros | |
| #define | MXC_F_CAN_NBT_NBRP_POS 0 |
| #define | MXC_F_CAN_NBT_NBRP ((uint32_t)(0x3FFUL << MXC_F_CAN_NBT_NBRP_POS)) |
| #define | MXC_F_CAN_NBT_NSEG1_POS 10 |
| #define | MXC_F_CAN_NBT_NSEG1 ((uint32_t)(0xFFUL << MXC_F_CAN_NBT_NSEG1_POS)) |
| #define | MXC_F_CAN_NBT_NSEG2_POS 18 |
| #define | MXC_F_CAN_NBT_NSEG2 ((uint32_t)(0x7FUL << MXC_F_CAN_NBT_NSEG2_POS)) |
| #define | MXC_F_CAN_NBT_NSJW_POS 25 |
| #define | MXC_F_CAN_NBT_NSJW ((uint32_t)(0x7FUL << MXC_F_CAN_NBT_NSJW_POS)) |
Nominal Bit Timing Register.
| #define MXC_F_CAN_NBT_NBRP ((uint32_t)(0x3FFUL << MXC_F_CAN_NBT_NBRP_POS)) |
NBT_NBRP Mask
| #define MXC_F_CAN_NBT_NBRP_POS 0 |
NBT_NBRP Position
| #define MXC_F_CAN_NBT_NSEG1 ((uint32_t)(0xFFUL << MXC_F_CAN_NBT_NSEG1_POS)) |
NBT_NSEG1 Mask
| #define MXC_F_CAN_NBT_NSEG1_POS 10 |
NBT_NSEG1 Position
| #define MXC_F_CAN_NBT_NSEG2 ((uint32_t)(0x7FUL << MXC_F_CAN_NBT_NSEG2_POS)) |
NBT_NSEG2 Mask
| #define MXC_F_CAN_NBT_NSEG2_POS 18 |
NBT_NSEG2 Position
| #define MXC_F_CAN_NBT_NSJW ((uint32_t)(0x7FUL << MXC_F_CAN_NBT_NSJW_POS)) |
NBT_NSJW Mask
| #define MXC_F_CAN_NBT_NSJW_POS 25 |
NBT_NSJW Position