Macros
#define	MXC_R_FCR_FCTRL0 ((uint32_t)0x00000000UL)

#define	MXC_R_FCR_AUTOCAL0 ((uint32_t)0x00000004UL)

#define	MXC_R_FCR_AUTOCAL1 ((uint32_t)0x00000008UL)

#define	MXC_R_FCR_AUTOCAL2 ((uint32_t)0x0000000CUL)

#define	MXC_R_FCR_URVBOOTADDR ((uint32_t)0x00000010UL)

#define	MXC_R_FCR_URVCTRL ((uint32_t)0x00000014UL)

#define	MXC_R_FCR_XO32MKS ((uint32_t)0x00000018UL)

#define	MXC_R_FCR_SARBUFCN ((uint32_t)0x0000001CUL)

#define	MXC_R_FCR_TS0 ((uint32_t)0x00000020UL)

#define	MXC_R_FCR_TS1 ((uint32_t)0x00000024UL)

#define	MXC_R_FCR_ADCREFTRIM0 ((uint32_t)0x00000028UL)

#define	MXC_R_FCR_ADCREFTRIM1 ((uint32_t)0x0000002CUL)

#define	MXC_R_FCR_ADCREFTRIM2 ((uint32_t)0x00000030UL)

Detailed Description

FCR Peripheral Register Offsets from the FCR Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_FCR_ADCREFTRIM0

#define MXC_R_FCR_ADCREFTRIM0 ((uint32_t)0x00000028UL)

Offset from FCR Base Address: 0x0028

◆ MXC_R_FCR_ADCREFTRIM1

#define MXC_R_FCR_ADCREFTRIM1 ((uint32_t)0x0000002CUL)

Offset from FCR Base Address: 0x002C

◆ MXC_R_FCR_ADCREFTRIM2

#define MXC_R_FCR_ADCREFTRIM2 ((uint32_t)0x00000030UL)

Offset from FCR Base Address: 0x0030

◆ MXC_R_FCR_AUTOCAL0

#define MXC_R_FCR_AUTOCAL0 ((uint32_t)0x00000004UL)

Offset from FCR Base Address: 0x0004

◆ MXC_R_FCR_AUTOCAL1

#define MXC_R_FCR_AUTOCAL1 ((uint32_t)0x00000008UL)

Offset from FCR Base Address: 0x0008

◆ MXC_R_FCR_AUTOCAL2

#define MXC_R_FCR_AUTOCAL2 ((uint32_t)0x0000000CUL)

Offset from FCR Base Address: 0x000C

◆ MXC_R_FCR_FCTRL0

#define MXC_R_FCR_FCTRL0 ((uint32_t)0x00000000UL)

Offset from FCR Base Address: 0x0000

◆ MXC_R_FCR_SARBUFCN

#define MXC_R_FCR_SARBUFCN ((uint32_t)0x0000001CUL)

Offset from FCR Base Address: 0x001C

◆ MXC_R_FCR_TS0

#define MXC_R_FCR_TS0 ((uint32_t)0x00000020UL)

Offset from FCR Base Address: 0x0020

◆ MXC_R_FCR_TS1

#define MXC_R_FCR_TS1 ((uint32_t)0x00000024UL)

Offset from FCR Base Address: 0x0024

◆ MXC_R_FCR_URVBOOTADDR

#define MXC_R_FCR_URVBOOTADDR ((uint32_t)0x00000010UL)

Offset from FCR Base Address: 0x0010

◆ MXC_R_FCR_URVCTRL

#define MXC_R_FCR_URVCTRL ((uint32_t)0x00000014UL)

Offset from FCR Base Address: 0x0014

◆ MXC_R_FCR_XO32MKS

#define MXC_R_FCR_XO32MKS ((uint32_t)0x00000018UL)

Offset from FCR Base Address: 0x0018

Macros