Register Offsets

Macros
#define	MXC_R_SPIXFC_CTRL0   ((uint32_t)0x00000000UL)
#define	MXC_R_SPIXFC_SSPOL   ((uint32_t)0x00000004UL)
#define	MXC_R_SPIXFC_CTRL1   ((uint32_t)0x00000008UL)
#define	MXC_R_SPIXFC_CTRL2   ((uint32_t)0x0000000CUL)
#define	MXC_R_SPIXFC_CTRL3   ((uint32_t)0x00000010UL)
#define	MXC_R_SPIXFC_INTFL   ((uint32_t)0x00000014UL)
#define	MXC_R_SPIXFC_INTEN   ((uint32_t)0x00000018UL)
#define	MXC_R_SPIXFC_SIMPLE_HEADER   ((uint32_t)0x0000001CUL)

Detailed Description

SPIXFC Peripheral Register Offsets from the SPIXFC Base Peripheral Address.

Macro Definition Documentation

MXC_R_SPIXFC_CTRL0

#define MXC_R_SPIXFC_CTRL0   ((uint32_t)0x00000000UL)

Offset from SPIXFC Base Address: 0x0000

MXC_R_SPIXFC_CTRL1

#define MXC_R_SPIXFC_CTRL1   ((uint32_t)0x00000008UL)

Offset from SPIXFC Base Address: 0x0008

MXC_R_SPIXFC_CTRL2

#define MXC_R_SPIXFC_CTRL2   ((uint32_t)0x0000000CUL)

Offset from SPIXFC Base Address: 0x000C

MXC_R_SPIXFC_CTRL3

#define MXC_R_SPIXFC_CTRL3   ((uint32_t)0x00000010UL)

Offset from SPIXFC Base Address: 0x0010

MXC_R_SPIXFC_INTEN

#define MXC_R_SPIXFC_INTEN   ((uint32_t)0x00000018UL)

Offset from SPIXFC Base Address: 0x0018

MXC_R_SPIXFC_INTFL

#define MXC_R_SPIXFC_INTFL   ((uint32_t)0x00000014UL)

Offset from SPIXFC Base Address: 0x0014

MXC_R_SPIXFC_SIMPLE_HEADER

#define MXC_R_SPIXFC_SIMPLE_HEADER   ((uint32_t)0x0000001CUL)

Offset from SPIXFC Base Address: 0x001C

MXC_R_SPIXFC_SSPOL

#define MXC_R_SPIXFC_SSPOL   ((uint32_t)0x00000004UL)

Offset from SPIXFC Base Address: 0x0004