![]() |
MAX32690 Peripheral Driver API
Peripheral Driver API for the MAX32690
|
Modules | |
| Register Offsets | |
| FLC_ADDR | |
| FLC_CLKDIV | |
| FLC_CTRL | |
| FLC_INTR | |
| FLC_DATA | |
| FLC_ACTRL | |
| FLC_WELR0 | |
| FLC_RLR0 | |
| FLC_WELR1 | |
| FLC_RLR1 | |
| FLC_WELR2 | |
| FLC_RLR2 | |
| FLC_WELR3 | |
| FLC_RLR3 | |
| FLC_WELR4 | |
| FLC_RLR4 | |
| FLC_WELR5 | |
| FLC_RLR5 | |
Files | |
| file | flc_regs.h |
Data Structures | |
| struct | mxc_flc_regs_t |
Registers, Bit Masks and Bit Positions for the FLC Peripheral Module.
Flash Memory Control.
| struct mxc_flc_regs_t |
Structure type to access the FLC Registers.
Data Fields | |
| __IO uint32_t | addr |
| __IO uint32_t | clkdiv |
| __IO uint32_t | ctrl |
| __IO uint32_t | intr |
| __IO uint32_t | data [4] |
| __O uint32_t | actrl |
| __IO uint32_t | welr0 |
| __IO uint32_t | rlr0 |
| __IO uint32_t | welr1 |
| __IO uint32_t | rlr1 |
| __IO uint32_t | welr2 |
| __IO uint32_t | rlr2 |
| __IO uint32_t | welr3 |
| __IO uint32_t | rlr3 |
| __IO uint32_t | welr4 |
| __IO uint32_t | rlr4 |
| __IO uint32_t | welr5 |
| __IO uint32_t | rlr5 |
| __O uint32_t actrl |
0x40: FLC ACTRL Register
| __IO uint32_t addr |
0x00: FLC ADDR Register
| __IO uint32_t clkdiv |
0x04: FLC CLKDIV Register
| __IO uint32_t ctrl |
0x08: FLC CTRL Register
| __IO uint32_t data[4] |
0x30: FLC DATA Register
| __IO uint32_t intr |
0x024: FLC INTR Register
| __IO uint32_t rlr0 |
0x84: FLC RLR0 Register
| __IO uint32_t rlr1 |
0x8C: FLC RLR1 Register
| __IO uint32_t rlr2 |
0x94: FLC RLR2 Register
| __IO uint32_t rlr3 |
0x9C: FLC RLR3 Register
| __IO uint32_t rlr4 |
0xA4: FLC RLR4 Register
| __IO uint32_t rlr5 |
0xAC: FLC RLR5 Register
| __IO uint32_t welr0 |
0x80: FLC WELR0 Register
| __IO uint32_t welr1 |
0x88: FLC WELR1 Register
| __IO uint32_t welr2 |
0x90: FLC WELR2 Register
| __IO uint32_t welr3 |
0x98: FLC WELR3 Register
| __IO uint32_t welr4 |
0xA0: FLC WELR4 Register
| __IO uint32_t welr5 |
0xA8: FLC WELR5 Register