|
#define | MXC_R_SPIXFM_CTRL ((uint32_t)0x00000000UL) |
|
#define | MXC_R_SPIXFM_FETCHCTRL ((uint32_t)0x00000004UL) |
|
#define | MXC_R_SPIXFM_MODECTRL ((uint32_t)0x00000008UL) |
|
#define | MXC_R_SPIXFM_MODEDATA ((uint32_t)0x0000000CUL) |
|
#define | MXC_R_SPIXFM_FBCTRL ((uint32_t)0x00000010UL) |
|
#define | MXC_R_SPIXFM_IOCTRL ((uint32_t)0x0000001CUL) |
|
#define | MXC_R_SPIXFM_MEMSECCTRL ((uint32_t)0x00000020UL) |
|
#define | MXC_R_SPIXFM_BUSIDLE ((uint32_t)0x00000024UL) |
|
#define | MXC_R_SPIXFM_AUTHOFFSET ((uint32_t)0x00000028UL) |
|
#define | MXC_F_SPIXFM_CTRL_MODE_POS 0 |
|
#define | MXC_F_SPIXFM_CTRL_MODE ((uint32_t)(0x3UL << MXC_F_SPIXFM_CTRL_MODE_POS)) |
|
#define | MXC_V_SPIXFM_CTRL_MODE_SCLK_HI_SAMPLE_RISING ((uint32_t)0x0UL) |
|
#define | MXC_S_SPIXFM_CTRL_MODE_SCLK_HI_SAMPLE_RISING (MXC_V_SPIXFM_CTRL_MODE_SCLK_HI_SAMPLE_RISING << MXC_F_SPIXFM_CTRL_MODE_POS) |
|
#define | MXC_V_SPIXFM_CTRL_MODE_SCLK_LO_SAMPLE_FAILLING ((uint32_t)0x3UL) |
|
#define | MXC_S_SPIXFM_CTRL_MODE_SCLK_LO_SAMPLE_FAILLING (MXC_V_SPIXFM_CTRL_MODE_SCLK_LO_SAMPLE_FAILLING << MXC_F_SPIXFM_CTRL_MODE_POS) |
|
#define | MXC_F_SPIXFM_CTRL_SSPOL_POS 2 |
|
#define | MXC_F_SPIXFM_CTRL_SSPOL ((uint32_t)(0x1UL << MXC_F_SPIXFM_CTRL_SSPOL_POS)) |
|
#define | MXC_F_SPIXFM_CTRL_SSEL_POS 4 |
|
#define | MXC_F_SPIXFM_CTRL_SSEL ((uint32_t)(0x7UL << MXC_F_SPIXFM_CTRL_SSEL_POS)) |
|
#define | MXC_F_SPIXFM_CTRL_LOCLK_POS 8 |
|
#define | MXC_F_SPIXFM_CTRL_LOCLK ((uint32_t)(0xFUL << MXC_F_SPIXFM_CTRL_LOCLK_POS)) |
|
#define | MXC_F_SPIXFM_CTRL_HICLK_POS 12 |
|
#define | MXC_F_SPIXFM_CTRL_HICLK ((uint32_t)(0xFUL << MXC_F_SPIXFM_CTRL_HICLK_POS)) |
|
#define | MXC_F_SPIXFM_CTRL_SSACT_POS 16 |
|
#define | MXC_F_SPIXFM_CTRL_SSACT ((uint32_t)(0x3UL << MXC_F_SPIXFM_CTRL_SSACT_POS)) |
|
#define | MXC_V_SPIXFM_CTRL_SSACT_OFF ((uint32_t)0x0UL) |
|
#define | MXC_S_SPIXFM_CTRL_SSACT_OFF (MXC_V_SPIXFM_CTRL_SSACT_OFF << MXC_F_SPIXFM_CTRL_SSACT_POS) |
|
#define | MXC_V_SPIXFM_CTRL_SSACT_FOR_2_MOD_CLK ((uint32_t)0x1UL) |
|
#define | MXC_S_SPIXFM_CTRL_SSACT_FOR_2_MOD_CLK (MXC_V_SPIXFM_CTRL_SSACT_FOR_2_MOD_CLK << MXC_F_SPIXFM_CTRL_SSACT_POS) |
|
#define | MXC_V_SPIXFM_CTRL_SSACT_FOR_4_MOD_CLK ((uint32_t)0x2UL) |
|
#define | MXC_S_SPIXFM_CTRL_SSACT_FOR_4_MOD_CLK (MXC_V_SPIXFM_CTRL_SSACT_FOR_4_MOD_CLK << MXC_F_SPIXFM_CTRL_SSACT_POS) |
|
#define | MXC_V_SPIXFM_CTRL_SSACT_FOR_8_MOD_CLK ((uint32_t)0x3UL) |
|
#define | MXC_S_SPIXFM_CTRL_SSACT_FOR_8_MOD_CLK (MXC_V_SPIXFM_CTRL_SSACT_FOR_8_MOD_CLK << MXC_F_SPIXFM_CTRL_SSACT_POS) |
|
#define | MXC_F_SPIXFM_CTRL_SSIACT_POS 18 |
|
#define | MXC_F_SPIXFM_CTRL_SSIACT ((uint32_t)(0x3UL << MXC_F_SPIXFM_CTRL_SSIACT_POS)) |
|
#define | MXC_V_SPIXFM_CTRL_SSIACT_FOR_1_MOD_CLK ((uint32_t)0x0UL) |
|
#define | MXC_S_SPIXFM_CTRL_SSIACT_FOR_1_MOD_CLK (MXC_V_SPIXFM_CTRL_SSIACT_FOR_1_MOD_CLK << MXC_F_SPIXFM_CTRL_SSIACT_POS) |
|
#define | MXC_V_SPIXFM_CTRL_SSIACT_FOR_3_MOD_CLK ((uint32_t)0x1UL) |
|
#define | MXC_S_SPIXFM_CTRL_SSIACT_FOR_3_MOD_CLK (MXC_V_SPIXFM_CTRL_SSIACT_FOR_3_MOD_CLK << MXC_F_SPIXFM_CTRL_SSIACT_POS) |
|
#define | MXC_V_SPIXFM_CTRL_SSIACT_FOR_5_MOD_CLK ((uint32_t)0x2UL) |
|
#define | MXC_S_SPIXFM_CTRL_SSIACT_FOR_5_MOD_CLK (MXC_V_SPIXFM_CTRL_SSIACT_FOR_5_MOD_CLK << MXC_F_SPIXFM_CTRL_SSIACT_POS) |
|
#define | MXC_V_SPIXFM_CTRL_SSIACT_FOR_9_MOD_CLK ((uint32_t)0x3UL) |
|
#define | MXC_S_SPIXFM_CTRL_SSIACT_FOR_9_MOD_CLK (MXC_V_SPIXFM_CTRL_SSIACT_FOR_9_MOD_CLK << MXC_F_SPIXFM_CTRL_SSIACT_POS) |
|
#define | MXC_F_SPIXFM_FETCHCTRL_CMDVAL_POS 0 |
|
#define | MXC_F_SPIXFM_FETCHCTRL_CMDVAL ((uint32_t)(0xFFUL << MXC_F_SPIXFM_FETCHCTRL_CMDVAL_POS)) |
|
#define | MXC_F_SPIXFM_FETCHCTRL_CMDWTH_POS 8 |
|
#define | MXC_F_SPIXFM_FETCHCTRL_CMDWTH ((uint32_t)(0x3UL << MXC_F_SPIXFM_FETCHCTRL_CMDWTH_POS)) |
|
#define | MXC_V_SPIXFM_FETCHCTRL_CMDWTH_SINGLE ((uint32_t)0x0UL) |
|
#define | MXC_S_SPIXFM_FETCHCTRL_CMDWTH_SINGLE (MXC_V_SPIXFM_FETCHCTRL_CMDWTH_SINGLE << MXC_F_SPIXFM_FETCHCTRL_CMDWTH_POS) |
|
#define | MXC_V_SPIXFM_FETCHCTRL_CMDWTH_DUAL_IO ((uint32_t)0x1UL) |
|
#define | MXC_S_SPIXFM_FETCHCTRL_CMDWTH_DUAL_IO (MXC_V_SPIXFM_FETCHCTRL_CMDWTH_DUAL_IO << MXC_F_SPIXFM_FETCHCTRL_CMDWTH_POS) |
|
#define | MXC_V_SPIXFM_FETCHCTRL_CMDWTH_QUAD_IO ((uint32_t)0x2UL) |
|
#define | MXC_S_SPIXFM_FETCHCTRL_CMDWTH_QUAD_IO (MXC_V_SPIXFM_FETCHCTRL_CMDWTH_QUAD_IO << MXC_F_SPIXFM_FETCHCTRL_CMDWTH_POS) |
|
#define | MXC_V_SPIXFM_FETCHCTRL_CMDWTH_INVALID ((uint32_t)0x3UL) |
|
#define | MXC_S_SPIXFM_FETCHCTRL_CMDWTH_INVALID (MXC_V_SPIXFM_FETCHCTRL_CMDWTH_INVALID << MXC_F_SPIXFM_FETCHCTRL_CMDWTH_POS) |
|
#define | MXC_F_SPIXFM_FETCHCTRL_ADDR_WIDTH_POS 10 |
|
#define | MXC_F_SPIXFM_FETCHCTRL_ADDR_WIDTH ((uint32_t)(0x3UL << MXC_F_SPIXFM_FETCHCTRL_ADDR_WIDTH_POS)) |
|
#define | MXC_V_SPIXFM_FETCHCTRL_ADDR_WIDTH_SINGLE ((uint32_t)0x0UL) |
|
#define | MXC_S_SPIXFM_FETCHCTRL_ADDR_WIDTH_SINGLE (MXC_V_SPIXFM_FETCHCTRL_ADDR_WIDTH_SINGLE << MXC_F_SPIXFM_FETCHCTRL_ADDR_WIDTH_POS) |
|
#define | MXC_V_SPIXFM_FETCHCTRL_ADDR_WIDTH_DUAL_IO ((uint32_t)0x1UL) |
|
#define | MXC_S_SPIXFM_FETCHCTRL_ADDR_WIDTH_DUAL_IO (MXC_V_SPIXFM_FETCHCTRL_ADDR_WIDTH_DUAL_IO << MXC_F_SPIXFM_FETCHCTRL_ADDR_WIDTH_POS) |
|
#define | MXC_V_SPIXFM_FETCHCTRL_ADDR_WIDTH_QUAD_IO ((uint32_t)0x2UL) |
|
#define | MXC_S_SPIXFM_FETCHCTRL_ADDR_WIDTH_QUAD_IO (MXC_V_SPIXFM_FETCHCTRL_ADDR_WIDTH_QUAD_IO << MXC_F_SPIXFM_FETCHCTRL_ADDR_WIDTH_POS) |
|
#define | MXC_V_SPIXFM_FETCHCTRL_ADDR_WIDTH_INVALID ((uint32_t)0x3UL) |
|
#define | MXC_S_SPIXFM_FETCHCTRL_ADDR_WIDTH_INVALID (MXC_V_SPIXFM_FETCHCTRL_ADDR_WIDTH_INVALID << MXC_F_SPIXFM_FETCHCTRL_ADDR_WIDTH_POS) |
|
#define | MXC_F_SPIXFM_FETCHCTRL_DATA_WIDTH_POS 12 |
|
#define | MXC_F_SPIXFM_FETCHCTRL_DATA_WIDTH ((uint32_t)(0x3UL << MXC_F_SPIXFM_FETCHCTRL_DATA_WIDTH_POS)) |
|
#define | MXC_V_SPIXFM_FETCHCTRL_DATA_WIDTH_SINGLE ((uint32_t)0x0UL) |
|
#define | MXC_S_SPIXFM_FETCHCTRL_DATA_WIDTH_SINGLE (MXC_V_SPIXFM_FETCHCTRL_DATA_WIDTH_SINGLE << MXC_F_SPIXFM_FETCHCTRL_DATA_WIDTH_POS) |
|
#define | MXC_V_SPIXFM_FETCHCTRL_DATA_WIDTH_DUAL_IO ((uint32_t)0x1UL) |
|
#define | MXC_S_SPIXFM_FETCHCTRL_DATA_WIDTH_DUAL_IO (MXC_V_SPIXFM_FETCHCTRL_DATA_WIDTH_DUAL_IO << MXC_F_SPIXFM_FETCHCTRL_DATA_WIDTH_POS) |
|
#define | MXC_V_SPIXFM_FETCHCTRL_DATA_WIDTH_QUAD_IO ((uint32_t)0x2UL) |
|
#define | MXC_S_SPIXFM_FETCHCTRL_DATA_WIDTH_QUAD_IO (MXC_V_SPIXFM_FETCHCTRL_DATA_WIDTH_QUAD_IO << MXC_F_SPIXFM_FETCHCTRL_DATA_WIDTH_POS) |
|
#define | MXC_V_SPIXFM_FETCHCTRL_DATA_WIDTH_INVALID ((uint32_t)0x3UL) |
|
#define | MXC_S_SPIXFM_FETCHCTRL_DATA_WIDTH_INVALID (MXC_V_SPIXFM_FETCHCTRL_DATA_WIDTH_INVALID << MXC_F_SPIXFM_FETCHCTRL_DATA_WIDTH_POS) |
|
#define | MXC_F_SPIXFM_FETCHCTRL_4BADDR_POS 16 |
|
#define | MXC_F_SPIXFM_FETCHCTRL_4BADDR ((uint32_t)(0x1UL << MXC_F_SPIXFM_FETCHCTRL_4BADDR_POS)) |
|
#define | MXC_F_SPIXFM_MODECTRL_MDCLK_POS 0 |
|
#define | MXC_F_SPIXFM_MODECTRL_MDCLK ((uint32_t)(0xFUL << MXC_F_SPIXFM_MODECTRL_MDCLK_POS)) |
|
#define | MXC_F_SPIXFM_MODECTRL_NOCMD_POS 8 |
|
#define | MXC_F_SPIXFM_MODECTRL_NOCMD ((uint32_t)(0x1UL << MXC_F_SPIXFM_MODECTRL_NOCMD_POS)) |
|
#define | MXC_F_SPIXFM_MODECTRL_EXIT_NOCMD_POS 9 |
|
#define | MXC_F_SPIXFM_MODECTRL_EXIT_NOCMD ((uint32_t)(0x1UL << MXC_F_SPIXFM_MODECTRL_EXIT_NOCMD_POS)) |
|
#define | MXC_F_SPIXFM_MODEDATA_MDDATA_POS 0 |
|
#define | MXC_F_SPIXFM_MODEDATA_MDDATA ((uint32_t)(0xFFFFUL << MXC_F_SPIXFM_MODEDATA_MDDATA_POS)) |
|
#define | MXC_F_SPIXFM_MODEDATA_MDOUT_EN_POS 16 |
|
#define | MXC_F_SPIXFM_MODEDATA_MDOUT_EN ((uint32_t)(0xFFFFUL << MXC_F_SPIXFM_MODEDATA_MDOUT_EN_POS)) |
|
#define | MXC_F_SPIXFM_FBCTRL_FB_EN_POS 0 |
|
#define | MXC_F_SPIXFM_FBCTRL_FB_EN ((uint32_t)(0x1UL << MXC_F_SPIXFM_FBCTRL_FB_EN_POS)) |
|
#define | MXC_F_SPIXFM_FBCTRL_INVERT_POS 1 |
|
#define | MXC_F_SPIXFM_FBCTRL_INVERT ((uint32_t)(0x1UL << MXC_F_SPIXFM_FBCTRL_INVERT_POS)) |
|
#define | MXC_F_SPIXFM_IOCTRL_SCLK_DS_POS 0 |
|
#define | MXC_F_SPIXFM_IOCTRL_SCLK_DS ((uint32_t)(0x1UL << MXC_F_SPIXFM_IOCTRL_SCLK_DS_POS)) |
|
#define | MXC_F_SPIXFM_IOCTRL_SS_DS_POS 1 |
|
#define | MXC_F_SPIXFM_IOCTRL_SS_DS ((uint32_t)(0x1UL << MXC_F_SPIXFM_IOCTRL_SS_DS_POS)) |
|
#define | MXC_F_SPIXFM_IOCTRL_SDIO_DS_POS 2 |
|
#define | MXC_F_SPIXFM_IOCTRL_SDIO_DS ((uint32_t)(0x1UL << MXC_F_SPIXFM_IOCTRL_SDIO_DS_POS)) |
|
#define | MXC_F_SPIXFM_IOCTRL_PADCTRL_POS 3 |
|
#define | MXC_F_SPIXFM_IOCTRL_PADCTRL ((uint32_t)(0x3UL << MXC_F_SPIXFM_IOCTRL_PADCTRL_POS)) |
|
#define | MXC_V_SPIXFM_IOCTRL_PADCTRL_TRI_STATE ((uint32_t)0x0UL) |
|
#define | MXC_S_SPIXFM_IOCTRL_PADCTRL_TRI_STATE (MXC_V_SPIXFM_IOCTRL_PADCTRL_TRI_STATE << MXC_F_SPIXFM_IOCTRL_PADCTRL_POS) |
|
#define | MXC_V_SPIXFM_IOCTRL_PADCTRL_PULL_UP ((uint32_t)0x1UL) |
|
#define | MXC_S_SPIXFM_IOCTRL_PADCTRL_PULL_UP (MXC_V_SPIXFM_IOCTRL_PADCTRL_PULL_UP << MXC_F_SPIXFM_IOCTRL_PADCTRL_POS) |
|
#define | MXC_V_SPIXFM_IOCTRL_PADCTRL_PULL_DOWN ((uint32_t)0x2UL) |
|
#define | MXC_S_SPIXFM_IOCTRL_PADCTRL_PULL_DOWN (MXC_V_SPIXFM_IOCTRL_PADCTRL_PULL_DOWN << MXC_F_SPIXFM_IOCTRL_PADCTRL_POS) |
|
#define | MXC_F_SPIXFM_MEMSECCTRL_DEC_EN_POS 0 |
|
#define | MXC_F_SPIXFM_MEMSECCTRL_DEC_EN ((uint32_t)(0x1UL << MXC_F_SPIXFM_MEMSECCTRL_DEC_EN_POS)) |
|
#define | MXC_F_SPIXFM_MEMSECCTRL_AUTH_DISABLE_POS 1 |
|
#define | MXC_F_SPIXFM_MEMSECCTRL_AUTH_DISABLE ((uint32_t)(0x1UL << MXC_F_SPIXFM_MEMSECCTRL_AUTH_DISABLE_POS)) |
|
#define | MXC_F_SPIXFM_MEMSECCTRL_CNTOPT_EN_POS 2 |
|
#define | MXC_F_SPIXFM_MEMSECCTRL_CNTOPT_EN ((uint32_t)(0x1UL << MXC_F_SPIXFM_MEMSECCTRL_CNTOPT_EN_POS)) |
|
#define | MXC_F_SPIXFM_MEMSECCTRL_INTERL_DIS_POS 3 |
|
#define | MXC_F_SPIXFM_MEMSECCTRL_INTERL_DIS ((uint32_t)(0x1UL << MXC_F_SPIXFM_MEMSECCTRL_INTERL_DIS_POS)) |
|
#define | MXC_F_SPIXFM_MEMSECCTRL_AUTHERR_FL_POS 4 |
|
#define | MXC_F_SPIXFM_MEMSECCTRL_AUTHERR_FL ((uint32_t)(0x1UL << MXC_F_SPIXFM_MEMSECCTRL_AUTHERR_FL_POS)) |
|
#define | MXC_F_SPIXFM_BUSIDLE_BUSIDLE_POS 0 |
|
#define | MXC_F_SPIXFM_BUSIDLE_BUSIDLE ((uint32_t)(0xFFFFUL << MXC_F_SPIXFM_BUSIDLE_BUSIDLE_POS)) |
|