PTG_INTFL

Macros
#define	MXC_F_PTG_INTFL_PT0_POS   0
#define	MXC_F_PTG_INTFL_PT0   ((uint32_t)(0x1UL << MXC_F_PTG_INTFL_PT0_POS))
#define	MXC_F_PTG_INTFL_PT1_POS   1
#define	MXC_F_PTG_INTFL_PT1   ((uint32_t)(0x1UL << MXC_F_PTG_INTFL_PT1_POS))
#define	MXC_F_PTG_INTFL_PT2_POS   2
#define	MXC_F_PTG_INTFL_PT2   ((uint32_t)(0x1UL << MXC_F_PTG_INTFL_PT2_POS))
#define	MXC_F_PTG_INTFL_PT3_POS   3
#define	MXC_F_PTG_INTFL_PT3   ((uint32_t)(0x1UL << MXC_F_PTG_INTFL_PT3_POS))

Detailed Description

Pulse Train Interrupt Flags.

Macro Definition Documentation

MXC_F_PTG_INTFL_PT0

#define MXC_F_PTG_INTFL_PT0   ((uint32_t)(0x1UL << MXC_F_PTG_INTFL_PT0_POS))

INTFL_PT0 Mask

MXC_F_PTG_INTFL_PT0_POS

#define MXC_F_PTG_INTFL_PT0_POS   0

INTFL_PT0 Position

MXC_F_PTG_INTFL_PT1

#define MXC_F_PTG_INTFL_PT1   ((uint32_t)(0x1UL << MXC_F_PTG_INTFL_PT1_POS))

INTFL_PT1 Mask

MXC_F_PTG_INTFL_PT1_POS

#define MXC_F_PTG_INTFL_PT1_POS   1

INTFL_PT1 Position

MXC_F_PTG_INTFL_PT2

#define MXC_F_PTG_INTFL_PT2   ((uint32_t)(0x1UL << MXC_F_PTG_INTFL_PT2_POS))

INTFL_PT2 Mask

MXC_F_PTG_INTFL_PT2_POS

#define MXC_F_PTG_INTFL_PT2_POS   2

INTFL_PT2 Position

MXC_F_PTG_INTFL_PT3

#define MXC_F_PTG_INTFL_PT3   ((uint32_t)(0x1UL << MXC_F_PTG_INTFL_PT3_POS))

INTFL_PT3 Mask

MXC_F_PTG_INTFL_PT3_POS

#define MXC_F_PTG_INTFL_PT3_POS   3

INTFL_PT3 Position