csi2.h

 
/******************************************************************************
 *
 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
 * Analog Devices, Inc.),
 * Copyright (C) 2023-2024 Analog Devices, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 ******************************************************************************/
 
/* Define to prevent redundant inclusion */
#ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX78002_CSI2_H_
#define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX78002_CSI2_H_
 
/* **** Includes **** */
#include <stdbool.h>
#include "csi2_regs.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* **** Definitions **** */
 
typedef struct _mxc_csi2_req_t mxc_csi2_req_t;
 
typedef enum {
    MXC_CSI2_PPI_NO_INVERT, 
    MXC_CSI2_PPI_INVERT, 
} mxc_csi2_ppi_clk_t;
 
typedef enum {
    MXC_CSI2_PL0_DISABLE_ALL = 0xFFFFFFFF, 
    MXC_CSI2_PL0_NULL = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_NULL, 
    MXC_CSI2_PL0_BLANK = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_BLANK, 
    MXC_CSI2_PL0_EMBEDDED = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_EMBEDDED, 
    MXC_CSI2_PL0_YUV420_8BIT = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_YUV420_8BIT, 
    MXC_CSI2_PL0_YUV420_10BIT =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_YUV420_10BIT, 
    MXC_CSI2_PL0_LEG_YUV420_8BIT =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_YUV420_8BIT_LEG, 
    MXC_CSI2_PL0_YUV422_8BIT_CSP =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_YUV420_8BIT_CSP, 
    MXC_CSI2_PL0_YUV422_10BIT_CSP =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_YUV420_10BIT_CSP, 
    MXC_CSI2_PL0_YUV422_8BIT = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_YUV422_8BIT, 
    MXC_CSI2_PL0_YUV422_10BIT =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_YUV422_10BIT, 
    MXC_CSI2_PL0_RGB444 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RGB444, 
    MXC_CSI2_PL0_RGB555 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RGB555, 
    MXC_CSI2_PL0_RGB565 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RGB565, 
    MXC_CSI2_PL0_RGB666 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RGB666, 
    MXC_CSI2_PL0_RGB888 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RGB888, 
    MXC_CSI2_PL0_RAW6 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RAW6, 
    MXC_CSI2_PL0_RAW7 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RAW7, 
    MXC_CSI2_PL0_RAW8 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RAW8, 
    MXC_CSI2_PL0_RAW10 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RAW10, 
    MXC_CSI2_PL0_RAW12 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RAW12, 
    MXC_CSI2_PL0_RAW14 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RAW14, 
    MXC_CSI2_PL0_RAW16 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RAW16, 
    MXC_CSI2_PL0_RAW20 = ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_0_RAW20, 
} mxc_csi2_payload0_t;
 
typedef enum {
    MXC_CSI2_PL1_DISABLE_ALL = 0x0001FFFF, 
    MXC_CSI2_PL1_UD_0x30 =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_1_USR_DEF_TYPE30, 
    MXC_CSI2_PL1_UD_0x31 =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_1_USR_DEF_TYPE31, 
    MXC_CSI2_PL1_UD_0x32 =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_1_USR_DEF_TYPE32, 
    MXC_CSI2_PL1_UD_0x33 =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_1_USR_DEF_TYPE33, 
    MXC_CSI2_PL1_UD_0x34 =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_1_USR_DEF_TYPE34, 
    MXC_CSI2_PL1_UD_0x35 =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_1_USR_DEF_TYPE35, 
    MXC_CSI2_PL1_UD_0x36 =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_1_USR_DEF_TYPE36, 
    MXC_CSI2_PL1_UD_0x37 =
        ~MXC_F_CSI2_CFG_DISABLE_PAYLOAD_1_USR_DEF_TYPE37, 
} mxc_csi2_payload1_t;
 
typedef enum {
    MXC_CSI2_PAD_CDRX_PN_L0, 
    MXC_CSI2_PAD_CDRX_PN_L1, 
    MXC_CSI2_PAD_CDRX_PN_L2, 
    MXC_CSI2_PAD_CDRX_PN_L3, 
    MXC_CSI2_PAD_CDRX_PN_L4, 
} mxc_csi2_swap_sel_t;
 
typedef enum {
    MXC_CSI2_DMA_NO_DMA = MXC_S_CSI2_VFIFO_CFG0_DMAMODE_NO_DMA, 
    MXC_CSI2_DMA_SEND_REQUEST = MXC_S_CSI2_VFIFO_CFG0_DMAMODE_DMA_REQ, 
    MXC_CSI2_DMA_FIFO_ABV_THD =
        MXC_S_CSI2_VFIFO_CFG0_DMAMODE_FIFO_THD, 
    MXC_CSI2_DMA_FIFO_FULL = MXC_S_CSI2_VFIFO_CFG0_DMAMODE_FIFO_FULL, 
} mxc_csi2_dma_mode_t;
 
typedef enum {
    MXC_CSI2_READ_ONE_BY_ONE, 
    MXC_CSI2_READ_DIRECT_ADDR, 
} mxc_csi2_fiform_t;
 
typedef enum {
    MXC_CSI2_ERR_DETECT_DISABLE, 
    MXC_CSI2_ERR_DETECT_ENABLE, 
} mxc_csi2_err_det_t;
 
typedef enum {
    MXC_CSI2_NORMAL_BW, 
    MXC_CSI2_FULL_BW, 
} mxc_csi2_fbwm_t;
 
typedef enum {
    MXC_CSI2_TYPE_RGB444 = MXC_S_CSI2_VFIFO_RAW_CTRL_RGB_TYP_RGB444, 
    MXC_CSI2_TYPE_RGB555 = MXC_S_CSI2_VFIFO_RAW_CTRL_RGB_TYP_RGB555, 
    MXC_CSI2_TYPE_RGB565 = MXC_S_CSI2_VFIFO_RAW_CTRL_RGB_TYP_RGB565, 
    MXC_CSI2_TYPE_RGB666 = MXC_S_CSI2_VFIFO_RAW_CTRL_RGB_TYP_RGB666, 
    MXC_CSI2_TYPE_RGB888 = MXC_S_CSI2_VFIFO_RAW_CTRL_RGB_TYP_RGG888, 
} mxc_csi2_rgb_type_t;
 
typedef enum {
    MXC_CSI2_FORMAT_RGRG_GBGB =
        (0x0 << MXC_F_CSI2_VFIFO_RAW_CTRL_RAW_FMT_POS), 
    MXC_CSI2_FORMAT_GRGR_BGBG =
        (0x1 << MXC_F_CSI2_VFIFO_RAW_CTRL_RAW_FMT_POS), 
    MXC_CSI2_FORMAT_GBGB_RGRG =
        (0x2 << MXC_F_CSI2_VFIFO_RAW_CTRL_RAW_FMT_POS), 
    MXC_CSI2_FORMAT_BGBG_GRGR =
        (0x3 << MXC_F_CSI2_VFIFO_RAW_CTRL_RAW_FMT_POS), 
} mxc_csi2_raw_format_t;
 
typedef enum {
    MXC_CSI2_AUTOFLUSH_DISABLE = 0, 
    MXC_CSI2_AUTOFLUSH_ENABLE, 
} mxc_csi2_raw_autoflush_t;
 
typedef enum {
    MXC_CSI2_AHBWAIT_DISABLE = 0, 
    MXC_CSI2_AHBWAIT_ENABLE, 
} mxc_csi2_ahbwait_t;
 
typedef enum {
    MXC_CSI2_DMA_WHOLE_FRAME = 0, 
    MXC_CSI2_DMA_LINE_BY_LINE, 
} mxc_csi2_dma_frame_t;
 
typedef struct _mxc_csi2_capture_stats_t {
    bool success;
    uint32_t ctrl_err;
    uint32_t ppi_err;
    uint32_t vfifo_err;
    size_t frame_size;
    size_t bytes_captured;
} mxc_csi2_capture_stats_t;
 
typedef void (*mxc_csi2_frame_handler_cb_t)(mxc_csi2_req_t *req, int result);
 
typedef int (*mxc_csi2_line_handler_cb_t)(uint8_t *data, unsigned int len);
 
typedef struct {
    mxc_csi2_swap_sel_t d0_swap_sel; 
    mxc_csi2_swap_sel_t d1_swap_sel; 
    mxc_csi2_swap_sel_t d2_swap_sel; 
    mxc_csi2_swap_sel_t d3_swap_sel; 
    mxc_csi2_swap_sel_t c0_swap_sel; 
} mxc_csi2_lane_src_t;
 
typedef struct {
    mxc_csi2_ppi_clk_t invert_ppi_clk; 
    uint32_t num_lanes; 
    uint32_t flush_cnt; 
    mxc_csi2_payload0_t payload0; 
    mxc_csi2_payload1_t payload1; 
    mxc_csi2_lane_src_t lane_src; 
} mxc_csi2_ctrl_cfg_t;
 
typedef struct {
    uint32_t virtual_channel; 
    uint32_t flow_ctrl; 
    uint32_t wait_en; 
    uint32_t wait_cyc; 
 
    mxc_csi2_dma_frame_t dma_whole_frame; 
    mxc_csi2_dma_mode_t dma_mode; 
    mxc_csi2_fiform_t fifo_rd_mode; 
    mxc_csi2_err_det_t err_det_en; 
    uint32_t rx_thd; 
    mxc_csi2_fbwm_t bandwidth_mode; 
} mxc_csi2_vfifo_cfg_t;
 
struct _mxc_csi2_req_t {
    uint32_t pixels_per_line; 
    uint32_t lines_per_frame; 
    uint32_t bits_per_pixel_odd; 
    uint32_t bits_per_pixel_even; 
    uint32_t frame_num; 
    mxc_csi2_line_handler_cb_t
        line_handler; 
 
    uint8_t process_raw_to_rgb; 
    mxc_csi2_rgb_type_t rgb_type; 
    mxc_csi2_raw_format_t raw_format; 
    mxc_csi2_raw_autoflush_t autoflush; 
    uint32_t raw_buf0_addr; 
    uint32_t raw_buf1_addr; 
};
 
/* **** Function Prototypes **** */
 
/******************************************/
/* Global Control/Configuration Functions */
/******************************************/
 
int MXC_CSI2_Init(mxc_csi2_req_t *req, mxc_csi2_ctrl_cfg_t *ctrl_cfg,
                  mxc_csi2_vfifo_cfg_t *vfifo_cfg);
 
int MXC_CSI2_Shutdown(void);
 
int MXC_CSI2_Start(int num_data_lanes);
 
int MXC_CSI2_Stop(void);
 
int MXC_CSI2_CaptureFrame(void);
 
int MXC_CSI2_CaptureFrameDMA(void);
 
int MXC_CSI2_SetLaneCtrlSource(mxc_csi2_lane_src_t *src);
 
int MXC_CSI2_GetLaneCtrlSource(mxc_csi2_lane_src_t *src);
 
void MXC_CSI2_GetImageDetails(uint32_t *imgLen, uint32_t *w, uint32_t *h);
 
/********************************/
/* CSI2 RX Controller Functions */
/********************************/
 
int MXC_CSI2_CTRL_Config(mxc_csi2_ctrl_cfg_t *cfg);
 
void MXC_CSI2_CTRL_EnableInt(uint32_t mask);
 
void MXC_CSI2_CTRL_DisableInt(uint32_t mask);
 
int MXC_CSI2_CTRL_GetFlags(void);
 
void MXC_CSI2_CTRL_ClearFlags(uint32_t flags);
 
/************************/
/* CSI2 VFIFO Functions */
/************************/
 
int MXC_CSI2_VFIFO_Config(mxc_csi2_vfifo_cfg_t *cfg);
 
int MXC_CSI2_VFIFO_NextFIFOTrigMode(uint8_t ff_not_empty, uint8_t ff_abv_thd, uint8_t ff_full);
 
void MXC_CSI2_VFIFO_EnableInt(uint32_t mask, uint32_t edge);
 
void MXC_CSI2_VFIFO_ChangeIntMode(uint32_t mask, uint32_t edge);
 
void MXC_CSI2_VFIFO_DisableInt(uint32_t mask);
 
int MXC_CSI2_VFIFO_GetFlags(void);
 
void MXC_CSI2_VFIFO_ClearFlags(uint32_t flags);
 
int MXC_CSI2_VFIFO_Enable(void);
 
int MXC_CSI2_VFIFO_Disable(void);
 
int MXC_CSI2_VFIFO_ProcessRAWtoRGB(mxc_csi2_req_t *req);
 
int MXC_CSI2_VFIFO_SetPayloadType(mxc_csi2_payload0_t payload0, mxc_csi2_payload1_t payload1);
 
int MXC_CSI2_VFIFO_GetPayloadType(uint32_t *payload0, uint32_t *payload1);
 
int MXC_CSI2_VFIFO_SetDMAMode(mxc_csi2_dma_mode_t dma_mode);
 
mxc_csi2_dma_mode_t MXC_CSI2_VFIFO_GetDMAMode(void);
 
int MXC_CSI2_VFIFO_SetRGBType(mxc_csi2_rgb_type_t rgb_type);
 
mxc_csi2_rgb_type_t MXC_CSI2_VFIFO_GetRGBType(void);
 
int MXC_CSI2_VFIFO_SetRAWFormat(mxc_csi2_raw_format_t raw_format);
 
mxc_csi2_raw_format_t MXC_CSI2_VFIFO_GetRAWFormat(void);
 
int MXC_CSI2_VFIFO_GetFIFOEntityCount(void);
 
void MXC_CSI2_VFIFO_SetAHBWait(mxc_csi2_ahbwait_t wait_en);
 
mxc_csi2_ahbwait_t MXC_CSI2_VFIFO_GetAHBWait(void);
 
/***********************************************/
/* CSI2 PHY Protocol Interface (PPI) Functions */
/***********************************************/
 
void MXC_CSI2_PPI_EnableInt(uint32_t mask);
 
void MXC_CSI2_PPI_DisableInt(uint32_t mask);
 
int MXC_CSI2_PPI_GetFlags(void);
 
void MXC_CSI2_PPI_ClearFlags(uint32_t flags);
 
int MXC_CSI2_PPI_Stop(void);
 
/************************************/
/* CSI2 DMA - Used for all features */
/************************************/
 
bool MXC_CSI2_DMA_Frame_Complete(void);
 
mxc_csi2_capture_stats_t MXC_CSI2_GetCaptureStats(void);
 
int MXC_CSI2_DMA_Config(uint8_t *dst_addr, uint32_t byte_cnt, uint32_t burst_size);
 
int MXC_CSI2_DMA_GetChannel(void);
 
int MXC_CSI2_DMA_GetCurrentLineCnt(void);
 
int MXC_CSI2_DMA_GetCurrentFrameEndCnt(void);
 
void MXC_CSI2_DMA_Callback(int a, int b);
 
#ifdef __cplusplus
}
#endif
 
#endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX78002_CSI2_H_