I2S_CTRL0CH0

Macros
#define	MXC_F_I2S_CTRL0CH0_LSB_FIRST_POS   1
#define	MXC_F_I2S_CTRL0CH0_LSB_FIRST   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_LSB_FIRST_POS))
#define	MXC_F_I2S_CTRL0CH0_PDM_FILT_POS   2
#define	MXC_F_I2S_CTRL0CH0_PDM_FILT   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_PDM_FILT_POS))
#define	MXC_F_I2S_CTRL0CH0_PDM_EN_POS   3
#define	MXC_F_I2S_CTRL0CH0_PDM_EN   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_PDM_EN_POS))
#define	MXC_F_I2S_CTRL0CH0_USEDDR_POS   4
#define	MXC_F_I2S_CTRL0CH0_USEDDR   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_USEDDR_POS))
#define	MXC_F_I2S_CTRL0CH0_PDM_INV_POS   5
#define	MXC_F_I2S_CTRL0CH0_PDM_INV   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_PDM_INV_POS))
#define	MXC_F_I2S_CTRL0CH0_CH_MODE_POS   6
#define	MXC_F_I2S_CTRL0CH0_CH_MODE   ((uint32_t)(0x3UL << MXC_F_I2S_CTRL0CH0_CH_MODE_POS))
#define	MXC_F_I2S_CTRL0CH0_WS_POL_POS   8
#define	MXC_F_I2S_CTRL0CH0_WS_POL   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_WS_POL_POS))
#define	MXC_F_I2S_CTRL0CH0_MSB_LOC_POS   9
#define	MXC_F_I2S_CTRL0CH0_MSB_LOC   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_MSB_LOC_POS))
#define	MXC_F_I2S_CTRL0CH0_ALIGN_POS   10
#define	MXC_F_I2S_CTRL0CH0_ALIGN   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_ALIGN_POS))
#define	MXC_F_I2S_CTRL0CH0_EXT_SEL_POS   11
#define	MXC_F_I2S_CTRL0CH0_EXT_SEL   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_EXT_SEL_POS))
#define	MXC_F_I2S_CTRL0CH0_STEREO_POS   12
#define	MXC_F_I2S_CTRL0CH0_STEREO   ((uint32_t)(0x3UL << MXC_F_I2S_CTRL0CH0_STEREO_POS))
#define	MXC_F_I2S_CTRL0CH0_WSIZE_POS   14
#define	MXC_F_I2S_CTRL0CH0_WSIZE   ((uint32_t)(0x3UL << MXC_F_I2S_CTRL0CH0_WSIZE_POS))
#define	MXC_F_I2S_CTRL0CH0_TX_EN_POS   16
#define	MXC_F_I2S_CTRL0CH0_TX_EN   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_TX_EN_POS))
#define	MXC_F_I2S_CTRL0CH0_RX_EN_POS   17
#define	MXC_F_I2S_CTRL0CH0_RX_EN   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_RX_EN_POS))
#define	MXC_F_I2S_CTRL0CH0_FLUSH_POS   18
#define	MXC_F_I2S_CTRL0CH0_FLUSH   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_FLUSH_POS))
#define	MXC_F_I2S_CTRL0CH0_RST_POS   19
#define	MXC_F_I2S_CTRL0CH0_RST   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_RST_POS))
#define	MXC_F_I2S_CTRL0CH0_FIFO_LSB_POS   20
#define	MXC_F_I2S_CTRL0CH0_FIFO_LSB   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_FIFO_LSB_POS))
#define	MXC_F_I2S_CTRL0CH0_RX_THD_VAL_POS   24
#define	MXC_F_I2S_CTRL0CH0_RX_THD_VAL   ((uint32_t)(0xFFUL << MXC_F_I2S_CTRL0CH0_RX_THD_VAL_POS))

Detailed Description

Global mode channel.

Macro Definition Documentation

MXC_F_I2S_CTRL0CH0_ALIGN

#define MXC_F_I2S_CTRL0CH0_ALIGN   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_ALIGN_POS))

CTRL0CH0_ALIGN Mask

MXC_F_I2S_CTRL0CH0_ALIGN_POS

#define MXC_F_I2S_CTRL0CH0_ALIGN_POS   10

CTRL0CH0_ALIGN Position

MXC_F_I2S_CTRL0CH0_CH_MODE

#define MXC_F_I2S_CTRL0CH0_CH_MODE   ((uint32_t)(0x3UL << MXC_F_I2S_CTRL0CH0_CH_MODE_POS))

CTRL0CH0_CH_MODE Mask

MXC_F_I2S_CTRL0CH0_CH_MODE_POS

#define MXC_F_I2S_CTRL0CH0_CH_MODE_POS   6

CTRL0CH0_CH_MODE Position

MXC_F_I2S_CTRL0CH0_EXT_SEL

#define MXC_F_I2S_CTRL0CH0_EXT_SEL   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_EXT_SEL_POS))

CTRL0CH0_EXT_SEL Mask

MXC_F_I2S_CTRL0CH0_EXT_SEL_POS

#define MXC_F_I2S_CTRL0CH0_EXT_SEL_POS   11

CTRL0CH0_EXT_SEL Position

MXC_F_I2S_CTRL0CH0_FIFO_LSB

#define MXC_F_I2S_CTRL0CH0_FIFO_LSB   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_FIFO_LSB_POS))

CTRL0CH0_FIFO_LSB Mask

MXC_F_I2S_CTRL0CH0_FIFO_LSB_POS

#define MXC_F_I2S_CTRL0CH0_FIFO_LSB_POS   20

CTRL0CH0_FIFO_LSB Position

MXC_F_I2S_CTRL0CH0_FLUSH

#define MXC_F_I2S_CTRL0CH0_FLUSH   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_FLUSH_POS))

CTRL0CH0_FLUSH Mask

MXC_F_I2S_CTRL0CH0_FLUSH_POS

#define MXC_F_I2S_CTRL0CH0_FLUSH_POS   18

CTRL0CH0_FLUSH Position

MXC_F_I2S_CTRL0CH0_LSB_FIRST

#define MXC_F_I2S_CTRL0CH0_LSB_FIRST   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_LSB_FIRST_POS))

CTRL0CH0_LSB_FIRST Mask

MXC_F_I2S_CTRL0CH0_LSB_FIRST_POS

#define MXC_F_I2S_CTRL0CH0_LSB_FIRST_POS   1

CTRL0CH0_LSB_FIRST Position

MXC_F_I2S_CTRL0CH0_MSB_LOC

#define MXC_F_I2S_CTRL0CH0_MSB_LOC   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_MSB_LOC_POS))

CTRL0CH0_MSB_LOC Mask

MXC_F_I2S_CTRL0CH0_MSB_LOC_POS

#define MXC_F_I2S_CTRL0CH0_MSB_LOC_POS   9

CTRL0CH0_MSB_LOC Position

MXC_F_I2S_CTRL0CH0_PDM_EN

#define MXC_F_I2S_CTRL0CH0_PDM_EN   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_PDM_EN_POS))

CTRL0CH0_PDM_EN Mask

MXC_F_I2S_CTRL0CH0_PDM_EN_POS

#define MXC_F_I2S_CTRL0CH0_PDM_EN_POS   3

CTRL0CH0_PDM_EN Position

MXC_F_I2S_CTRL0CH0_PDM_FILT

#define MXC_F_I2S_CTRL0CH0_PDM_FILT   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_PDM_FILT_POS))

CTRL0CH0_PDM_FILT Mask

MXC_F_I2S_CTRL0CH0_PDM_FILT_POS

#define MXC_F_I2S_CTRL0CH0_PDM_FILT_POS   2

CTRL0CH0_PDM_FILT Position

MXC_F_I2S_CTRL0CH0_PDM_INV

#define MXC_F_I2S_CTRL0CH0_PDM_INV   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_PDM_INV_POS))

CTRL0CH0_PDM_INV Mask

MXC_F_I2S_CTRL0CH0_PDM_INV_POS

#define MXC_F_I2S_CTRL0CH0_PDM_INV_POS   5

CTRL0CH0_PDM_INV Position

MXC_F_I2S_CTRL0CH0_RST

#define MXC_F_I2S_CTRL0CH0_RST   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_RST_POS))

CTRL0CH0_RST Mask

MXC_F_I2S_CTRL0CH0_RST_POS

#define MXC_F_I2S_CTRL0CH0_RST_POS   19

CTRL0CH0_RST Position

MXC_F_I2S_CTRL0CH0_RX_EN

#define MXC_F_I2S_CTRL0CH0_RX_EN   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_RX_EN_POS))

CTRL0CH0_RX_EN Mask

MXC_F_I2S_CTRL0CH0_RX_EN_POS

#define MXC_F_I2S_CTRL0CH0_RX_EN_POS   17

CTRL0CH0_RX_EN Position

MXC_F_I2S_CTRL0CH0_RX_THD_VAL

#define MXC_F_I2S_CTRL0CH0_RX_THD_VAL   ((uint32_t)(0xFFUL << MXC_F_I2S_CTRL0CH0_RX_THD_VAL_POS))

CTRL0CH0_RX_THD_VAL Mask

MXC_F_I2S_CTRL0CH0_RX_THD_VAL_POS

#define MXC_F_I2S_CTRL0CH0_RX_THD_VAL_POS   24

CTRL0CH0_RX_THD_VAL Position

MXC_F_I2S_CTRL0CH0_STEREO

#define MXC_F_I2S_CTRL0CH0_STEREO   ((uint32_t)(0x3UL << MXC_F_I2S_CTRL0CH0_STEREO_POS))

CTRL0CH0_STEREO Mask

MXC_F_I2S_CTRL0CH0_STEREO_POS

#define MXC_F_I2S_CTRL0CH0_STEREO_POS   12

CTRL0CH0_STEREO Position

MXC_F_I2S_CTRL0CH0_TX_EN

#define MXC_F_I2S_CTRL0CH0_TX_EN   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_TX_EN_POS))

CTRL0CH0_TX_EN Mask

MXC_F_I2S_CTRL0CH0_TX_EN_POS

#define MXC_F_I2S_CTRL0CH0_TX_EN_POS   16

CTRL0CH0_TX_EN Position

MXC_F_I2S_CTRL0CH0_USEDDR

#define MXC_F_I2S_CTRL0CH0_USEDDR   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_USEDDR_POS))

CTRL0CH0_USEDDR Mask

MXC_F_I2S_CTRL0CH0_USEDDR_POS

#define MXC_F_I2S_CTRL0CH0_USEDDR_POS   4

CTRL0CH0_USEDDR Position

MXC_F_I2S_CTRL0CH0_WS_POL

#define MXC_F_I2S_CTRL0CH0_WS_POL   ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_WS_POL_POS))

CTRL0CH0_WS_POL Mask

MXC_F_I2S_CTRL0CH0_WS_POL_POS

#define MXC_F_I2S_CTRL0CH0_WS_POL_POS   8

CTRL0CH0_WS_POL Position

MXC_F_I2S_CTRL0CH0_WSIZE

#define MXC_F_I2S_CTRL0CH0_WSIZE   ((uint32_t)(0x3UL << MXC_F_I2S_CTRL0CH0_WSIZE_POS))

CTRL0CH0_WSIZE Mask

MXC_F_I2S_CTRL0CH0_WSIZE_POS

#define MXC_F_I2S_CTRL0CH0_WSIZE_POS   14

CTRL0CH0_WSIZE Position