MAX78002 Peripheral Driver API
Peripheral Driver API for the MAX78002
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Register Offsets
SDHC » SDHC_Registers

Macros

#define MXC_R_SDHC_SDMA   ((uint32_t)0x00000000UL)
 
#define MXC_R_SDHC_BLK_SIZE   ((uint32_t)0x00000004UL)
 
#define MXC_R_SDHC_BLK_CNT   ((uint32_t)0x00000006UL)
 
#define MXC_R_SDHC_ARG_1   ((uint32_t)0x00000008UL)
 
#define MXC_R_SDHC_TRANS   ((uint32_t)0x0000000CUL)
 
#define MXC_R_SDHC_CMD   ((uint32_t)0x0000000EUL)
 
#define MXC_R_SDHC_RESP   ((uint32_t)0x00000010UL)
 
#define MXC_R_SDHC_BUFFER   ((uint32_t)0x00000020UL)
 
#define MXC_R_SDHC_PRESENT   ((uint32_t)0x00000024UL)
 
#define MXC_R_SDHC_HOST_CN_1   ((uint32_t)0x00000028UL)
 
#define MXC_R_SDHC_PWR   ((uint32_t)0x00000029UL)
 
#define MXC_R_SDHC_BLK_GAP   ((uint32_t)0x0000002AUL)
 
#define MXC_R_SDHC_WAKEUP   ((uint32_t)0x0000002BUL)
 
#define MXC_R_SDHC_CLK_CN   ((uint32_t)0x0000002CUL)
 
#define MXC_R_SDHC_TO   ((uint32_t)0x0000002EUL)
 
#define MXC_R_SDHC_SW_RESET   ((uint32_t)0x0000002FUL)
 
#define MXC_R_SDHC_INT_STAT   ((uint32_t)0x00000030UL)
 
#define MXC_R_SDHC_ER_INT_STAT   ((uint32_t)0x00000032UL)
 
#define MXC_R_SDHC_INT_EN   ((uint32_t)0x00000034UL)
 
#define MXC_R_SDHC_ER_INT_EN   ((uint32_t)0x00000036UL)
 
#define MXC_R_SDHC_INT_SIGNAL   ((uint32_t)0x00000038UL)
 
#define MXC_R_SDHC_ER_INT_SIGNAL   ((uint32_t)0x0000003AUL)
 
#define MXC_R_SDHC_AUTO_CMD_ER   ((uint32_t)0x0000003CUL)
 
#define MXC_R_SDHC_HOST_CN_2   ((uint32_t)0x0000003EUL)
 
#define MXC_R_SDHC_CFG_0   ((uint32_t)0x00000040UL)
 
#define MXC_R_SDHC_CFG_1   ((uint32_t)0x00000044UL)
 
#define MXC_R_SDHC_MAX_CURR_CFG   ((uint32_t)0x00000048UL)
 
#define MXC_R_SDHC_FORCE_CMD   ((uint32_t)0x00000050UL)
 
#define MXC_R_SDHC_FORCE_EVENT_INT_STAT   ((uint32_t)0x00000052UL)
 
#define MXC_R_SDHC_ADMA_ER   ((uint32_t)0x00000054UL)
 
#define MXC_R_SDHC_ADMA_ADDR_0   ((uint32_t)0x00000058UL)
 
#define MXC_R_SDHC_ADMA_ADDR_1   ((uint32_t)0x0000005CUL)
 
#define MXC_R_SDHC_PRESET_0   ((uint32_t)0x00000060UL)
 
#define MXC_R_SDHC_PRESET_1   ((uint32_t)0x00000062UL)
 
#define MXC_R_SDHC_PRESET_2   ((uint32_t)0x00000064UL)
 
#define MXC_R_SDHC_PRESET_3   ((uint32_t)0x00000066UL)
 
#define MXC_R_SDHC_PRESET_4   ((uint32_t)0x00000068UL)
 
#define MXC_R_SDHC_PRESET_5   ((uint32_t)0x0000006AUL)
 
#define MXC_R_SDHC_PRESET_6   ((uint32_t)0x0000006CUL)
 
#define MXC_R_SDHC_PRESET_7   ((uint32_t)0x0000006EUL)
 
#define MXC_R_SDHC_SHARED_BUS   ((uint32_t)0x000000E0UL)
 
#define MXC_R_SDHC_SLOT_INT   ((uint32_t)0x000000FCUL)
 
#define MXC_R_SDHC_HOST_CN_VER   ((uint32_t)0x000000FEUL)
 

Detailed Description

SDHC Peripheral Register Offsets from the SDHC Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_SDHC_ADMA_ADDR_0

#define MXC_R_SDHC_ADMA_ADDR_0   ((uint32_t)0x00000058UL)

Offset from SDHC Base Address: 0x0058

◆ MXC_R_SDHC_ADMA_ADDR_1

#define MXC_R_SDHC_ADMA_ADDR_1   ((uint32_t)0x0000005CUL)

Offset from SDHC Base Address: 0x005C

◆ MXC_R_SDHC_ADMA_ER

#define MXC_R_SDHC_ADMA_ER   ((uint32_t)0x00000054UL)

Offset from SDHC Base Address: 0x0054

◆ MXC_R_SDHC_ARG_1

#define MXC_R_SDHC_ARG_1   ((uint32_t)0x00000008UL)

Offset from SDHC Base Address: 0x0008

◆ MXC_R_SDHC_AUTO_CMD_ER

#define MXC_R_SDHC_AUTO_CMD_ER   ((uint32_t)0x0000003CUL)

Offset from SDHC Base Address: 0x003C

◆ MXC_R_SDHC_BLK_CNT

#define MXC_R_SDHC_BLK_CNT   ((uint32_t)0x00000006UL)

Offset from SDHC Base Address: 0x0006

◆ MXC_R_SDHC_BLK_GAP

#define MXC_R_SDHC_BLK_GAP   ((uint32_t)0x0000002AUL)

Offset from SDHC Base Address: 0x002A

◆ MXC_R_SDHC_BLK_SIZE

#define MXC_R_SDHC_BLK_SIZE   ((uint32_t)0x00000004UL)

Offset from SDHC Base Address: 0x0004

◆ MXC_R_SDHC_BUFFER

#define MXC_R_SDHC_BUFFER   ((uint32_t)0x00000020UL)

Offset from SDHC Base Address: 0x0020

◆ MXC_R_SDHC_CFG_0

#define MXC_R_SDHC_CFG_0   ((uint32_t)0x00000040UL)

Offset from SDHC Base Address: 0x0040

◆ MXC_R_SDHC_CFG_1

#define MXC_R_SDHC_CFG_1   ((uint32_t)0x00000044UL)

Offset from SDHC Base Address: 0x0044

◆ MXC_R_SDHC_CLK_CN

#define MXC_R_SDHC_CLK_CN   ((uint32_t)0x0000002CUL)

Offset from SDHC Base Address: 0x002C

◆ MXC_R_SDHC_CMD

#define MXC_R_SDHC_CMD   ((uint32_t)0x0000000EUL)

Offset from SDHC Base Address: 0x000E

◆ MXC_R_SDHC_ER_INT_EN

#define MXC_R_SDHC_ER_INT_EN   ((uint32_t)0x00000036UL)

Offset from SDHC Base Address: 0x0036

◆ MXC_R_SDHC_ER_INT_SIGNAL

#define MXC_R_SDHC_ER_INT_SIGNAL   ((uint32_t)0x0000003AUL)

Offset from SDHC Base Address: 0x003A

◆ MXC_R_SDHC_ER_INT_STAT

#define MXC_R_SDHC_ER_INT_STAT   ((uint32_t)0x00000032UL)

Offset from SDHC Base Address: 0x0032

◆ MXC_R_SDHC_FORCE_CMD

#define MXC_R_SDHC_FORCE_CMD   ((uint32_t)0x00000050UL)

Offset from SDHC Base Address: 0x0050

◆ MXC_R_SDHC_FORCE_EVENT_INT_STAT

#define MXC_R_SDHC_FORCE_EVENT_INT_STAT   ((uint32_t)0x00000052UL)

Offset from SDHC Base Address: 0x0052

◆ MXC_R_SDHC_HOST_CN_1

#define MXC_R_SDHC_HOST_CN_1   ((uint32_t)0x00000028UL)

Offset from SDHC Base Address: 0x0028

◆ MXC_R_SDHC_HOST_CN_2

#define MXC_R_SDHC_HOST_CN_2   ((uint32_t)0x0000003EUL)

Offset from SDHC Base Address: 0x003E

◆ MXC_R_SDHC_HOST_CN_VER

#define MXC_R_SDHC_HOST_CN_VER   ((uint32_t)0x000000FEUL)

Offset from SDHC Base Address: 0x00FE

◆ MXC_R_SDHC_INT_EN

#define MXC_R_SDHC_INT_EN   ((uint32_t)0x00000034UL)

Offset from SDHC Base Address: 0x0034

◆ MXC_R_SDHC_INT_SIGNAL

#define MXC_R_SDHC_INT_SIGNAL   ((uint32_t)0x00000038UL)

Offset from SDHC Base Address: 0x0038

◆ MXC_R_SDHC_INT_STAT

#define MXC_R_SDHC_INT_STAT   ((uint32_t)0x00000030UL)

Offset from SDHC Base Address: 0x0030

◆ MXC_R_SDHC_MAX_CURR_CFG

#define MXC_R_SDHC_MAX_CURR_CFG   ((uint32_t)0x00000048UL)

Offset from SDHC Base Address: 0x0048

◆ MXC_R_SDHC_PRESENT

#define MXC_R_SDHC_PRESENT   ((uint32_t)0x00000024UL)

Offset from SDHC Base Address: 0x0024

◆ MXC_R_SDHC_PRESET_0

#define MXC_R_SDHC_PRESET_0   ((uint32_t)0x00000060UL)

Offset from SDHC Base Address: 0x0060

◆ MXC_R_SDHC_PRESET_1

#define MXC_R_SDHC_PRESET_1   ((uint32_t)0x00000062UL)

Offset from SDHC Base Address: 0x0062

◆ MXC_R_SDHC_PRESET_2

#define MXC_R_SDHC_PRESET_2   ((uint32_t)0x00000064UL)

Offset from SDHC Base Address: 0x0064

◆ MXC_R_SDHC_PRESET_3

#define MXC_R_SDHC_PRESET_3   ((uint32_t)0x00000066UL)

Offset from SDHC Base Address: 0x0066

◆ MXC_R_SDHC_PRESET_4

#define MXC_R_SDHC_PRESET_4   ((uint32_t)0x00000068UL)

Offset from SDHC Base Address: 0x0068

◆ MXC_R_SDHC_PRESET_5

#define MXC_R_SDHC_PRESET_5   ((uint32_t)0x0000006AUL)

Offset from SDHC Base Address: 0x006A

◆ MXC_R_SDHC_PRESET_6

#define MXC_R_SDHC_PRESET_6   ((uint32_t)0x0000006CUL)

Offset from SDHC Base Address: 0x006C

◆ MXC_R_SDHC_PRESET_7

#define MXC_R_SDHC_PRESET_7   ((uint32_t)0x0000006EUL)

Offset from SDHC Base Address: 0x006E

◆ MXC_R_SDHC_PWR

#define MXC_R_SDHC_PWR   ((uint32_t)0x00000029UL)

Offset from SDHC Base Address: 0x0029

◆ MXC_R_SDHC_RESP

#define MXC_R_SDHC_RESP   ((uint32_t)0x00000010UL)

Offset from SDHC Base Address: 0x0010

◆ MXC_R_SDHC_SDMA

#define MXC_R_SDHC_SDMA   ((uint32_t)0x00000000UL)

Offset from SDHC Base Address: 0x0000

◆ MXC_R_SDHC_SHARED_BUS

#define MXC_R_SDHC_SHARED_BUS   ((uint32_t)0x000000E0UL)

Offset from SDHC Base Address: 0x00E0

◆ MXC_R_SDHC_SLOT_INT

#define MXC_R_SDHC_SLOT_INT   ((uint32_t)0x000000FCUL)

Offset from SDHC Base Address: 0x00FC

◆ MXC_R_SDHC_SW_RESET

#define MXC_R_SDHC_SW_RESET   ((uint32_t)0x0000002FUL)

Offset from SDHC Base Address: 0x002F

◆ MXC_R_SDHC_TO

#define MXC_R_SDHC_TO   ((uint32_t)0x0000002EUL)

Offset from SDHC Base Address: 0x002E

◆ MXC_R_SDHC_TRANS

#define MXC_R_SDHC_TRANS   ((uint32_t)0x0000000CUL)

Offset from SDHC Base Address: 0x000C

◆ MXC_R_SDHC_WAKEUP

#define MXC_R_SDHC_WAKEUP   ((uint32_t)0x0000002BUL)

Offset from SDHC Base Address: 0x002B