Header file of AD405X Driver. More...

#include <stdint.h>
#include "no_os_util.h"
#include "no_os_i3c.h"
#include "no_os_spi.h"
#include "no_os_gpio.h"

Include dependency graph for ad405x.h:

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Go to the source code of this file.

Classes
union	ad405x_comm_init_param

struct	ad405x_init_param
	Structure holding the parameters for AD405X device initialization. More...

union	ad405x_comm_desc

struct	ad405x_thresh
	AD405X threshold configuration values. Entry positions matter. More...

struct	ad405x_i3c_extra
	AD405X Device I3C structure. More...

struct	ad405x_spi_extra
	AD405X Device SPI structure. More...

union	ad405x_extra

struct	ad405x_dev
	AD405X Device structure. More...

Macros
#define	AD405X_BUFF_SIZE 7

#define	AD405X_SPI_READ NO_OS_BIT(7)

#define	AD405X_REG_INTF_CONFIG_A 0x00

#define	AD405X_REG_DEVICE_CONFIG 0x02

#define	AD405X_REG_PROD_ID_0 0x04

#define	AD405X_REG_PROD_ID_1 0x05

#define	AD405X_REG_SCRATCH_PAD 0x0A

#define	AD405X_REG_VENDOR_L 0x0C

#define	AD405X_REG_VENDOR_H 0x0D

#define	AD405X_REG_STREAM_MODE 0x0E

#define	AD405X_REG_INTF_STATUS 0x11

#define	AD405X_REG_ADC_MODES 0x21

#define	AD405X_REG_ADC_CONFIG 0x22

#define	AD405X_REG_AVG_CONFIG 0x23

#define	AD405X_REG_GPIO_CONFIG 0x24

#define	AD405X_REG_INTR_CONFIG 0x25

#define	AD405X_REG_CHOP_CONFIG 0x26

#define	AD405X_REG_TIMER_CONFIG 0x27

#define	AD405X_REG_MAX_THRESH_REG(x)

#define	AD405X_REG_MIN_THRESH_REG(x)

#define	AD405X_REG_MAX_HYST_REG 0x2C

#define	AD405X_REG_MIN_HYST_REG 0x2D

#define	AD405X_REG_MON_VAL_REG(x)

#define	AD405X_REG_FUSE_CRC 0x40

#define	AD405X_REG_DEVICE_STATUS 0x41

#define	AD405X_REG_MAX_INTR(x)

#define	AD405X_REG_MIN_INTR(x)

#define	AD405X_REG_MODE_SET 0x20

#define	AD405X_REG_INTF_IBI_EN 0x30

#define	AD405X_REG_ADC_IBI_EN 0x31

#define	AD405X_REG_TGT_ADDR 0x46

#define	AD405X_REG_GRP_ADDR 0x47

#define	AD405X_REG_IBI_STATUS 0x48

#define	AD405X_REG_CONV_READ(x)

#define	AD405X_REG_CONV_TRIGGER(x)

#define	AD405X_REG_CONV_AUTO 0x58

#define	AD405X_STATUS_FLAGS_MSK(x)

#define	AD405X_INTF_STATUS_FLAGS_MSK(x)

#define	AD405X_ADC_DATA_FORMAT_MSK NO_OS_BIT(7)

#define	AD405X_ADC_MODES_MSK NO_OS_GENMASK(1, 0)

#define	AD405X_ADC_MODE 0x00

#define	AD405X_BURST_AVERAGING_MODE NO_OS_BIT(0)

#define	AD405X_AVERAGING_MODE NO_OS_BIT(1)

#define	AD405X_PERSISTENT_AUTO_MODE NO_OS_GENMASK(1, 0)

#define	AD405X_NONPERSISTENT_AUTO_MODE NO_OS_GENMASK(1, 0)

#define	AD405X_ENTER_ADC_MODE_MSK NO_OS_BIT(0)

#define	AD405X_ENTER_ADC_MODE NO_OS_BIT(0)

#define	AD405X_ENTER_AUTO_MODE_MSK NO_OS_BIT(2)

#define	AD405X_ENTER_AUTO_MODE NO_OS_BIT(2)

#define	AD405X_FS_BURST_AUTO_MSK NO_OS_GENMASK(7, 4)

#define	AD405X_TIMER_PWR_ON_MSK NO_OS_GENMASK(3, 0)

#define	AD405X_AVG_WIN_LEN_MSK NO_OS_GENMASK(3, 0)

#define	AD405X_DEV_EN_POL_MSK NO_OS_BIT(7)

#define	AD405X_GP1_MODE_MSK NO_OS_GENMASK(6, 4)

#define	AD405X_INVERT_ON_CHOP_MSK NO_OS_BIT(3)

#define	AD405X_GP0_MODE_MSK NO_OS_GENMASK(2, 0)

#define	AD405X_CLEAR_RESET_FLAG NO_OS_BIT(6)

#define	AD405X_CLEAR_NOT_RDY_FLAG NO_OS_BIT(7)

#define	AD405X_PROD_ID_0_RESET(x)

#define	AD405X_PROD_ID_1_RESET 0x00

#define	AD405X_VENDOR_SPI_L_RESET 0x56

#define	AD405X_VENDOR_SPI_H_RESET 0x04

#define	AD405X_VENDOR_I3C_L_RESET 0x77

#define	AD405X_VENDOR_I3C_H_RESET 0x01

#define	AD405X_RESET_CODE 0x81

#define	AD405X_I3C_BCR 0x26

#define	AD405X_I3C_DCR 0x00

#define	AD405X_I3C_PID_ 0x02ee00700000

#define	AD405X_I3C_PID_INSTANCE_ID(x)

#define	AD405X_I3C_PID(x)

#define	AD405X_ISTS_NOT_RDY_ERROR(x)

#define	AD405X_STS_DEVICE_RESET(x)

#define	AD405X_STS_DEVICE_READY(x)

#define	AD405X_IBI_STS_EN(x)

#define	AD405X_IBI_EN_MIN_SET(x)

#define	AD405X_IBI_EN_MAX_SET(x)

#define	AD405X_IBI_EN_CONV_TRIGGER(x)

#define	AD405X_IBI_EN_CONV_TRIGGER_GET(x)

Enumerations
enum	ad405x_type { ID_AD4050 , ID_AD4052 , ID_AD4056 , ID_AD4058 , ID_AD4060 , ID_AD4062 }

enum	ad405x_comm_type { AD405X_SPI_COMM , AD405X_I3C_COMM }

enum	ad405x_operation_mode { AD405X_ADC_MODE_OP = 0 , AD405X_BURST_AVERAGING_MODE_OP = 1 , AD405X_AVERAGING_MODE_OP = 2 , AD405X_CONFIG_MODE_OP , AD405X_PERSISTENT_AUTO_MODE_OP , AD405X_NONPERSISTENT_AUTO_MODE_OP }

enum	ad405x_sample_rate { AD405X_2_MSPS , AD405X_1_MSPS , AD405X_333_KSPS , AD405X_100_KSPS , AD405X_33_KSPS , AD405X_10_KSPS , AD405X_3_KSPS , AD405X_1_KSPS , AD405X_500_SPS , AD405X_333_SPS , AD405X_250_SPS , AD405X_200_SPS , AD405X_166_SPS , AD405X_140_SPS , AD405X_125_SPS , AD405X_111_SPS }

enum	ad405x_dev_en_timer_pwr_on { AD405X_DEV_EN_TIME_250_NS , AD405X_DEV_EN_TIME_1_US , AD405X_DEV_EN_TIME_3_3_US , AD405X_DEV_EN_TIME_10_US , AD405X_DEV_EN_TIME_33_US , AD405X_DEV_EN_TIME_100_US , AD405X_DEV_EN_TIME_333_US , AD405X_DEV_EN_TIME_1_MS , AD405X_DEV_EN_TIME_2_MS , AD405X_DEV_EN_TIME_3_MS , AD405X_DEV_EN_TIME_4_MS , AD405X_DEV_EN_TIME_5_MS , AD405X_DEV_EN_TIME_6_MS , AD405X_DEV_EN_TIME_7_MS , AD405X_DEV_EN_TIME_8_MS , AD405X_DEV_EN_TIME_9_MS }

enum	ad405x_avg_filter_l { AD405X_LENGTH_2 , AD405X_LENGTH_4 , AD405X_LENGTH_8 , AD405X_LENGTH_16 , AD405X_LENGTH_32 , AD405X_LENGTH_64 , AD405X_LENGTH_128 , AD405X_LENGTH_256 , AD405X_LENGTH_512 , AD405X_LENGTH_1024 , AD405X_LENGTH_2048 , AD405X_LENGTH_4096 }

enum	ad405x_dev_en_polarity { AD405X_DEV_EN_ACTIVE_LOW , AD405X_DEV_EN_ACTIVE_HIGH }

enum	ad405x_invert_on_chop { AD405X_INVERT_ON_CHOP_DISABLED , AD405X_INVERT_ON_CHOP_ENABLED }

enum	ad405x_gp_mode { AD405X_GP_MODE_HIGH_Z , AD405X_GP_MODE_INTR , AD405X_GP_MODE_DRDY , AD405X_GP_MODE_DEV_EN , AD405X_GP_MODE_CHOP , AD405X_GP_MODE_LOW , AD405X_GP_MODE_HIGH , AD405X_GP_MODE_DEV_RDY }

enum	ad405x_gp_select { AD405X_GP_0 , AD405X_GP_1 }

enum	ad405x_out_data_format { AD405X_STRAIGHT_BINARY , AD405X_TWOS_COMPLEMENT }

Functions
int	ad405x_init (struct ad405x_dev **device, struct ad405x_init_param init_param)
	Initialize the communication device.

int	ad405x_remove (struct ad405x_dev *dev)
	Remove device and free the resources allocated by ad405x_init().

int	ad405x_soft_reset (struct ad405x_dev *dev)
	Soft reset of the device. For I3C, the I3C peripheral is not reset, keeping its dynamic address and any other I3C property.

int	ad405x_clear_reset_flags (struct ad405x_dev *dev)
	Clear reset flags.

int	ad405x_read (struct ad405x_dev dev, uint8_t addr, uint8_t data, uint8_t size)
	Read device registers.

int	ad405x_write (struct ad405x_dev dev, uint8_t addr, uint8_t data, uint8_t size)
	Write registers.

int	ad405x_get_adc (struct ad405x_dev dev, int32_t value)
	Get formatted ADC reading. If gp0 is set as data ready, will be used to delay the acquisition until the signal is deserted (SPI only).

int	ad405x_get_raw (struct ad405x_dev dev, uint32_t raw)
	Get raw ADC reading.

int	ad405x_get_sts_reg (struct ad405x_dev dev, uint8_t status_flags, uint8_t *intf_status_flags)
	Read the interface status and status registers.

int	ad405x_clear_sts_reg (struct ad405x_dev dev, uint8_t status_flags, uint8_t *intf_status_flags)
	Write to clear the interface status and status registers.

int	ad405x_test_scratch_pad (struct ad405x_dev *dev)
	Test the scratch pad register. A pseudo-random value to test against is defined at compile time.

int	ad405x_set_adc_mode (struct ad405x_dev *dev)
	Enter ADC Mode.

int	ad405x_set_burst_averaging_mode (struct ad405x_dev *dev)
	Enter Burst Averaging Mode.

int	ad405x_set_persistent_auto_mode (struct ad405x_dev *dev)
	Enter Persistent Auto Mode.

int	ad405x_set_nonpersistent_auto_mode (struct ad405x_dev *dev)
	Enter Non-Persistent Auto Mode.

int	ad405x_set_operation_mode (struct ad405x_dev *dev, enum ad405x_operation_mode mode)
	Set operation mode.

int	ad405x_set_sample_rate (struct ad405x_dev *dev, enum ad405x_sample_rate rate)
	Select sample rate for Burst and Autonomous Modes.

enum ad405x_sample_rate	ad405x_get_sample_rate (struct ad405x_dev *dev)
	Get sample rate for Burst and Autonomous Modes.

int	ad405x_set_avg_filter_length (struct ad405x_dev *dev, enum ad405x_avg_filter_l length)
	Set averaging filter window length.

enum ad405x_avg_filter_l	ad405x_get_avg_filter_length (struct ad405x_dev *dev)
	Get averaging filter window length.

int	ad405x_set_dev_en_polarity (struct ad405x_dev *dev, enum ad405x_dev_en_polarity polarity)
	Set DEV_EN signal polarity.

enum ad405x_dev_en_polarity	ad405x_get_dev_en_polarity (struct ad405x_dev *dev)
	Get DEV_EN signal polarity.

int	ad405x_set_dev_en_timer_pwr_on (struct ad405x_dev *dev, enum ad405x_dev_en_timer_pwr_on time)
	Set DEV_EN TIMER_PWR_ON.

enum ad405x_dev_en_timer_pwr_on	ad405x_get_dev_en_timer_pwr_on (struct ad405x_dev *dev)
	Get DEV_EN TIMER_PWR_ON.

int	ad405x_enable_invert_on_chop (struct ad405x_dev *dev)
	Enable INVERT_ON_CHOP.

int	ad405x_disable_invert_on_chop (struct ad405x_dev *dev)
	Disable INVERT_ON_CHOP.

enum ad405x_invert_on_chop	ad405x_get_invert_on_chop_state (struct ad405x_dev *dev)
	Get INVERT_ON_CHOP setting.

int	ad405x_set_gp_mode (struct ad405x_dev *dev, enum ad405x_gp_select gp, enum ad405x_gp_mode mode)
	Set GP mode.

enum ad405x_gp_mode	ad405x_get_gp_mode (struct ad405x_dev *dev, enum ad405x_gp_select gp)
	Get GP mode setting.

int	ad405x_set_data_format (struct ad405x_dev *dev, enum ad405x_out_data_format data_format)
	Set output data format.

int	ad405x_set_data_format_straight_binary (struct ad405x_dev *dev)
	Set ADC output data format as straight binary.

int	ad405x_set_data_format_twos_complement (struct ad405x_dev *dev)
	Set ADC output data format as two's complement.

enum ad405x_out_data_format	ad405x_get_data_format (struct ad405x_dev *dev)
	Get output data format setting.

int	ad405x_set_threshold (struct ad405x_dev dev, struct ad405x_thresh thresh)
	Set threshold configuration. A simple memory swap puts the ad405x_thresh strict into format to write the 6 registers of interest.

int	ad405x_get_threshold (struct ad405x_dev dev, struct ad405x_thresh thresh)
	Get threshold configuration.

int	ad405x_exit_command (struct ad405x_dev *dev)
	Send EXIT command (SPI only).

int	ad405x_trigger_adc_conv (struct ad405x_dev *dev)
	Trigger an ADC conversion (SPI only). Toggle the CNV pin to start the conversion.

int	ad405x_set_averaging_mode (struct ad405x_dev *dev)
	Enter Averaging Mode (SPI only).

int	ad405x_set_config_mode (struct ad405x_dev dev, enum ad405x_operation_mode mode)
	Enter Configuration Mode (SPI only).

int	ad405x_test_common_ccc (struct ad405x_dev *dev)
	Test the GETBCR, GETDCR, GETPID, AND GETSTATUS CCCs (I3C only). Compare received BCR and DCR against expected values.

int	ad405x_pool_ibi_config (struct ad405x_dev *dev)
	Pool IBI status and config registers (I3C only). Values are updated on the device descriptor.

int	ad405x_set_ibi_enable (struct ad405x_dev *dev, bool enable)
	Enable/disable IBI (I3C only).

int	ad405x_set_ibi_mask (struct ad405x_dev *dev, uint16_t en_mask)
	Set IBI mask (I3C only).

Detailed Description

Header file of AD405X Driver.

Author: George Mois (georg.nosp@m.e.mo.nosp@m.is@an.nosp@m.alog.nosp@m..com); Ribhu Das Purkayastha (ribhu.nosp@m..das.nosp@m.purka.nosp@m.yast.nosp@m.ha@an.nosp@m.alog.nosp@m..com); Jorge Marques (jorge.nosp@m..mar.nosp@m.ques@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ AD405X_ADC_DATA_FORMAT_MSK

#define AD405X_ADC_DATA_FORMAT_MSK NO_OS_BIT(7)

◆ AD405X_ADC_MODE

#define AD405X_ADC_MODE 0x00

◆ AD405X_ADC_MODES_MSK

#define AD405X_ADC_MODES_MSK NO_OS_GENMASK(1, 0)

◆ AD405X_AVERAGING_MODE

#define AD405X_AVERAGING_MODE NO_OS_BIT(1)

◆ AD405X_AVG_WIN_LEN_MSK

#define AD405X_AVG_WIN_LEN_MSK NO_OS_GENMASK(3, 0)

◆ AD405X_BUFF_SIZE

#define AD405X_BUFF_SIZE 7

◆ AD405X_BURST_AVERAGING_MODE

#define AD405X_BURST_AVERAGING_MODE NO_OS_BIT(0)

◆ AD405X_CLEAR_NOT_RDY_FLAG

#define AD405X_CLEAR_NOT_RDY_FLAG NO_OS_BIT(7)

◆ AD405X_CLEAR_RESET_FLAG

#define AD405X_CLEAR_RESET_FLAG NO_OS_BIT(6)

◆ AD405X_DEV_EN_POL_MSK

#define AD405X_DEV_EN_POL_MSK NO_OS_BIT(7)

◆ AD405X_ENTER_ADC_MODE

#define AD405X_ENTER_ADC_MODE NO_OS_BIT(0)

◆ AD405X_ENTER_ADC_MODE_MSK

#define AD405X_ENTER_ADC_MODE_MSK NO_OS_BIT(0)

◆ AD405X_ENTER_AUTO_MODE

#define AD405X_ENTER_AUTO_MODE NO_OS_BIT(2)

◆ AD405X_ENTER_AUTO_MODE_MSK

#define AD405X_ENTER_AUTO_MODE_MSK NO_OS_BIT(2)

◆ AD405X_FS_BURST_AUTO_MSK

#define AD405X_FS_BURST_AUTO_MSK NO_OS_GENMASK(7, 4)

◆ AD405X_GP0_MODE_MSK

#define AD405X_GP0_MODE_MSK NO_OS_GENMASK(2, 0)

◆ AD405X_GP1_MODE_MSK

#define AD405X_GP1_MODE_MSK NO_OS_GENMASK(6, 4)

◆ AD405X_I3C_BCR

#define AD405X_I3C_BCR 0x26

◆ AD405X_I3C_DCR

#define AD405X_I3C_DCR 0x00

◆ AD405X_I3C_PID

#define AD405X_I3C_PID ( x )

Value:

(AD405X_I3C_PID_ | AD405X_I3C_PID_INSTANCE_ID(x))

AD405X_I3C_PID_INSTANCE_ID

#define AD405X_I3C_PID_INSTANCE_ID(x)

Definition ad405x.h:139

AD405X_I3C_PID_

#define AD405X_I3C_PID_

Definition ad405x.h:138

◆ AD405X_I3C_PID_

#define AD405X_I3C_PID_ 0x02ee00700000

◆ AD405X_I3C_PID_INSTANCE_ID

#define AD405X_I3C_PID_INSTANCE_ID ( x )

Value:

(((uint64_t)x & 0x7) << 12)

◆ AD405X_IBI_EN_CONV_TRIGGER

#define AD405X_IBI_EN_CONV_TRIGGER ( x )

Value:

(((x) & 1) << 10)

◆ AD405X_IBI_EN_CONV_TRIGGER_GET

#define AD405X_IBI_EN_CONV_TRIGGER_GET ( x )

Value:

(((x) >> 10) & 1)

◆ AD405X_IBI_EN_MAX_SET

#define AD405X_IBI_EN_MAX_SET ( x )

Value:

(((x) & 1) << 9)

◆ AD405X_IBI_EN_MIN_SET

#define AD405X_IBI_EN_MIN_SET ( x )

Value:

(((x) & 1) << 8)

◆ AD405X_IBI_STS_EN

#define AD405X_IBI_STS_EN ( x )

Value:

((x) & 1)

◆ AD405X_INTF_STATUS_FLAGS_MSK

#define AD405X_INTF_STATUS_FLAGS_MSK ( x )

Value:

(0x9F & x)

◆ AD405X_INVERT_ON_CHOP_MSK

#define AD405X_INVERT_ON_CHOP_MSK NO_OS_BIT(3)

◆ AD405X_ISTS_NOT_RDY_ERROR

#define AD405X_ISTS_NOT_RDY_ERROR ( x )

Value:

(((x) >> 7) & 1)

◆ AD405X_NONPERSISTENT_AUTO_MODE

#define AD405X_NONPERSISTENT_AUTO_MODE NO_OS_GENMASK(1, 0)

◆ AD405X_PERSISTENT_AUTO_MODE

#define AD405X_PERSISTENT_AUTO_MODE NO_OS_GENMASK(1, 0)

◆ AD405X_PROD_ID_0_RESET

#define AD405X_PROD_ID_0_RESET ( x )

Value:

(0x70 + x)

◆ AD405X_PROD_ID_1_RESET

#define AD405X_PROD_ID_1_RESET 0x00

◆ AD405X_REG_ADC_CONFIG

#define AD405X_REG_ADC_CONFIG 0x22

◆ AD405X_REG_ADC_IBI_EN

#define AD405X_REG_ADC_IBI_EN 0x31

◆ AD405X_REG_ADC_MODES

#define AD405X_REG_ADC_MODES 0x21

◆ AD405X_REG_AVG_CONFIG

#define AD405X_REG_AVG_CONFIG 0x23

◆ AD405X_REG_CHOP_CONFIG

#define AD405X_REG_CHOP_CONFIG 0x26

◆ AD405X_REG_CONV_AUTO

#define AD405X_REG_CONV_AUTO 0x58

◆ AD405X_REG_CONV_READ

#define AD405X_REG_CONV_READ ( x )

Value:

(0x50 + x)

◆ AD405X_REG_CONV_TRIGGER

#define AD405X_REG_CONV_TRIGGER ( x )

Value:

(0x54 + x)

◆ AD405X_REG_DEVICE_CONFIG

#define AD405X_REG_DEVICE_CONFIG 0x02

◆ AD405X_REG_DEVICE_STATUS

#define AD405X_REG_DEVICE_STATUS 0x41

◆ AD405X_REG_FUSE_CRC

#define AD405X_REG_FUSE_CRC 0x40

◆ AD405X_REG_GPIO_CONFIG

#define AD405X_REG_GPIO_CONFIG 0x24

◆ AD405X_REG_GRP_ADDR

#define AD405X_REG_GRP_ADDR 0x47

◆ AD405X_REG_IBI_STATUS

#define AD405X_REG_IBI_STATUS 0x48

◆ AD405X_REG_INTF_CONFIG_A

#define AD405X_REG_INTF_CONFIG_A 0x00

◆ AD405X_REG_INTF_IBI_EN

#define AD405X_REG_INTF_IBI_EN 0x30

◆ AD405X_REG_INTF_STATUS

#define AD405X_REG_INTF_STATUS 0x11

◆ AD405X_REG_INTR_CONFIG

#define AD405X_REG_INTR_CONFIG 0x25

◆ AD405X_REG_MAX_HYST_REG

#define AD405X_REG_MAX_HYST_REG 0x2C

◆ AD405X_REG_MAX_INTR

#define AD405X_REG_MAX_INTR ( x )

Value:

(0x42 + x)

◆ AD405X_REG_MAX_THRESH_REG

#define AD405X_REG_MAX_THRESH_REG ( x )

Value:

(0x28 + x)

◆ AD405X_REG_MIN_HYST_REG

#define AD405X_REG_MIN_HYST_REG 0x2D

◆ AD405X_REG_MIN_INTR

#define AD405X_REG_MIN_INTR ( x )

Value:

(0x43 + x)

◆ AD405X_REG_MIN_THRESH_REG

#define AD405X_REG_MIN_THRESH_REG ( x )

Value:

(0x30 + x)

◆ AD405X_REG_MODE_SET

#define AD405X_REG_MODE_SET 0x20

◆ AD405X_REG_MON_VAL_REG

#define AD405X_REG_MON_VAL_REG ( x )

Value:

(0x2E + x)

◆ AD405X_REG_PROD_ID_0

#define AD405X_REG_PROD_ID_0 0x04

◆ AD405X_REG_PROD_ID_1

#define AD405X_REG_PROD_ID_1 0x05

◆ AD405X_REG_SCRATCH_PAD

#define AD405X_REG_SCRATCH_PAD 0x0A

◆ AD405X_REG_STREAM_MODE

#define AD405X_REG_STREAM_MODE 0x0E

◆ AD405X_REG_TGT_ADDR

#define AD405X_REG_TGT_ADDR 0x46

◆ AD405X_REG_TIMER_CONFIG

#define AD405X_REG_TIMER_CONFIG 0x27

◆ AD405X_REG_VENDOR_H

#define AD405X_REG_VENDOR_H 0x0D

◆ AD405X_REG_VENDOR_L

#define AD405X_REG_VENDOR_L 0x0C

◆ AD405X_RESET_CODE

#define AD405X_RESET_CODE 0x81

◆ AD405X_SPI_READ

#define AD405X_SPI_READ NO_OS_BIT(7)

◆ AD405X_STATUS_FLAGS_MSK

#define AD405X_STATUS_FLAGS_MSK ( x )

Value:

(0x2F & x)

◆ AD405X_STS_DEVICE_READY

#define AD405X_STS_DEVICE_READY ( x )

Value:

(((x) >> 7) & 1)

◆ AD405X_STS_DEVICE_RESET

#define AD405X_STS_DEVICE_RESET ( x )

Value:

(((x) >> 6) & 1)

◆ AD405X_TIMER_PWR_ON_MSK

#define AD405X_TIMER_PWR_ON_MSK NO_OS_GENMASK(3, 0)

◆ AD405X_VENDOR_I3C_H_RESET

#define AD405X_VENDOR_I3C_H_RESET 0x01

◆ AD405X_VENDOR_I3C_L_RESET

#define AD405X_VENDOR_I3C_L_RESET 0x77

◆ AD405X_VENDOR_SPI_H_RESET

#define AD405X_VENDOR_SPI_H_RESET 0x04

◆ AD405X_VENDOR_SPI_L_RESET

#define AD405X_VENDOR_SPI_L_RESET 0x56

Enumeration Type Documentation

◆ ad405x_avg_filter_l

enum ad405x_avg_filter_l

AD405X averaging filter window length

Enumerator
AD405X_LENGTH_2
AD405X_LENGTH_4
AD405X_LENGTH_8
AD405X_LENGTH_16
AD405X_LENGTH_32
AD405X_LENGTH_64
AD405X_LENGTH_128
AD405X_LENGTH_256
AD405X_LENGTH_512
AD405X_LENGTH_1024
AD405X_LENGTH_2048
AD405X_LENGTH_4096

◆ ad405x_comm_type

enum ad405x_comm_type

Variants comm options

Enumerator
AD405X_SPI_COMM
AD405X_I3C_COMM

◆ ad405x_dev_en_polarity

enum ad405x_dev_en_polarity

AD405X DEV_EN polarity

Enumerator
AD405X_DEV_EN_ACTIVE_LOW
AD405X_DEV_EN_ACTIVE_HIGH

◆ ad405x_dev_en_timer_pwr_on

enum ad405x_dev_en_timer_pwr_on

AD405X DEV_EN power-on timer setting

Enumerator
AD405X_DEV_EN_TIME_250_NS
AD405X_DEV_EN_TIME_1_US
AD405X_DEV_EN_TIME_3_3_US
AD405X_DEV_EN_TIME_10_US
AD405X_DEV_EN_TIME_33_US
AD405X_DEV_EN_TIME_100_US
AD405X_DEV_EN_TIME_333_US
AD405X_DEV_EN_TIME_1_MS
AD405X_DEV_EN_TIME_2_MS
AD405X_DEV_EN_TIME_3_MS
AD405X_DEV_EN_TIME_4_MS
AD405X_DEV_EN_TIME_5_MS
AD405X_DEV_EN_TIME_6_MS
AD405X_DEV_EN_TIME_7_MS
AD405X_DEV_EN_TIME_8_MS
AD405X_DEV_EN_TIME_9_MS

◆ ad405x_gp_mode

enum ad405x_gp_mode

AD405X GP0, GP1 mode

Enumerator
AD405X_GP_MODE_HIGH_Z
AD405X_GP_MODE_INTR
AD405X_GP_MODE_DRDY
AD405X_GP_MODE_DEV_EN
AD405X_GP_MODE_CHOP
AD405X_GP_MODE_LOW
AD405X_GP_MODE_HIGH
AD405X_GP_MODE_DEV_RDY

◆ ad405x_gp_select

enum ad405x_gp_select

AD405X GP selection

Enumerator
AD405X_GP_0
AD405X_GP_1

◆ ad405x_invert_on_chop

enum ad405x_invert_on_chop

AD405X INVERT_ON_CHOP status

Enumerator
AD405X_INVERT_ON_CHOP_DISABLED
AD405X_INVERT_ON_CHOP_ENABLED

◆ ad405x_operation_mode

enum ad405x_operation_mode

AD405X modes of operations

Enumerator
AD405X_ADC_MODE_OP
AD405X_BURST_AVERAGING_MODE_OP
AD405X_AVERAGING_MODE_OP
AD405X_CONFIG_MODE_OP
AD405X_PERSISTENT_AUTO_MODE_OP
AD405X_NONPERSISTENT_AUTO_MODE_OP

◆ ad405x_out_data_format

enum ad405x_out_data_format

AD405X output data format selection

Enumerator
AD405X_STRAIGHT_BINARY
AD405X_TWOS_COMPLEMENT

◆ ad405x_sample_rate

enum ad405x_sample_rate

AD405X sample rate for burst and autonomous modes

Enumerator
AD405X_2_MSPS
AD405X_1_MSPS
AD405X_333_KSPS
AD405X_100_KSPS
AD405X_33_KSPS
AD405X_10_KSPS
AD405X_3_KSPS
AD405X_1_KSPS
AD405X_500_SPS
AD405X_333_SPS
AD405X_250_SPS
AD405X_200_SPS
AD405X_166_SPS
AD405X_140_SPS
AD405X_125_SPS
AD405X_111_SPS

◆ ad405x_type

enum ad405x_type

Available AD405X-AD406X parts

Enumerator
ID_AD4050
ID_AD4052
ID_AD4056
ID_AD4058
ID_AD4060
ID_AD4062

Function Documentation

◆ ad405x_clear_reset_flags()

int ad405x_clear_reset_flags ( struct ad405x_dev * dev )

Clear reset flags.

Clear reset flags of device

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_clear_sts_reg()

int ad405x_clear_sts_reg	(	struct ad405x_dev *	dev,
		uint8_t *	status_flags,
		uint8_t *	intf_status_flags )

Write to clear the interface status and status registers.

Write to clear the interface status and status registers

Parameters

dev	- The device descriptor.
status_flags	- Status register value (optional).
intf_status_flags	- Interface register value (optional).

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_disable_invert_on_chop()

int ad405x_disable_invert_on_chop ( struct ad405x_dev * dev )

Disable INVERT_ON_CHOP.

Disable INVERT_ON_CHOP

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

◆ ad405x_enable_invert_on_chop()

int ad405x_enable_invert_on_chop ( struct ad405x_dev * dev )

Enable INVERT_ON_CHOP.

Enable INVERT_ON_CHOP

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

◆ ad405x_exit_command()

int ad405x_exit_command ( struct ad405x_dev * dev )

Send EXIT command (SPI only).

Send EXIT command (SPI only)

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_get_adc()

int ad405x_get_adc	(	struct ad405x_dev *	dev,
		int32_t *	value )

Get formatted ADC reading. If gp0 is set as data ready, will be used to delay the acquisition until the signal is deserted (SPI only).

Get formatted ADC reading

Parameters

dev	- The device descriptor.
value	- ADC value.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_get_avg_filter_length()

enum ad405x_avg_filter_l ad405x_get_avg_filter_length ( struct ad405x_dev * dev )

Get averaging filter window length.

Get averaging filter window length

Parameters

dev	- The device descriptor.

Returns: Average filter value or -EINVAL if dev is invalid.

◆ ad405x_get_data_format()

enum ad405x_out_data_format ad405x_get_data_format ( struct ad405x_dev * dev )

Get output data format setting.

Get ADC output data format

Parameters

dev	- The device descriptor.

Returns: DATA_FORMAT setting or -EINVAL if dev is invalid.

◆ ad405x_get_dev_en_polarity()

enum ad405x_dev_en_polarity ad405x_get_dev_en_polarity ( struct ad405x_dev * dev )

Get DEV_EN signal polarity.

Get DEV_EN signal polarity

Parameters

dev	- The device descriptor.

Returns: DEV_EN power-on timer setting or -EINVAL if dev is invalid.

◆ ad405x_get_dev_en_timer_pwr_on()

enum ad405x_dev_en_timer_pwr_on ad405x_get_dev_en_timer_pwr_on ( struct ad405x_dev * dev )

Get DEV_EN TIMER_PWR_ON.

Get DEV_EN TIMER_PWR_ON

Parameters

dev	- The device descriptor.

Returns: DEV_EN TIMER_PWR_ON setting or -EINVAL if dev is invalid.

◆ ad405x_get_gp_mode()

enum ad405x_gp_mode ad405x_get_gp_mode	(	struct ad405x_dev *	dev,
		enum ad405x_gp_select	gp )

Get GP mode setting.

Get GP mode setting

Parameters

dev	- The device descriptor.
gp	- GP1/GP0 select.

Returns: GP mode or -EINVAL if dev or gp is invalid.

◆ ad405x_get_invert_on_chop_state()

enum ad405x_invert_on_chop ad405x_get_invert_on_chop_state ( struct ad405x_dev * dev )

Get INVERT_ON_CHOP setting.

Get INVERT_ON_CHOP setting

Parameters

dev	- The device descriptor.

Returns: INVERT_ON_CHOP setting or -EINVAL if dev is invalid.

◆ ad405x_get_raw()

int ad405x_get_raw	(	struct ad405x_dev *	dev,
		uint32_t *	raw )

Get raw ADC reading.

Get raw ADC reading

Parameters

dev	- The device descriptor.
raw	- Raw ADC data.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_get_sample_rate()

enum ad405x_sample_rate ad405x_get_sample_rate ( struct ad405x_dev * dev )

Get sample rate for Burst and Autonomous Modes.

Get sample rate for Burst and Autonomous Modes

Parameters

dev	- The device descriptor.

Returns: Sample rate value or -EINVAL if dev is invalid.

◆ ad405x_get_sts_reg()

int ad405x_get_sts_reg	(	struct ad405x_dev *	dev,
		uint8_t *	status_flags,
		uint8_t *	intf_status_flags )

Read the interface status and status registers.

Reads the interface status and status registers

Parameters

dev	- The device descriptor.
status_flags	- Status register value.
intf_status_flags	- Interface register value (optional).

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_get_threshold()

int ad405x_get_threshold	(	struct ad405x_dev *	dev,
		struct ad405x_thresh *	thresh )

Get threshold configuration.

Get threshold configuration

Parameters

dev	- The device descriptor.
thresh	- The threshold configuration structure.

Returns: 0 in case of success, negative error code otherwise.

◆ ad405x_init()

int ad405x_init	(	struct ad405x_dev **	device,
		struct ad405x_init_param	init_param )

Initialize the communication device.

Initialize the device

Parameters

device	- The device descriptor.
init_param	- The device initial descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_pool_ibi_config()

int ad405x_pool_ibi_config ( struct ad405x_dev * dev )

Pool IBI status and config registers (I3C only). Values are updated on the device descriptor.

Pool IBI status and config registers (I3C only)

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_read()

int ad405x_read	(	struct ad405x_dev *	dev,
		uint8_t	addr,
		uint8_t *	data,
		uint8_t	size )

Read device registers.

Read device registers

Parameters

dev	- The device descriptor.
addr	- Address of the base register.
data	- The read data buffer
size	- The number of bytes to be read.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_remove()

int ad405x_remove ( struct ad405x_dev * dev )

Remove device and free the resources allocated by ad405x_init().

Remove device and free resources allocated by ad405x_init()

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_set_adc_mode()

int ad405x_set_adc_mode ( struct ad405x_dev * dev )

Enter ADC Mode.

Enter ADC Mode

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_set_averaging_mode()

int ad405x_set_averaging_mode ( struct ad405x_dev * dev )

Enter Averaging Mode (SPI only).

Enter Averaging Mode (SPI only)

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_set_avg_filter_length()

int ad405x_set_avg_filter_length	(	struct ad405x_dev *	dev,
		enum ad405x_avg_filter_l	length )

Set averaging filter window length.

Set averaging filter window length

Parameters

dev	- The device descriptor.
length	- Averaging filter length value.

Returns: 0 in case of success, negative error code otherwise.

◆ ad405x_set_burst_averaging_mode()

int ad405x_set_burst_averaging_mode ( struct ad405x_dev * dev )

Enter Burst Averaging Mode.

Enter Burst Averaging Mode

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_set_config_mode()

int ad405x_set_config_mode	(	struct ad405x_dev *	dev,
		enum ad405x_operation_mode *	mode )

Enter Configuration Mode (SPI only).

Enter Configuration Mode (SPI only)

Parameters

dev	- The device descriptor.
mode	- Store the current op mode, to resume later (optional).

Returns: 0 in case of success, negative error code otherwise.

◆ ad405x_set_data_format()

int ad405x_set_data_format	(	struct ad405x_dev *	dev,
		enum ad405x_out_data_format	data_format )

Set output data format.

Set ADC output data format

Parameters

dev	- The device descriptor.
data_format	- Format select.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_set_data_format_straight_binary()

int ad405x_set_data_format_straight_binary ( struct ad405x_dev * dev )

Set ADC output data format as straight binary.

Set ADC output data format as straight binary

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

◆ ad405x_set_data_format_twos_complement()

int ad405x_set_data_format_twos_complement ( struct ad405x_dev * dev )

Set ADC output data format as two's complement.

Set ADC output data format as two's complement

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

◆ ad405x_set_dev_en_polarity()

int ad405x_set_dev_en_polarity	(	struct ad405x_dev *	dev,
		enum ad405x_dev_en_polarity	polarity )

Set DEV_EN signal polarity.

Set DEV_EN signal polarity

Parameters

dev	- The device descriptor.
polarity	- DEV_EN signal polarity.

Returns: 0 in case of success, negative error code otherwise.

◆ ad405x_set_dev_en_timer_pwr_on()

int ad405x_set_dev_en_timer_pwr_on	(	struct ad405x_dev *	dev,
		enum ad405x_dev_en_timer_pwr_on	time )

Set DEV_EN TIMER_PWR_ON.

Set DEV_EN TIMER_PWR_ON

Parameters

dev	- The device descriptor.
time	- DEV_EN power-on timer setting.

Returns: 0 in case of success, negative error code otherwise.

◆ ad405x_set_gp_mode()

int ad405x_set_gp_mode	(	struct ad405x_dev *	dev,
		enum ad405x_gp_select	gp,
		enum ad405x_gp_mode	mode )

Set GP mode.

Set GP mode

Parameters

dev	- The device descriptor.
gp	- GP1/GP0 select.
mode	- mode select.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_set_ibi_enable()

int ad405x_set_ibi_enable	(	struct ad405x_dev *	dev,
		bool	enable )

Enable/disable IBI (I3C only).

Enable/disable IBI (I3C only)

Parameters

dev	- The device descriptor.
enable	- Enable IBI.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_set_ibi_mask()

int ad405x_set_ibi_mask	(	struct ad405x_dev *	dev,
		uint16_t	en_mask )

Set IBI mask (I3C only).

Set IBI mask (I3C only)

Parameters

dev	- The device descriptor.
en_mask	- Enable interface and ADC flags.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_set_nonpersistent_auto_mode()

int ad405x_set_nonpersistent_auto_mode ( struct ad405x_dev * dev )

Enter Non-Persistent Auto Mode.

Enter Non Persistent Auto Mode

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_set_operation_mode()

int ad405x_set_operation_mode	(	struct ad405x_dev *	dev,
		enum ad405x_operation_mode	mode )

Set operation mode.

Set operation mode

Parameters

dev	- The device descriptor.
mode	- Operation mode.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_set_persistent_auto_mode()

int ad405x_set_persistent_auto_mode ( struct ad405x_dev * dev )

Enter Persistent Auto Mode.

Enter Persistent Auto Mode

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_set_sample_rate()

int ad405x_set_sample_rate	(	struct ad405x_dev *	dev,
		enum ad405x_sample_rate	rate )

Select sample rate for Burst and Autonomous Modes.

Select sample rate for Burst and Autonomous Modes

Parameters

dev	- The device descriptor.
rate	- The sample rate.

Returns: 0 in case of success, negative error code otherwise.

◆ ad405x_set_threshold()

int ad405x_set_threshold	(	struct ad405x_dev *	dev,
		struct ad405x_thresh *	thresh )

Set threshold configuration. A simple memory swap puts the ad405x_thresh strict into format to write the 6 registers of interest.

Set threshold configuration

Parameters

dev	- The device descriptor.
thresh	- The threshold configuration structure.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_soft_reset()

int ad405x_soft_reset ( struct ad405x_dev * dev )

Soft reset of the device. For I3C, the I3C peripheral is not reset, keeping its dynamic address and any other I3C property.

Soft reset the device

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_test_common_ccc()

int ad405x_test_common_ccc ( struct ad405x_dev * dev )

Test the GETBCR, GETDCR, GETPID, AND GETSTATUS CCCs (I3C only). Compare received BCR and DCR against expected values.

Test common CCCs (I3C only)

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

◆ ad405x_test_scratch_pad()

int ad405x_test_scratch_pad ( struct ad405x_dev * dev )

Test the scratch pad register. A pseudo-random value to test against is defined at compile time.

Test scratch register pad register

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_trigger_adc_conv()

int ad405x_trigger_adc_conv ( struct ad405x_dev * dev )

Trigger an ADC conversion (SPI only). Toggle the CNV pin to start the conversion.

Trigger an ADC conversion (SPI only)

Parameters

dev	- The device descriptor.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad405x_write()

int ad405x_write	(	struct ad405x_dev *	dev,
		uint8_t	addr,
		uint8_t *	data,
		uint8_t	size )

Write registers.

Write device registers

Parameters

dev	- The device descriptor.
addr	- Address of the base register.
data	- The data which is going to be written.
size	- The number of bytes to be written.

Returns: 0 in case of success, negative error code otherwise.

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Classes

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ AD405X_ADC_DATA_FORMAT_MSK

◆ AD405X_ADC_MODE

◆ AD405X_ADC_MODES_MSK

◆ AD405X_AVERAGING_MODE

◆ AD405X_AVG_WIN_LEN_MSK

◆ AD405X_BUFF_SIZE

◆ AD405X_BURST_AVERAGING_MODE

◆ AD405X_CLEAR_NOT_RDY_FLAG

◆ AD405X_CLEAR_RESET_FLAG

◆ AD405X_DEV_EN_POL_MSK

◆ AD405X_ENTER_ADC_MODE

◆ AD405X_ENTER_ADC_MODE_MSK

◆ AD405X_ENTER_AUTO_MODE

◆ AD405X_ENTER_AUTO_MODE_MSK

◆ AD405X_FS_BURST_AUTO_MSK

◆ AD405X_GP0_MODE_MSK

◆ AD405X_GP1_MODE_MSK

◆ AD405X_I3C_BCR

◆ AD405X_I3C_DCR

◆ AD405X_I3C_PID

◆ AD405X_I3C_PID_

◆ AD405X_I3C_PID_INSTANCE_ID

◆ AD405X_IBI_EN_CONV_TRIGGER

◆ AD405X_IBI_EN_CONV_TRIGGER_GET

◆ AD405X_IBI_EN_MAX_SET

◆ AD405X_IBI_EN_MIN_SET

◆ AD405X_IBI_STS_EN

◆ AD405X_INTF_STATUS_FLAGS_MSK

◆ AD405X_INVERT_ON_CHOP_MSK

◆ AD405X_ISTS_NOT_RDY_ERROR

◆ AD405X_NONPERSISTENT_AUTO_MODE

◆ AD405X_PERSISTENT_AUTO_MODE

◆ AD405X_PROD_ID_0_RESET

◆ AD405X_PROD_ID_1_RESET

◆ AD405X_REG_ADC_CONFIG

◆ AD405X_REG_ADC_IBI_EN

◆ AD405X_REG_ADC_MODES

◆ AD405X_REG_AVG_CONFIG

◆ AD405X_REG_CHOP_CONFIG

◆ AD405X_REG_CONV_AUTO

◆ AD405X_REG_CONV_READ

◆ AD405X_REG_CONV_TRIGGER

◆ AD405X_REG_DEVICE_CONFIG

◆ AD405X_REG_DEVICE_STATUS

◆ AD405X_REG_FUSE_CRC

◆ AD405X_REG_GPIO_CONFIG

◆ AD405X_REG_GRP_ADDR

◆ AD405X_REG_IBI_STATUS

◆ AD405X_REG_INTF_CONFIG_A

◆ AD405X_REG_INTF_IBI_EN

◆ AD405X_REG_INTF_STATUS

◆ AD405X_REG_INTR_CONFIG

◆ AD405X_REG_MAX_HYST_REG

◆ AD405X_REG_MAX_INTR

◆ AD405X_REG_MAX_THRESH_REG

◆ AD405X_REG_MIN_HYST_REG

◆ AD405X_REG_MIN_INTR

◆ AD405X_REG_MIN_THRESH_REG

◆ AD405X_REG_MODE_SET

◆ AD405X_REG_MON_VAL_REG

◆ AD405X_REG_PROD_ID_0

◆ AD405X_REG_PROD_ID_1

◆ AD405X_REG_SCRATCH_PAD

◆ AD405X_REG_STREAM_MODE

◆ AD405X_REG_TGT_ADDR

◆ AD405X_REG_TIMER_CONFIG

◆ AD405X_REG_VENDOR_H

◆ AD405X_REG_VENDOR_L

◆ AD405X_RESET_CODE

◆ AD405X_SPI_READ

◆ AD405X_STATUS_FLAGS_MSK

◆ AD405X_STS_DEVICE_READY

◆ AD405X_STS_DEVICE_RESET

◆ AD405X_TIMER_PWR_ON_MSK