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#define | ECOMM 70 |
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#define | AD4170_R1B (1ul << 16) |
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#define | AD4170_R2B (2ul << 16) |
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#define | AD4170_R3B (3ul << 16) |
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#define | AD4170_R4B (4ul << 16) |
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#define | AD4170_TRANSF_LEN(x) ((x) >> 16) |
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#define | AD4170_ADDR(x) ((x) & 0xFFFF) |
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#define | AD4170_SPI_SYNC_PATTERN 0x2645 |
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#define | AD4170_REG_READ_6(x) (((x) & 0x3F) | 0x40) |
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#define | AD4170_REG_WRITE_6(x) ((x) & 0x3F) |
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#define | AD4170_REG_READ_14(x) (((x) & 0x3FFF) | 0x4000) |
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#define | AD4170_REG_WRITE_14(x) ((x) & 0x3FFF) |
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#define | AD4170_REG_INTERFACE_CONFIG_A (AD4170_R1B | 0x00) |
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#define | AD4170_REG_INTERFACE_CONFIG_B (AD4170_R1B | 0x01) |
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#define | AD4170_REG_DEVICE_CONFIG (AD4170_R1B | 0x02) |
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#define | AD4170_REG_CHIP_TYPE (AD4170_R1B | 0x03) |
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#define | AD4170_REG_PRODUCT_ID_L (AD4170_R1B | 0x04) |
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#define | AD4170_REG_PRODUCT_ID_H (AD4170_R1B | 0x05) |
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#define | AD4170_REG_CHIP_GRADE (AD4170_R1B | 0x06) |
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#define | AD4170_REG_SCRATCH_PAD (AD4170_R1B | 0x0a) |
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#define | AD4170_REG_SPI_REVISION (AD4170_R1B | 0x0b) |
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#define | AD4170_REG_VENDOR_L (AD4170_R1B | 0x0c) |
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#define | AD4170_REG_VENDOR_H (AD4170_R1B | 0x0d) |
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#define | AD4170_REG_INTERFACE_CONFIG_C (AD4170_R1B | 0x10) |
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#define | AD4170_REG_INTERFACE_STATUS_A (AD4170_R1B | 0x11) |
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#define | AD4170_REG_DATA_STATUS (AD4170_R2B | 0x14) |
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#define | AD4170_REG_DATA_16b (AD4170_R2B | 0x16) |
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#define | AD4170_REG_DATA_16b_STATUS (AD4170_R3B | 0x18) |
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#define | AD4170_REG_DATA_24b (AD4170_R3B | 0x1c) |
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#define | AD4170_REG_DATA_24b_STATUS (AD4170_R4B | 0x20) |
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#define | AD4170_REG_DATA_32b (AD4170_R4B | 0x24) |
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#define | AD4170_REG_DATA_PER_CHANNEL(ch) (AD4170_R3B | (0x28 + 4 * (ch))) |
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#define | AD4170_REG_PIN_MUXING (AD4170_R2B | 0x68) |
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#define | AD4170_REG_CLOCK_CTRL (AD4170_R2B | 0x6a) |
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#define | AD4170_REG_STANDBY_CTRL (AD4170_R2B | 0x6c) |
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#define | AD4170_REG_POWER_DOWN_SW (AD4170_R2B | 0x6e) |
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#define | AD4170_REG_ADC_CTRL (AD4170_R2B | 0x70) |
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#define | AD4170_REG_ERROR_EN (AD4170_R2B | 0x72) |
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#define | AD4170_REG_ERROR (AD4170_R2B | 0x74) |
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#define | AD4170_REG_CHANNEL_EN (AD4170_R2B | 0x78) |
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#define | AD4170_REG_ADC_CHANNEL_SETUP(ch) (AD4170_R2B | (0x80 + 4 * (ch))) |
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#define | AD4170_REG_ADC_CHANNEL_MAP(ch) (AD4170_R2B | (0x82 + 4 * (ch))) |
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#define | AD4170_REG_ADC_SETUPS_MISC(n) (AD4170_R2B | (0xc0 + 14 * (n))) |
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#define | AD4170_REG_ADC_SETUPS_AFE(n) (AD4170_R2B | (0xc2 + 14 * (n))) |
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#define | AD4170_REG_ADC_SETUPS_FILTER(n) (AD4170_R2B | (0xc4 + 14 * (n))) |
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#define | AD4170_REG_ADC_SETUPS_FILTER_FS(n) (AD4170_R2B | (0xc6 + 14 * (n))) |
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#define | AD4170_REG_ADC_SETUPS_OFFSET(n) (AD4170_R3B | (0xc8 + 14 * (n))) |
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#define | AD4170_REG_ADC_SETUPS_GAIN(n) (AD4170_R3B | (0xcb + 14 * (n))) |
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#define | AD4170_REG_REF_CONTROL (AD4170_R2B | 0x130) |
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#define | AD4170_REG_V_BIAS (AD4170_R2B | 0x134) |
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#define | AD4170_REG_I_PULLUP (AD4170_R2B | 0x136) |
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#define | AD4170_REG_CURRENT_SOURCE(n) (AD4170_R2B | (0x138 + 2 * (n))) |
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#define | AD4170_REG_FIR_CONTROL (AD4170_R2B | 0x140) |
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#define | AD4170_REG_COEFF_WRITE_DATA (AD4170_R4B | 0x143) |
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#define | AD4170_REG_COEFF_READ_DATA (AD4170_R4B | 0x147) |
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#define | AD4170_REG_COEFF_ADDRESS (AD4170_R2B | 0x14b) |
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#define | AD4170_REG_COEFF_WRRD_STB (AD4170_R2B | 0x14d) |
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#define | AD4170_REG_DAC_SPAN (AD4170_R2B | 0x150) |
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#define | AD4170_REG_DAC_CHANNEL_EN (AD4170_R2B | 0x152) |
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#define | AD4170_REG_DAC_HW_TOGGLE_MASK (AD4170_R2B | 0x154) |
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#define | AD4170_REG_DAC_HW_LDAC_MASK (AD4170_R2B | 0x156) |
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#define | AD4170_REG_DAC_DATA(ch) (AD4170_R2B | (0x158 + 2 * (ch))) |
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#define | AD4170_REG_DAC_SW_TOGGLE_TRIGGERS (AD4170_R2B | 0x168) |
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#define | AD4170_REG_DAC_SW_LDAC_TRIGGERS (AD4170_R2B | 0x16a) |
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#define | AD4170_REG_DAC_INPUTA(ch) (AD4170_R2B | (0x16c + 2 * (ch))) |
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#define | AD4170_REG_DAC_INPUTB(ch) (AD4170_R2B | (0x17c + 2 * (ch))) |
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#define | AD4170_REG_GPIO_MODE (AD4170_R2B | 0x190) |
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#define | AD4170_REG_OUTPUT_DATA (AD4170_R2B | 0x192) |
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#define | AD4170_REG_INPUT_DATA (AD4170_R2B | 0x194) |
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#define | AD4170_SW_RESET_MSK NO_OS_BIT(7) |
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#define | AD4170_ADDR_ASCENSION_MSK NO_OS_BIT(5) |
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#define | AD4170_SDO_ENABLE_MSK NO_OS_BIT(4) |
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#define | AD4170_SW_RESETX_MSK NO_OS_BIT(0) |
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#define | AD4170_INTERFACE_CONFIG_B_SINGLE_INST_MSK NO_OS_BIT(7) |
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#define | AD4170_INTERFACE_CONFIG_B_SHORT_INSTRUCTION_MSK NO_OS_BIT(3) |
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#define | AD4170_INTERFACE_CONFIG_B_SHORT_INSTRUCTION(x) (((x) & 0x1) << 3) |
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#define | AD4170_INTERFACE_CONFIG_C_CRC_MSK (NO_OS_BIT(7) | NO_OS_BIT(6) | NO_OS_BIT(1) | NO_OS_BIT(0)) |
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#define | AD4170_INTERFACE_CONFIG_C_CRC(x) (((~x) & 0x3) | (((x) << 6) & 0xC0)) |
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#define | AD4170_INTERFACE_CONFIG_C_STRICT_REG_ACCESS_MSK NO_OS_BIT(5) |
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#define | AD4170_INTERFACE_CONFIG_C_STRICT_REG_ACCESS(x) (((x) & 0x1) << 5) |
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#define | AD4170_CRC8_POLYNOMIAL 0x7 |
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#define | AD4170_CRC8_INITIAL_VALUE 0xA5 |
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#define | AD4170_INTERFACE_STATUS_A_NOT_READY_ERR_MSK NO_OS_BIT(7) |
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#define | AD4170_INTERFACE_STATUS_A_CLOCK_COUNT_ERR_MSK NO_OS_BIT(4) |
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#define | AD4170_INTERFACE_STATUS_A_CRC_ERR_MSK NO_OS_BIT(3) |
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#define | AD4170_INTERFACE_STATUS_A_INVALID_ACCESS_ERR_MSK NO_OS_BIT(2) |
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#define | AD4170_INTERFACE_STATUS_A_PARTIAL_ACCESS_ERR_MSK NO_OS_BIT(1) |
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#define | AD4170_INTERFACE_STATUS_A_ADDR_INVALID_ERR_MSK NO_OS_BIT(0) |
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#define | AD4170_PRODUCT_ID_L_VALUE 0x40 |
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#define | AD4170_PRODUCT_ID_H_VALUE 0x0 |
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#define | AD4190_PRODUCT_ID_L_VALUE 0x48 |
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#define | AD4190_PRODUCT_ID_H_VALUE 0x0 |
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#define | AD4170_DATA_STATUS_MASTER_ERR_S_MSK NO_OS_BIT(7) |
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#define | AD4170_DATA_STATUS_POR_FLAG_S_MSK NO_OS_BIT(6) |
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#define | AD4170_DATA_STATUS_RDYB_MSK NO_OS_BIT(5) |
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#define | AD4170_DATA_STATUS_SETTLED_FIR_MSK NO_OS_BIT(4) |
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#define | AD4170_DATA_STATUS_CH_ACTIVE_MSK NO_OS_GENMASK(3,0) |
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#define | AD4170_PIN_MUXING_CHAN_TO_GPIO_MSK NO_OS_BIT(14) |
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#define | AD4170_PIN_MUXING_DIG_AUX2_CTRL_MSK NO_OS_GENMASK(7,6) |
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#define | AD4170_PIN_MUXING_DIG_AUX1_CTRL_MSK NO_OS_GENMASK(5,4) |
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#define | AD4170_PIN_MUXING_SYNC_CTRL_MSK NO_OS_GENMASK(3,2) |
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#define | AD4170_PIN_MUXING_DIG_OUT_STR_MSK NO_OS_BIT(1) |
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#define | AD4170_PIN_MUXING_SDO_RDBY_DLY_MSK NO_OS_BIT(0) |
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#define | AD4170_CLOCK_CTRL_DCLK_DIVIDE_MSK NO_OS_GENMASK(7,6) |
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#define | AD4170_CLOCK_CTRL_CLOCKDIV_MSK NO_OS_GENMASK(5,4) |
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#define | AD4170_CLOCK_CTRL_CLOCKSEL_MSK NO_OS_GENMASK(1,0) |
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#define | AD4170_STANDBY_CTRL_STB_EN_CLOCK_MSK NO_OS_BIT(8) |
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#define | AD4170_STANDBY_CTRL_STB_EN_IPULLUP_MSK NO_OS_BIT(7) |
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#define | AD4170_STANDBY_CTRL_STB_EN_DIAGNOSTICS_MSK NO_OS_BIT(6) |
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#define | AD4170_STANDBY_CTRL_STB_EN_DAC_MSK NO_OS_BIT(5) |
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#define | AD4170_STANDBY_CTRL_STB_EN_PDSW1_MSK NO_OS_BIT(4) |
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#define | AD4170_STANDBY_CTRL_STB_EN_PDSW0_MSK NO_OS_BIT(3) |
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#define | AD4170_STANDBY_CTRL_STB_EN_VBIAS_MSK NO_OS_BIT(2) |
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#define | AD4170_STANDBY_CTRL_STB_EN_IEXC_MSK NO_OS_BIT(1) |
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#define | AD4170_STANDBY_CTRL_STB_EN_REFERENCE_MSK NO_OS_BIT(0) |
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#define | AD4170_POWER_DOWN_SW_PDSW1_MSK NO_OS_BIT(1) |
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#define | AD4170_POWER_DOWN_SW_PDSW0_MSK NO_OS_BIT(0) |
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#define | AD4170_ADC_CTRL_PARALLEL_FILT_EN_MSK NO_OS_BIT(8) |
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#define | AD4170_ADC_CTRL_MULTI_DATA_REG_SEL_MSK NO_OS_BIT(7) |
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#define | AD4170_ADC_CTRL_CONT_READ_STATUS_EN_MSK NO_OS_BIT(6) |
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#define | AD4170_REG_CTRL_CONT_READ_MSK NO_OS_GENMASK(5,4) |
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#define | AD4170_REG_CTRL_MODE_MSK NO_OS_GENMASK(3,0) |
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#define | AD4170_ERROR_DEVICE_ERROR_MSK NO_OS_BIT(15) |
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#define | AD4170_ERROR_DLDO_PSM_ERR_MSK NO_OS_BIT(13) |
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#define | AD4170_ERROR_ALDO_PSM_ERR_MSK NO_OS_BIT(12) |
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#define | AD4170_ERROR_IOUT3_COMP_ERR_MSK NO_OS_BIT(11) |
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#define | AD4170_ERROR_IOUT2_COMP_ERR_MSK NO_OS_BIT(10) |
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#define | AD4170_ERROR_IOUT1_COMP_ERR_MSK NO_OS_BIT(9) |
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#define | AD4170_ERROR_IOUT0_COMP_ERR_MSK NO_OS_BIT(8) |
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#define | AD4170_ERROR_REF_DIFF_MIN_ERR_MSK NO_OS_BIT(7) |
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#define | AD4170_ERROR_REF_OV_UV_ERR_MSK NO_OS_BIT(6) |
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#define | AD4170_ERROR_AINM_OV_UV_ERR_MSK NO_OS_BIT(5) |
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#define | AD4170_ERROR_AINP_OV_UV_ERR_MSK NO_OS_BIT(4) |
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#define | AD4170_ERROR_ADC_CONV_ERR_MSK NO_OS_BIT(3) |
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#define | AD4170_ERROR_MM_CRC_ERR_MSK NO_OS_BIT(1) |
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#define | AD4170_ERROR_ROM_CRC_ERR_MSK NO_OS_BIT(0) |
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#define | AD4170_CHANNEL(ch) NO_OS_BIT(ch) |
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#define | AD4170_CHANNEL_SETUPN_REPEAT_N_MSK NO_OS_GENMASK(15,8) |
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#define | AD4170_CHANNEL_SETUPN_DELAY_N_MSK NO_OS_GENMASK(6,4) |
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#define | AD4170_CHANNEL_SETUPN_SETUP_N_MSK NO_OS_GENMASK(2,0) |
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#define | AD4170_CHANNEL_MAPN_AINP_MSK NO_OS_GENMASK(12,8) |
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#define | AD4170_CHANNEL_MAPN_AINM_MSK NO_OS_GENMASK(4,0) |
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#define | AD4170_ADC_SETUPS_MISC_CHOP_IEXC_MSK NO_OS_GENMASK(15,14) |
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#define | AD4170_ADC_SETUPS_MISC_CHOP_ADC_MSK NO_OS_GENMASK(9,8) |
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#define | AD4170_ADC_SETUPS_MISC_BURNOUT_MSK NO_OS_GENMASK(1,0) |
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#define | AD4170_ADC_SETUPS_AFE_REF_BUF_M_MSK NO_OS_GENMASK(11,10) |
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#define | AD4170_ADC_SETUPS_AFE_REF_BUF_P_MSK NO_OS_GENMASK(9,8) |
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#define | AD4170_ADC_SETUPS_AFE_REF_SELECT_MSK NO_OS_GENMASK(6,5) |
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#define | AD4170_ADC_SETUPS_AFE_BIPOLAR_MSK NO_OS_BIT(4) |
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#define | AD4170_ADC_SETUPS_AFE_PGA_GAIN_MSK NO_OS_GENMASK(3,0) |
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#define | AD4170_ADC_SETUPS_POST_FILTER_SEL_MSK NO_OS_GENMASK(7,4) |
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#define | AD4170_ADC_SETUPS_FILTER_TYPE_MSK NO_OS_GENMASK(3,0) |
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#define | AD4170_CURRENT_SOURCE_I_OUT_PIN_MSK NO_OS_GENMASK(12,8) |
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#define | AD4170_CURRENT_SOURCE_I_OUT_VAL_MSK NO_OS_GENMASK(2,0) |
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#define | AD4170_REF_CONTROL_REF_EN_MSK NO_OS_BIT(0) |
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#define | AD4170_FIR_CONTROL_IIR_MODE_MSK NO_OS_BIT(15) |
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#define | AD4170_FIR_CONTROL_FIR_MODE_MSK NO_OS_GENMASK(14,12) |
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#define | AD4170_FIR_CONTROL_COEFF_SET_MSK NO_OS_BIT(10) |
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#define | AD4170_FIR_CONTROL_FIR_LENGTH_MSK NO_OS_GENMASK(6,0) |
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#define | AD4170_REG_DAC_SPAN_DAC_GAIN_MSK NO_OS_BIT(0) |
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#define | AD4170_REG_DAC_CHANNEL_EN_DAC_EN_MSK NO_OS_BIT(0) |
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#define | AD4170_REG_DAC_HW_TOGGLE_MASK_HW_TOGGLE_EN_MSK NO_OS_BIT(0) |
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#define | AD4170_REG_DAC_HW_LDAC_MASK_HW_LDAC_EN_MSK NO_OS_BIT(0) |
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#define | AD4170_REG_DAC_DATA_MSK NO_OS_GENMASK(11,0) |
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#define | AD4170_REG_DAC_SW_TOGGLE_TRIGGERS_SW_TOGGLE_MSK NO_OS_BIT(0) |
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#define | AD4170_REG_DAC_SW_LDAC_TRIGGERS_SW_LDAC_EN_MSK NO_OS_BIT(0) |
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#define | AD4170_NUM_CHANNELS 16 |
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#define | AD4170_NUM_SETUPS 8 |
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#define | AD4170_NUM_CURRENT_SOURCE 4 |
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#define | AD4170_FIR_COEFF_MAX_LENGTH 72 |
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enum | ad4170_chan_to_gpio {
AD4170_CHANNEL_NOT_TO_GPIO,
AD4170_CHANNEL_TO_GPIO
} |
| Enables Current Channel Number Be Output to GPIO Pins. More...
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enum | ad4170_dig_aux2_ctrl {
AD4170_DIG_AUX2_DISABLED,
AD4170_DIG_AUX2_LDAC,
AD4170_DIG_AUX2_SYNC,
AD4170_DIG_AUX2_MODOUT
} |
| Configures Functionality of DIG_AUX2 Pin. More...
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enum | ad4170_dig_aux1_ctrl {
AD4170_DIG_AUX1_DISABLED,
AD4170_DIG_AUX1_RDY,
AD4170_DIG_AUX1_SYNC,
AD4170_DIG_AUX1_MODOUT
} |
| Configures Functionality of DIG_AUX1 Pin. More...
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enum | ad4170_sync_ctrl {
AD4170_SYNC_DISABLED,
AD4170_SYNC_STANDARD,
AD4170_SYNC_ALTERNATE
} |
| Configures SYNC_IN Pin for ADC Synchronization. More...
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enum | ad4170_dig_out_str {
AD4170_DIG_STR_DEFAULT,
AD4170_DIG_STR_HIGH
} |
| Configures the drive strength of the Digital Outputs. More...
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enum | ad4170_sdo_rdby_dly {
AD4170_SDO_RDY_SCLK,
AD4170_SDO_RDY_CSB
} |
| Reset Interface on CS or SCLK. More...
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enum | ad4170_dclk_div {
AD4170_DCLKDIVBY1,
AD4170_DCLKDIVBY2,
AD4170_DCLKDIVBY4,
AD4170_DCLKDIVBY8
} |
| Continuous Transmit Data Clock Divider. More...
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enum | ad4170_mclk_div {
AD4170_CLKDIVBY1,
AD4170_CLKDIVBY2,
AD4170_CLKDIVBY4,
AD4170_CLKDIVBY8
} |
| Master Clock Divider. More...
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enum | ad4170_clocksel {
AD4170_INTERNAL_OSC,
AD4170_INTERNAL_OSC_OUTPUT,
AD4170_EXTERNAL_OSC,
AD4170_EXTERNAL_XTAL
} |
| ADC Clock Select. More...
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enum | ad4170_cont_read {
AD4170_CONT_READ_OFF,
AD4170_CONT_READ_ON,
AD4170_CONT_TRANSMIT_ON
} |
| Configures continuous Data Register Read/Transmit. More...
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enum | ad4170_mode {
AD4170_MODE_CONT,
AD4170_MODE_CONT_FIR,
AD4170_MODE_CONT_IIR,
AD4170_MODE_SINGLE = 0x4,
AD4170_MODE_STANDBY,
AD4170_MODE_POWER_DOWN,
AD4170_MODE_IDLE,
AD4170_MODE_SYS_OFFSET_CAL,
AD4170_MODE_SYS_GAIN_CAL,
AD4170_MODE_SELF_OFFSET_CAL,
AD4170_MODE_SELF_GAIN_CAL
} |
| ADC Operating Mode. More...
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enum | ad4170_delay_n {
AD4170_DLY_0,
AD4170_DLY_16,
AD4170_DLY_256,
AD4170_DLY_1024,
AD4170_DLY_2048,
AD4170_DLY_4096,
AD4170_DLY_8192,
AD4170_DLY_16384
} |
| Delay to Add After Channel Switch. More...
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enum | ad4170_ain {
AD4170_AIN0,
AD4170_AIN1,
AD4170_AIN2,
AD4170_AIN3,
AD4170_AIN4,
AD4170_AIN5,
AD4170_AIN6,
AD4170_AIN7,
AD4170_AIN8,
AD4170_AIN9,
AD4170_AIN10,
AD4170_AIN11,
AD4170_AIN12,
AD4170_AIN13,
AD4170_AIN14,
AD4170_AIN15,
AD4170_AIN16,
AD4170_TEMP_SENSOR_P = 17,
AD4170_TEMP_SENSOR_N = 17,
AD4170_AVDD_AVSS_P = 18,
AD4170_AVDD_AVSS_N = 18,
AD4170_IOVDD_DGND_P = 19,
AD4170_IOVDD_DGND_N = 19,
AD4170_DAC,
AD4170_ALDO,
AD4170_DLDO,
AD4170_AVSS,
AD4170_DGND,
AD4170_REFIN1_P,
AD4170_REFIN1_N,
AD4170_REFIN2_P,
AD4170_REFIN2_N,
AD4170_REFOUT,
AD4170_OPEN = 31
} |
| Multiplexer Positive/Negative Input for This Channel. More...
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enum | ad4170_chop_iexc {
AD4170_CHOP_IEXC_OFF,
AD4170_CHOP_IEXC_AB,
AD4170_CHOP_IEXC_CD,
AD4170_CHOP_IEXC_ABCD
} |
| Excitation Current Chopping Control. More...
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enum | ad4170_chop_adc {
AD4170_CHOP_OFF,
AD4170_CHOP_MUX,
AD4170_CHOP_ACX_4PIN,
AD4170_CHOP_ACX_2PIN
} |
| ADC/Mux Chopping Control. More...
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enum | ad4170_burnout {
AD4170_BURNOUT_OFF,
AD4170_BURNOUT_100N,
AD4170_BURNOUT_2U,
AD4170_BURNOUT_10U
} |
| Burnout Current Values. More...
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enum | ad4170_ref_buf {
AD4170_REF_BUF_PRE,
AD4170_REF_BUF_FULL,
AD4170_REF_BUF_BYPASS
} |
| REFIN Buffer Enable. More...
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enum | ad4170_ref_select {
AD4170_REFIN_REFIN1,
AD4170_REFIN_REFIN2,
AD4170_REFIN_REFOUT,
AD4170_REFIN_AVDD
} |
| ADC Reference Selection. More...
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enum | ad4170_pga_gain {
AD4170_PGA_GAIN_1,
AD4170_PGA_GAIN_2,
AD4170_PGA_GAIN_4,
AD4170_PGA_GAIN_8,
AD4170_PGA_GAIN_16,
AD4170_PGA_GAIN_32,
AD4170_PGA_GAIN_64,
AD4170_PGA_GAIN_128,
AD4170_PGA_GAIN_0P5,
AD4170_PGA_GAIN_1_PRECHARGE
} |
| PGA Gain Selection. More...
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enum | ad4170_post_filter {
AD4170_POST_FILTER_NONE,
AD4170_POST_FILTER_40MS,
AD4170_POST_FILTER_50MS,
AD4170_POST_FILTER_60MS,
AD4170_POST_FILTER_FAST_AC,
AD4170_POST_FILTER_AVG16,
AD4170_POST_FILTER_AVG20,
AD4170_POST_FILTER_AVG24
} |
| Optional Post-Filter configuration. More...
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enum | ad4170_filter_type {
AD4170_FILT_SINC5_AVG = 0x0,
AD4170_FILT_SINC5 = 0x4,
AD4170_FILT_SINC3 = 0x6
} |
| Filter Mode for Sinc-Based Filters. More...
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enum | ad4170_i_out_pin {
AD4170_I_OUT_AIN0,
AD4170_I_OUT_AIN1,
AD4170_I_OUT_AIN2,
AD4170_I_OUT_AIN3,
AD4170_I_OUT_AIN4,
AD4170_I_OUT_AIN5,
AD4170_I_OUT_AIN6,
AD4170_I_OUT_AIN7,
AD4170_I_OUT_AIN8,
AD4170_I_OUT_AIN9,
AD4170_I_OUT_AIN10,
AD4170_I_OUT_AIN11,
AD4170_I_OUT_AIN12,
AD4170_I_OUT_AIN13,
AD4170_I_OUT_AIN14,
AD4170_I_OUT_AIN15,
AD4170_I_OUT_AINCOM,
AD4170_I_OUT_GPIO0,
AD4170_I_OUT_GPIO1,
AD4170_I_OUT_GPIO2,
AD4170_I_OUT_GPIO3
} |
| Current Source Destination. More...
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enum | ad4170_i_out_val {
AD4170_I_OUT_0UA,
AD4170_I_OUT_10UA,
AD4170_I_OUT_50UA,
AD4170_I_OUT_100UA,
AD4170_I_OUT_250UA,
AD4170_I_OUT_500UA,
AD4170_I_OUT_1000UA,
AD4170_I_OUT_1500UA
} |
| Current Source Value. More...
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|
enum | ad4170_fir_mode {
AD4170_FIR_DEFAULT,
AD4170_FIR_SYM_ODD,
AD4170_FIR_SYM_EVEN,
AD4170_FIR_ANTISYM_ODD,
AD4170_FIR_ANTISYM_EVEN,
AD4170_FIR_ASYM
} |
| Selects FIR Type. More...
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enum | ad4170_fir_coeff_set {
AD4170_FIR_COEFF_SET0,
AD4170_FIR_COEFF_SET1
} |
| Selects FIR coefficient set. More...
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enum | ad4170_dac_gain {
AD4170_DAC_GAIN_1,
AD4170_DAC_GAIN_2
} |
| DAC Output Span. More...
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enum | ad4170_id {
ID_AD4170,
ID_AD4171,
ID_AD4172,
ID_AD4190,
ID_AD4195
} |
| Device selector ID. More...
|
|
|
int | ad4170_spi_reg_read (struct ad4170_dev *dev, uint32_t reg_addr, uint32_t *reg_data) |
| Read device register. More...
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|
int | ad4170_spi_reg_write (struct ad4170_dev *dev, uint32_t reg_addr, uint32_t reg_data) |
| Write device register. More...
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int | ad4170_spi_reg_write_mask (struct ad4170_dev *dev, uint32_t reg_addr, uint8_t mask, uint32_t reg_data) |
| SPI write device register using a mask. More...
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|
int | ad4170_reset_spi_interface (struct ad4170_dev *dev) |
| Reset the SPI interface by sending reset sequence to device. More...
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|
int | ad4170_get_data16 (struct ad4170_dev *dev, uint16_t *data) |
| Get data from register Data_16b. More...
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|
int | ad4170_get_data16s (struct ad4170_dev *dev, uint16_t *data, uint8_t *status) |
| Get data and status from register Data_16b_Status. More...
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|
int | ad4170_get_data24 (struct ad4170_dev *dev, uint32_t *data) |
| Get data from register Data_24b. More...
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|
int | ad4170_get_data24s (struct ad4170_dev *dev, uint32_t *data, uint8_t *status) |
| Get data and status from register Data_24b_Status. More...
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int | ad4170_get_data32 (struct ad4170_dev *dev, uint32_t *data) |
| Get data from register Data_32b. More...
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|
int | ad4170_get_ch_data (struct ad4170_dev *dev, uint8_t ch, uint32_t *data) |
| Get data from register Data_Per_Channel[n]. More...
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|
int | ad4170_read16 (struct ad4170_dev *dev, uint32_t *pbuf, uint16_t nb_samples) |
| Read multiple samples using direct register access from Data_16b. More...
|
|
int | ad4170_read16s (struct ad4170_dev *dev, uint32_t *pbuf, uint16_t nb_samples) |
| Read multiple samples using direct register access from Data_16b_Status. More...
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|
int | ad4170_read24 (struct ad4170_dev *dev, uint32_t *pbuf, uint16_t nb_samples) |
| Read multiple samples using direct register access from Data_24. More...
|
|
int | ad4170_read24s (struct ad4170_dev *dev, uint32_t *pbuf, uint16_t nb_samples) |
| Read multiple samples using direct register access from Data_24_Status. More...
|
|
int | ad4170_read32 (struct ad4170_dev *dev, uint32_t *pbuf, uint16_t nb_samples) |
| Read multiple samples using direct register access from Data_32b. More...
|
|
int | ad4170_continuous_read (struct ad4170_dev *dev, uint32_t *data_out, uint8_t *status_out, uint16_t nb_samples) |
| Read multiple samples in continuous read mode. More...
|
|
int | ad4170_continuous_read_exit (struct ad4170_dev *dev) |
| Exit continuous read mode. More...
|
|
int | ad4170_continuous_transmit_exit (struct ad4170_dev *dev) |
| Exit continuous transmit mode. More...
|
|
int | ad4170_reset (struct ad4170_dev *dev) |
| Perform a software reset. More...
|
|
int | ad4170_get_status (struct ad4170_dev *dev, uint16_t *status) |
| Get status from register Data_Status. More...
|
|
int | ad4170_set_pin_muxing (struct ad4170_dev *dev, struct ad4170_pin_muxing pin_muxing) |
| Set the AD4170 Pin Muxing settings. More...
|
|
int | ad4170_set_dclk_div (struct ad4170_dev *dev, enum ad4170_dclk_div clk_div) |
| Set the AD4170 DCLK configuration. More...
|
|
int | ad4170_set_mclk_div (struct ad4170_dev *dev, enum ad4170_mclk_div clk_div) |
| Set the AD4170 MCLK configuration. More...
|
|
int | ad4170_set_clocksel (struct ad4170_dev *dev, enum ad4170_clocksel sel) |
| Set the AD4170 clock selection configuration. More...
|
|
int | ad4170_set_standby_ctrl (struct ad4170_dev *dev, uint16_t standby_ctrl) |
| Set the AD4170 Standby control settings. More...
|
|
int | ad4170_set_powerdown_sw (struct ad4170_dev *dev, uint16_t powerdown_sw) |
| Set the AD4170 Powerdown switches settings. More...
|
|
int | ad4170_set_error_en (struct ad4170_dev *dev, uint16_t error_en) |
| Set the AD4170 Error enable settings. More...
|
|
int | ad4170_set_error (struct ad4170_dev *dev, uint16_t error) |
| Set the Error register with a value to clear specific errors. More...
|
|
int | ad4170_get_error (struct ad4170_dev *dev, uint16_t *error) |
| Get the Error register. More...
|
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int | ad4170_set_adc_ctrl (struct ad4170_dev *dev, struct ad4170_adc_ctrl adc_ctrl) |
| Set the AD4170 ADC Control. More...
|
|
int | ad4170_set_channel_en (struct ad4170_dev *dev, uint16_t channel_en) |
| Enable AD4170 channels. More...
|
|
int | ad4170_set_channel_setup (struct ad4170_dev *dev, uint8_t ch, struct ad4170_channel_setup setup) |
| Set the AD4170 Channel specific setup. More...
|
|
int | ad4170_set_channel_map (struct ad4170_dev *dev, uint8_t ch, struct ad4170_channel_map map) |
| Set the AD4170 Channel specific map. More...
|
|
int | ad4170_set_setup (struct ad4170_dev *dev, uint8_t n, struct ad4170_setup setup) |
| Configure an ADC setup. More...
|
|
int | ad4170_set_ref_control (struct ad4170_dev *dev, bool enable) |
| Set the AD4170 Ref Control. More...
|
|
int | ad4170_set_v_bias (struct ad4170_dev *dev, uint16_t ch_mask) |
| Set the AD4170 Voltage bias. More...
|
|
int | ad4170_set_i_pullup (struct ad4170_dev *dev, uint16_t ch_mask) |
| Set the AD4170 Input pullup. More...
|
|
int | ad4170_set_current_source (struct ad4170_dev *dev, uint8_t n, struct ad4170_current_source current_source) |
| Set the AD4170 Excitation Current. More...
|
|
int | ad4170_set_fir_control (struct ad4170_dev *dev, struct ad4170_fir_control fir_control) |
| Set the AD4170 FIR control settings. More...
|
|
int | ad4170_set_dac_config (struct ad4170_dev *dev, struct ad4170_dac_config config) |
| Set the AD4170 DAC settings. More...
|
|
int | ad4170_set_dac_data (struct ad4170_dev *dev, uint16_t code) |
| Set the AD4170 DAC data by directly writing the DAT_DATA register. More...
|
|
int | ad4170_set_dac_inputa (struct ad4170_dev *dev, uint16_t code) |
| Set the AD4170 DAC data by writing the INPUTA register to be loaded separately by LDAC or Toggle operations. More...
|
|
int | ad4170_set_dac_inputb (struct ad4170_dev *dev, uint16_t code) |
| Set the AD4170 DAC data by writing the INPUTB register to be loaded separately by LDAC or Toggle operations. More...
|
|
int | ad4170_dac_sw_ldac (struct ad4170_dev *dev, bool polarity) |
| Perform a software LDAC. More...
|
|
int | ad4170_dac_sw_toggle (struct ad4170_dev *dev, bool polarity) |
| Perform a software toggle. More...
|
|
int | ad4170_dac_hw_toggle (struct ad4170_dev *dev, bool polarity) |
| Perform a hardware toggle using the DIG_AUX2 pin, assumed to be pre-configured for this. More...
|
|
int | ad4170_init (struct ad4170_dev **device, struct ad4170_init_param *init_param) |
| Initialize an AD4170 device structure. More...
|
|
int | ad4170_remove (struct ad4170_dev *dev) |
| Remove the device and free al the resources. More...
|
|
int | ad4170_regmap (struct ad4170_dev *dev) |
| Debugging function to print the register map to console. More...
|
|
Header file for the ad4170 driver.
- Author
- Darius Berghe (dariu.nosp@m.s.be.nosp@m.rghe@.nosp@m.anal.nosp@m.og.co.nosp@m.m)
Copyright 2020, 2023(c) Analog Devices, Inc.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
- Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.