AD7124 header file. Devices: AD7124-4, AD7124-8. More...

#include <stdint.h>
#include <stdbool.h>
#include "no_os_spi.h"
#include "no_os_delay.h"
#include "no_os_util.h"

Include dependency graph for ad7124.h:

This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Classes
struct	ad7124_analog_inputs
	Positive and negative analog inputs. More...

struct	ad7124_channel_map
	Channel mapping. More...

struct	ad7124_channel_setup
	Channel setup. More...

struct	ad7124_st_reg

struct	ad7124_dev
	Device Structure. More...

struct	ad7124_init_param

Macros
#define	AD7124_RW 1 /* Read and Write */

#define	AD7124_R 2 /* Read only */

#define	AD7124_W 3 /* Write only */

#define	AD7124_MAX_SETUPS 8

#define	AD7124_MAX_CHANNELS 16

#define	AD7124_4_STD_ID 0x04

#define	AD7124_4_B_GRADE_ID 0x06

#define	AD7124_4_NEW_ID 0x07

#define	AD7124_8_STD_ID 0x14

#define	AD7124_8_B_W_GRADE_ID 0x16

#define	AD7124_8_NEW_ID 0x17

#define	AD7124_COMM_REG 0x00

#define	AD7124_STATUS_REG 0x00

#define	AD7124_ADC_CTRL_REG 0x01

#define	AD7124_DATA_REG 0x02

#define	AD7124_IO_CTRL1_REG 0x03

#define	AD7124_IO_CTRL2_REG 0x04

#define	AD7124_ID_REG 0x05

#define	AD7124_ERR_REG 0x06

#define	AD7124_ERREN_REG 0x07

#define	AD7124_CH0_MAP_REG 0x09

#define	AD7124_CH1_MAP_REG 0x0A

#define	AD7124_CH2_MAP_REG 0x0B

#define	AD7124_CH3_MAP_REG 0x0C

#define	AD7124_CH4_MAP_REG 0x0D

#define	AD7124_CH5_MAP_REG 0x0E

#define	AD7124_CH6_MAP_REG 0x0F

#define	AD7124_CH7_MAP_REG 0x10

#define	AD7124_CH8_MAP_REG 0x11

#define	AD7124_CH9_MAP_REG 0x12

#define	AD7124_CH10_MAP_REG 0x13

#define	AD7124_CH11_MAP_REG 0x14

#define	AD7124_CH12_MAP_REG 0x15

#define	AD7124_CH13_MAP_REG 0x16

#define	AD7124_CH14_MAP_REG 0x17

#define	AD7124_CH15_MAP_REG 0x18

#define	AD7124_CFG0_REG 0x19

#define	AD7124_CFG1_REG 0x1A

#define	AD7124_CFG2_REG 0x1B

#define	AD7124_CFG3_REG 0x1C

#define	AD7124_CFG4_REG 0x1D

#define	AD7124_CFG5_REG 0x1E

#define	AD7124_CFG6_REG 0x1F

#define	AD7124_CFG7_REG 0x20

#define	AD7124_FILT0_REG 0x21

#define	AD7124_FILT1_REG 0x22

#define	AD7124_FILT2_REG 0x23

#define	AD7124_FILT3_REG 0x24

#define	AD7124_FILT4_REG 0x25

#define	AD7124_FILT5_REG 0x26

#define	AD7124_FILT6_REG 0x27

#define	AD7124_FILT7_REG 0x28

#define	AD7124_OFFS0_REG 0x29

#define	AD7124_OFFS1_REG 0x2A

#define	AD7124_OFFS2_REG 0x2B

#define	AD7124_OFFS3_REG 0x2C

#define	AD7124_OFFS4_REG 0x2D

#define	AD7124_OFFS5_REG 0x2E

#define	AD7124_OFFS6_REG 0x2F

#define	AD7124_OFFS7_REG 0x30

#define	AD7124_GAIN0_REG 0x31

#define	AD7124_GAIN1_REG 0x32

#define	AD7124_GAIN2_REG 0x33

#define	AD7124_GAIN3_REG 0x34

#define	AD7124_GAIN4_REG 0x35

#define	AD7124_GAIN5_REG 0x36

#define	AD7124_GAIN6_REG 0x37

#define	AD7124_GAIN7_REG 0x38

#define	AD7124_COMM_REG_WEN (0 << 7)

#define	AD7124_COMM_REG_WR (0 << 6)

#define	AD7124_COMM_REG_RD (1 << 6)

#define	AD7124_COMM_REG_RA(x) ((x) & 0x3F)

#define	AD7124_STATUS_REG_RDY (1 << 7)

#define	AD7124_STATUS_REG_ERROR_FLAG (1 << 6)

#define	AD7124_STATUS_REG_POR_FLAG (1 << 4)

#define	AD7124_STATUS_REG_CH_ACTIVE(x) ((x) & 0xF)

#define	AD7124_ADC_CTRL_REG_DOUT_RDY_DEL (1 << 12)

#define	AD7124_ADC_CTRL_REG_CONT_READ (1 << 11)

#define	AD7124_ADC_CTRL_REG_DATA_STATUS (1 << 10)

#define	AD7124_ADC_CTRL_REG_CS_EN (1 << 9)

#define	AD7124_ADC_CTRL_REG_REF_EN (1 << 8)

#define	AD7124_ADC_CTRL_REG_POWER_MODE(x) (((x) & 0x3) << 6)

#define	AD7124_ADC_CTRL_REG_MODE(x) (((x) & 0xF) << 2)

#define	AD7124_ADC_CTRL_REG_CLK_SEL(x) (((x) & 0x3) << 0)

#define	AD7124_IO_CTRL1_REG_GPIO_DAT2 (1 << 23)

#define	AD7124_IO_CTRL1_REG_GPIO_DAT1 (1 << 22)

#define	AD7124_IO_CTRL1_REG_GPIO_CTRL2 (1 << 19)

#define	AD7124_IO_CTRL1_REG_GPIO_CTRL1 (1 << 18)

#define	AD7124_IO_CTRL1_REG_PDSW (1 << 15)

#define	AD7124_IO_CTRL1_REG_IOUT1(x) (((x) & 0x7) << 11)

#define	AD7124_IO_CTRL1_REG_IOUT0(x) (((x) & 0x7) << 8)

#define	AD7124_IO_CTRL1_REG_IOUT_CH1(x) (((x) & 0xF) << 4)

#define	AD7124_IO_CTRL1_REG_IOUT_CH0(x) (((x) & 0xF) << 0)

#define	AD7124_8_IO_CTRL1_REG_GPIO_DAT4 (1 << 23)

#define	AD7124_8_IO_CTRL1_REG_GPIO_DAT3 (1 << 22)

#define	AD7124_8_IO_CTRL1_REG_GPIO_DAT2 (1 << 21)

#define	AD7124_8_IO_CTRL1_REG_GPIO_DAT1 (1 << 20)

#define	AD7124_8_IO_CTRL1_REG_GPIO_CTRL4 (1 << 19)

#define	AD7124_8_IO_CTRL1_REG_GPIO_CTRL3 (1 << 18)

#define	AD7124_8_IO_CTRL1_REG_GPIO_CTRL2 (1 << 17)

#define	AD7124_8_IO_CTRL1_REG_GPIO_CTRL1 (1 << 16)

#define	AD7124_IO_CTRL2_REG_GPIO_VBIAS7 (1 << 15)

#define	AD7124_IO_CTRL2_REG_GPIO_VBIAS6 (1 << 14)

#define	AD7124_IO_CTRL2_REG_GPIO_VBIAS5 (1 << 11)

#define	AD7124_IO_CTRL2_REG_GPIO_VBIAS4 (1 << 10)

#define	AD7124_IO_CTRL2_REG_GPIO_VBIAS3 (1 << 5)

#define	AD7124_IO_CTRL2_REG_GPIO_VBIAS2 (1 << 4)

#define	AD7124_IO_CTRL2_REG_GPIO_VBIAS1 (1 << 1)

#define	AD7124_IO_CTRL2_REG_GPIO_VBIAS0 (1 << 0)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS15 (1 << 15)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS14 (1 << 14)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS13 (1 << 13)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS12 (1 << 12)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS11 (1 << 11)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS10 (1 << 10)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS9 (1 << 9)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS8 (1 << 8)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS7 (1 << 7)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS6 (1 << 6)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS5 (1 << 5)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS4 (1 << 4)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS3 (1 << 3)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS2 (1 << 2)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS1 (1 << 1)

#define	AD7124_8_IO_CTRL2_REG_GPIO_VBIAS0 (1 << 0)

#define	AD7124_ID_REG_DEVICE_ID(x) (((x) & 0xF) << 4)

#define	AD7124_ID_REG_SILICON_REV(x) (((x) & 0xF) << 0)

#define	AD7124_ERR_REG_LDO_CAP_ERR (1 << 19)

#define	AD7124_ERR_REG_ADC_CAL_ERR (1 << 18)

#define	AD7124_ERR_REG_ADC_CONV_ERR (1 << 17)

#define	AD7124_ERR_REG_ADC_SAT_ERR (1 << 16)

#define	AD7124_ERR_REG_AINP_OV_ERR (1 << 15)

#define	AD7124_ERR_REG_AINP_UV_ERR (1 << 14)

#define	AD7124_ERR_REG_AINM_OV_ERR (1 << 13)

#define	AD7124_ERR_REG_AINM_UV_ERR (1 << 12)

#define	AD7124_ERR_REG_REF_DET_ERR (1 << 11)

#define	AD7124_ERR_REG_DLDO_PSM_ERR (1 << 9)

#define	AD7124_ERR_REG_ALDO_PSM_ERR (1 << 7)

#define	AD7124_ERR_REG_SPI_IGNORE_ERR (1 << 6)

#define	AD7124_ERR_REG_SPI_SLCK_CNT_ERR (1 << 5)

#define	AD7124_ERR_REG_SPI_READ_ERR (1 << 4)

#define	AD7124_ERR_REG_SPI_WRITE_ERR (1 << 3)

#define	AD7124_ERR_REG_SPI_CRC_ERR (1 << 2)

#define	AD7124_ERR_REG_MM_CRC_ERR (1 << 1)

#define	AD7124_ERR_REG_ROM_CRC_ERR (1 << 0)

#define	AD7124_ERREN_REG_MCLK_CNT_EN (1 << 22)

#define	AD7124_ERREN_REG_LDO_CAP_CHK_TEST_EN (1 << 21)

#define	AD7124_ERREN_REG_LDO_CAP_CHK(x) (((x) & 0x3) << 19)

#define	AD7124_ERREN_REG_ADC_CAL_ERR_EN (1 << 18)

#define	AD7124_ERREN_REG_ADC_CONV_ERR_EN (1 << 17)

#define	AD7124_ERREN_REG_ADC_SAT_ERR_EN (1 << 16)

#define	AD7124_ERREN_REG_AINP_OV_ERR_EN (1 << 15)

#define	AD7124_ERREN_REG_AINP_UV_ERR_EN (1 << 14)

#define	AD7124_ERREN_REG_AINM_OV_ERR_EN (1 << 13)

#define	AD7124_ERREN_REG_AINM_UV_ERR_EN (1 << 12)

#define	AD7124_ERREN_REG_REF_DET_ERR_EN (1 << 11)

#define	AD7124_ERREN_REG_DLDO_PSM_TRIP_TEST_EN (1 << 10)

#define	AD7124_ERREN_REG_DLDO_PSM_ERR_ERR (1 << 9)

#define	AD7124_ERREN_REG_ALDO_PSM_TRIP_TEST_EN (1 << 8)

#define	AD7124_ERREN_REG_ALDO_PSM_ERR_EN (1 << 7)

#define	AD7124_ERREN_REG_SPI_IGNORE_ERR_EN (1 << 6)

#define	AD7124_ERREN_REG_SPI_SCLK_CNT_ERR_EN (1 << 5)

#define	AD7124_ERREN_REG_SPI_READ_ERR_EN (1 << 4)

#define	AD7124_ERREN_REG_SPI_WRITE_ERR_EN (1 << 3)

#define	AD7124_ERREN_REG_SPI_CRC_ERR_EN (1 << 2)

#define	AD7124_ERREN_REG_MM_CRC_ERR_EN (1 << 1)

#define	AD7124_ERREN_REG_ROM_CRC_ERR_EN (1 << 0)

#define	AD7124_CH_MAP_REG_CH_ENABLE (1 << 15)

#define	AD7124_CH_MAP_REG_SETUP(x) (((x) & 0x7) << 12)

#define	AD7124_CH_MAP_REG_AINP(x) (((x) & 0x1F) << 5)

#define	AD7124_CH_MAP_REG_AINM(x) (((x) & 0x1F) << 0)

#define	AD7124_CFG_REG_BIPOLAR (1 << 11)

#define	AD7124_CFG_REG_BURNOUT(x) (((x) & 0x3) << 9)

#define	AD7124_CFG_REG_REF_BUFP (1 << 8)

#define	AD7124_CFG_REG_REF_BUFM (1 << 7)

#define	AD7124_CFG_REG_AIN_BUFP (1 << 6)

#define	AD7124_CFG_REG_AINN_BUFM (1 << 5)

#define	AD7124_CFG_REG_REF_SEL(x) ((x) & 0x3) << 3

#define	AD7124_CFG_REG_PGA(x) (((x) & 0x7) << 0)

#define	AD7124_FILT_REG_FILTER(x) (((x) & 0x7) << 21)

#define	AD7124_FILT_REG_REJ60 (1 << 20)

#define	AD7124_FILT_REG_POST_FILTER(x) (((x) & 0x7) << 17)

#define	AD7124_FILT_REG_SINGLE_CYCLE (1 << 16)

#define	AD7124_FILT_REG_FS(x) (((x) & 0x7FF) << 0)

#define	AD7124_CRC8_POLYNOMIAL_REPRESENTATION 0x07 /* x8 + x2 + x + 1 */

#define	AD7124_DISABLE_CRC 0

#define	AD7124_USE_CRC 1

#define	AD7124_CHMAP_REG_SETUP_SEL_MSK NO_OS_GENMASK(14,12)

#define	AD7124_CHMAP_REG_AINPOS_MSK NO_OS_GENMASK(9,5)

#define	AD7124_CHMAP_REG_AINNEG_MSK NO_OS_GENMASK(4,0)

#define	AD7124_ADC_CTRL_REG_MODE_MSK NO_OS_GENMASK(5,2)

#define	AD7124_SETUP_CONF_REG_REF_SEL_MSK NO_OS_GENMASK(4,3)

#define	AD7124_REF_BUF_MSK NO_OS_GENMASK(8,7)

#define	AD7124_AIN_BUF_MSK NO_OS_GENMASK(6,5)

#define	AD7124_POWER_MODE_MSK NO_OS_GENMASK(7,6)

Enumerations
enum	ad7124_device_type { ID_AD7124_4, ID_AD7124_8 }

enum	ad7124_mode { AD7124_CONTINUOUS, AD7124_SINGLE, AD7124_STANDBY, AD7124_POWER_DOWN, AD7124_IDLE, AD7124_IN_ZERO_SCALE_OFF, AD7124_IN_FULL_SCALE_GAIN, AD7124_SYS_ZERO_SCALE_OFF, AD7124_SYS_ZERO_SCALE_GAIN, ADC_MAX_MODES }
	ADC Modes of Operation. More...

enum	ad7124_analog_input { AD7124_AIN0, AD7124_AIN1, AD7124_AIN2, AD7124_AIN3, AD7124_AIN4, AD7124_AIN5, AD7124_AIN6, AD7124_AIN7, AD7124_AIN8, AD7124_AIN9, AD7124_AIN10, AD7124_AIN11, AD7124_AIN12, AD7124_AIN13, AD7124_AIN14, AD7124_AIN15, AD7124_AVSS, AD7124_TEMP_SENSOR, AD7124_IN_REF, AD7124_DGND, AD7124_AVDD_AVSS_P, AD7124_AVDD_AVSS_M, AD7124_IOVDD_DGND_P, AD7124_IOVDD_DGND_M, AD7124_ALDO_AVSS_P, AD7124_ALDO_AVSS_M, AD7124_DLDO_DGND_P, AD7124_DLDO_DGND_M, AD7124_V_20MV_P, AD7124_V_20MV_M }
	ADC input sources for each channel. More...

enum	ad7124_reference_source { EXTERNAL_REFIN1, EXTERNAL_REFIN2, INTERNAL_REF, AVDD_AVSS, MAX_REF_SOURCES }
	Type of ADC Reference. More...

enum	ad7124_power_mode { AD7124_LOW_POWER, AD7124_MID_POWER, AD7124_HIGH_POWER }
	Power modes. More...

enum	ad7124_registers { AD7124_Status, AD7124_ADC_Control, AD7124_Data, AD7124_IOCon1, AD7124_IOCon2, AD7124_ID, AD7124_Error, AD7124_Error_En, AD7124_Mclk_Count, AD7124_Channel_0, AD7124_Channel_1, AD7124_Channel_2, AD7124_Channel_3, AD7124_Channel_4, AD7124_Channel_5, AD7124_Channel_6, AD7124_Channel_7, AD7124_Channel_8, AD7124_Channel_9, AD7124_Channel_10, AD7124_Channel_11, AD7124_Channel_12, AD7124_Channel_13, AD7124_Channel_14, AD7124_Channel_15, AD7124_Config_0, AD7124_Config_1, AD7124_Config_2, AD7124_Config_3, AD7124_Config_4, AD7124_Config_5, AD7124_Config_6, AD7124_Config_7, AD7124_Filter_0, AD7124_Filter_1, AD7124_Filter_2, AD7124_Filter_3, AD7124_Filter_4, AD7124_Filter_5, AD7124_Filter_6, AD7124_Filter_7, AD7124_Offset_0, AD7124_Offset_1, AD7124_Offset_2, AD7124_Offset_3, AD7124_Offset_4, AD7124_Offset_5, AD7124_Offset_6, AD7124_Offset_7, AD7124_Gain_0, AD7124_Gain_1, AD7124_Gain_2, AD7124_Gain_3, AD7124_Gain_4, AD7124_Gain_5, AD7124_Gain_6, AD7124_Gain_7, AD7124_REG_NO }

Functions
int32_t	ad7124_no_check_read_register (struct ad7124_dev dev, struct ad7124_st_reg p_reg)
	Reads the value of the specified register without checking if the device is ready to accept user requests. More...

int32_t	ad7124_no_check_write_register (struct ad7124_dev *dev, struct ad7124_st_reg reg)
	Writes the value of the specified register without checking if the device is ready to accept user requests. More...

int32_t	ad7124_read_register (struct ad7124_dev dev, struct ad7124_st_reg p_reg)
	Reads the value of the specified register only when the device is ready to accept user requests. If the device ready flag is deactivated the read operation will be executed without checking the device state. DEPRECATED, use ad7124_read_register2. More...

int32_t	ad7124_read_register2 (struct ad7124_dev dev, uint32_t reg, uint32_t readval)
	Wrap the read register function to give it a modern signature. More...

int32_t	ad7124_write_register (struct ad7124_dev *dev, struct ad7124_st_reg reg)
	Writes the value of the specified register only when the device is ready to accept user requests. If the device ready flag is deactivated the write operation will be executed without checking the device state. DEPRECATED, use ad7124_write_register2. More...

int32_t	ad7124_write_register2 (struct ad7124_dev *dev, uint32_t reg, uint32_t writeval)
	Wrap the write register function to give it a modern signature. More...

int32_t	ad7124_reset (struct ad7124_dev *dev)
	Resets the device. More...

int32_t	ad7124_wait_for_spi_ready (struct ad7124_dev *dev, uint32_t timeout)
	Waits until the device can accept read and write user actions. More...

int32_t	ad7124_wait_to_power_on (struct ad7124_dev *dev, uint32_t timeout)
	Waits until the device finishes the power-on reset operation. More...

int32_t	ad7124_wait_for_conv_ready (struct ad7124_dev *dev, uint32_t timeout)
	Waits until a new conversion result is available. More...

int32_t	ad7124_read_data (struct ad7124_dev dev, int32_t p_data)
	Reads the conversion result from the device. More...

int32_t	ad7124_get_read_chan_id (struct ad7124_dev dev, uint32_t status)
	Get the ID of the channel of the latest conversion. More...

uint8_t	ad7124_compute_crc8 (uint8_t *p_buf, uint8_t buf_size)
	Computes the CRC checksum for a data buffer. More...

uint8_t	AD7124_ComputeXOR8 (uint8_t *p_buf, uint8_t buf_size)

void	ad7124_update_crcsetting (struct ad7124_dev *dev)
	Updates the CRC settings. More...

void	ad7124_update_dev_spi_settings (struct ad7124_dev *dev)
	Updates the device SPI interface settings. More...

int32_t	ad7124_fclk_get (struct ad7124_dev dev, float f_clk)
	Get the AD7124 reference clock. More...

int32_t	ad7124_fltcoff_get (struct ad7124_dev dev, int16_t chn_no, uint16_t flt_coff)
	Get the filter coefficient for the sample rate. More...

float	ad7124_get_odr (struct ad7124_dev *dev, int16_t ch_no)
	Calculate ODR of the device. More...

int32_t	ad7124_set_odr (struct ad7124_dev *dev, float odr, int16_t chn_no)
	Set ODR of the device. More...

int	ad7124_reg_write_msk (struct ad7124_dev *dev, uint32_t reg_addr, uint32_t data, uint32_t mask)
	SPI internal register write to device using a mask. More...

int	ad7124_set_adc_mode (struct ad7124_dev *device, enum ad7124_mode mode)
	Set ADC Mode. More...

int	ad7124_set_channel_status (struct ad7124_dev *device, uint8_t chn_no, bool channel_status)

int	ad7124_connect_analog_input (struct ad7124_dev *device, uint8_t chn_no, struct ad7124_analog_inputs analog_input)
	Set Analog Inputs to channel. More...

int	ad7124_assign_setup (struct ad7124_dev *device, uint8_t ch_no, uint8_t setup)
	Assign Setup to Channel. More...

int	ad7124_set_polarity (struct ad7124_dev *device, bool bipolar, uint8_t setup_id)
	Set Polarity. More...

int	ad7124_set_reference_source (struct ad7124_dev *device, enum ad7124_reference_source ref_source, uint8_t setup_id, bool ref_en)

int	ad7124_enable_buffers (struct ad7124_dev *device, bool ain_buff, bool ref_buff, uint8_t setup_id)
	Enable Input Buffer. More...

int	ad7124_set_power_mode (struct ad7124_dev *device, enum ad7124_power_mode mode)
	Select the Power Mode. More...

int32_t	ad7124_setup (struct ad7124_dev *device, struct ad7124_init_param init_param)
	Initializes the AD7124. More...

int32_t	ad7124_remove (struct ad7124_dev *dev)
	Free the resources allocated by ad7124_setup(). More...

Detailed Description

AD7124 header file. Devices: AD7124-4, AD7124-8.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
The use of this software may or may not infringe the patent rights of one or more patent holders. This license does not release you from the requirement that you obtain separate licenses from these patent holders to use this software.
Use of the software either in source or binary form, must be run on or directly connected to an Analog Devices Inc. component.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ AD7124_4_B_GRADE_ID

#define AD7124_4_B_GRADE_ID 0x06

◆ AD7124_4_NEW_ID

#define AD7124_4_NEW_ID 0x07

◆ AD7124_4_STD_ID

#define AD7124_4_STD_ID 0x04

◆ AD7124_8_B_W_GRADE_ID

#define AD7124_8_B_W_GRADE_ID 0x16

◆ AD7124_8_IO_CTRL1_REG_GPIO_CTRL1

#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL1 (1 << 16)

◆ AD7124_8_IO_CTRL1_REG_GPIO_CTRL2

#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL2 (1 << 17)

◆ AD7124_8_IO_CTRL1_REG_GPIO_CTRL3

#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL3 (1 << 18)

◆ AD7124_8_IO_CTRL1_REG_GPIO_CTRL4

#define AD7124_8_IO_CTRL1_REG_GPIO_CTRL4 (1 << 19)

◆ AD7124_8_IO_CTRL1_REG_GPIO_DAT1

#define AD7124_8_IO_CTRL1_REG_GPIO_DAT1 (1 << 20)

◆ AD7124_8_IO_CTRL1_REG_GPIO_DAT2

#define AD7124_8_IO_CTRL1_REG_GPIO_DAT2 (1 << 21)

◆ AD7124_8_IO_CTRL1_REG_GPIO_DAT3

#define AD7124_8_IO_CTRL1_REG_GPIO_DAT3 (1 << 22)

◆ AD7124_8_IO_CTRL1_REG_GPIO_DAT4

#define AD7124_8_IO_CTRL1_REG_GPIO_DAT4 (1 << 23)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS0

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS0 (1 << 0)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS1

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS1 (1 << 1)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS10

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS10 (1 << 10)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS11

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS11 (1 << 11)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS12

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS12 (1 << 12)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS13

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS13 (1 << 13)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS14

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS14 (1 << 14)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS15

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS15 (1 << 15)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS2

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS2 (1 << 2)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS3

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS3 (1 << 3)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS4

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS4 (1 << 4)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS5

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS5 (1 << 5)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS6

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS6 (1 << 6)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS7

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS7 (1 << 7)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS8

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS8 (1 << 8)

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS9

#define AD7124_8_IO_CTRL2_REG_GPIO_VBIAS9 (1 << 9)

◆ AD7124_8_NEW_ID

#define AD7124_8_NEW_ID 0x17

◆ AD7124_8_STD_ID

#define AD7124_8_STD_ID 0x14

◆ AD7124_ADC_CTRL_REG

#define AD7124_ADC_CTRL_REG 0x01

◆ AD7124_ADC_CTRL_REG_CLK_SEL

#define AD7124_ADC_CTRL_REG_CLK_SEL ( x ) (((x) & 0x3) << 0)

◆ AD7124_ADC_CTRL_REG_CONT_READ

#define AD7124_ADC_CTRL_REG_CONT_READ (1 << 11)

◆ AD7124_ADC_CTRL_REG_CS_EN

#define AD7124_ADC_CTRL_REG_CS_EN (1 << 9)

◆ AD7124_ADC_CTRL_REG_DATA_STATUS

#define AD7124_ADC_CTRL_REG_DATA_STATUS (1 << 10)

◆ AD7124_ADC_CTRL_REG_DOUT_RDY_DEL

#define AD7124_ADC_CTRL_REG_DOUT_RDY_DEL (1 << 12)

◆ AD7124_ADC_CTRL_REG_MODE

#define AD7124_ADC_CTRL_REG_MODE ( x ) (((x) & 0xF) << 2)

◆ AD7124_ADC_CTRL_REG_MODE_MSK

#define AD7124_ADC_CTRL_REG_MODE_MSK NO_OS_GENMASK(5,2)

◆ AD7124_ADC_CTRL_REG_POWER_MODE

#define AD7124_ADC_CTRL_REG_POWER_MODE ( x ) (((x) & 0x3) << 6)

◆ AD7124_ADC_CTRL_REG_REF_EN

#define AD7124_ADC_CTRL_REG_REF_EN (1 << 8)

◆ AD7124_AIN_BUF_MSK

#define AD7124_AIN_BUF_MSK NO_OS_GENMASK(6,5)

◆ AD7124_CFG0_REG

#define AD7124_CFG0_REG 0x19

◆ AD7124_CFG1_REG

#define AD7124_CFG1_REG 0x1A

◆ AD7124_CFG2_REG

#define AD7124_CFG2_REG 0x1B

◆ AD7124_CFG3_REG

#define AD7124_CFG3_REG 0x1C

◆ AD7124_CFG4_REG

#define AD7124_CFG4_REG 0x1D

◆ AD7124_CFG5_REG

#define AD7124_CFG5_REG 0x1E

◆ AD7124_CFG6_REG

#define AD7124_CFG6_REG 0x1F

◆ AD7124_CFG7_REG

#define AD7124_CFG7_REG 0x20

◆ AD7124_CFG_REG_AIN_BUFP

#define AD7124_CFG_REG_AIN_BUFP (1 << 6)

◆ AD7124_CFG_REG_AINN_BUFM

#define AD7124_CFG_REG_AINN_BUFM (1 << 5)

◆ AD7124_CFG_REG_BIPOLAR

#define AD7124_CFG_REG_BIPOLAR (1 << 11)

◆ AD7124_CFG_REG_BURNOUT

#define AD7124_CFG_REG_BURNOUT ( x ) (((x) & 0x3) << 9)

◆ AD7124_CFG_REG_PGA

#define AD7124_CFG_REG_PGA ( x ) (((x) & 0x7) << 0)

◆ AD7124_CFG_REG_REF_BUFM

#define AD7124_CFG_REG_REF_BUFM (1 << 7)

◆ AD7124_CFG_REG_REF_BUFP

#define AD7124_CFG_REG_REF_BUFP (1 << 8)

◆ AD7124_CFG_REG_REF_SEL

#define AD7124_CFG_REG_REF_SEL ( x ) ((x) & 0x3) << 3

◆ AD7124_CH0_MAP_REG

#define AD7124_CH0_MAP_REG 0x09

◆ AD7124_CH10_MAP_REG

#define AD7124_CH10_MAP_REG 0x13

◆ AD7124_CH11_MAP_REG

#define AD7124_CH11_MAP_REG 0x14

◆ AD7124_CH12_MAP_REG

#define AD7124_CH12_MAP_REG 0x15

◆ AD7124_CH13_MAP_REG

#define AD7124_CH13_MAP_REG 0x16

◆ AD7124_CH14_MAP_REG

#define AD7124_CH14_MAP_REG 0x17

◆ AD7124_CH15_MAP_REG

#define AD7124_CH15_MAP_REG 0x18

◆ AD7124_CH1_MAP_REG

#define AD7124_CH1_MAP_REG 0x0A

◆ AD7124_CH2_MAP_REG

#define AD7124_CH2_MAP_REG 0x0B

◆ AD7124_CH3_MAP_REG

#define AD7124_CH3_MAP_REG 0x0C

◆ AD7124_CH4_MAP_REG

#define AD7124_CH4_MAP_REG 0x0D

◆ AD7124_CH5_MAP_REG

#define AD7124_CH5_MAP_REG 0x0E

◆ AD7124_CH6_MAP_REG

#define AD7124_CH6_MAP_REG 0x0F

◆ AD7124_CH7_MAP_REG

#define AD7124_CH7_MAP_REG 0x10

◆ AD7124_CH8_MAP_REG

#define AD7124_CH8_MAP_REG 0x11

◆ AD7124_CH9_MAP_REG

#define AD7124_CH9_MAP_REG 0x12

◆ AD7124_CH_MAP_REG_AINM

#define AD7124_CH_MAP_REG_AINM ( x ) (((x) & 0x1F) << 0)

◆ AD7124_CH_MAP_REG_AINP

#define AD7124_CH_MAP_REG_AINP ( x ) (((x) & 0x1F) << 5)

◆ AD7124_CH_MAP_REG_CH_ENABLE

#define AD7124_CH_MAP_REG_CH_ENABLE (1 << 15)

◆ AD7124_CH_MAP_REG_SETUP

#define AD7124_CH_MAP_REG_SETUP ( x ) (((x) & 0x7) << 12)

◆ AD7124_CHMAP_REG_AINNEG_MSK

#define AD7124_CHMAP_REG_AINNEG_MSK NO_OS_GENMASK(4,0)

◆ AD7124_CHMAP_REG_AINPOS_MSK

#define AD7124_CHMAP_REG_AINPOS_MSK NO_OS_GENMASK(9,5)

◆ AD7124_CHMAP_REG_SETUP_SEL_MSK

#define AD7124_CHMAP_REG_SETUP_SEL_MSK NO_OS_GENMASK(14,12)

◆ AD7124_COMM_REG

#define AD7124_COMM_REG 0x00

◆ AD7124_COMM_REG_RA

#define AD7124_COMM_REG_RA ( x ) ((x) & 0x3F)

◆ AD7124_COMM_REG_RD

#define AD7124_COMM_REG_RD (1 << 6)

◆ AD7124_COMM_REG_WEN

#define AD7124_COMM_REG_WEN (0 << 7)

◆ AD7124_COMM_REG_WR

#define AD7124_COMM_REG_WR (0 << 6)

◆ AD7124_CRC8_POLYNOMIAL_REPRESENTATION

#define AD7124_CRC8_POLYNOMIAL_REPRESENTATION 0x07 /* x8 + x2 + x + 1 */

◆ AD7124_DATA_REG

#define AD7124_DATA_REG 0x02

◆ AD7124_DISABLE_CRC

#define AD7124_DISABLE_CRC 0

◆ AD7124_ERR_REG

#define AD7124_ERR_REG 0x06

◆ AD7124_ERR_REG_ADC_CAL_ERR

#define AD7124_ERR_REG_ADC_CAL_ERR (1 << 18)

◆ AD7124_ERR_REG_ADC_CONV_ERR

#define AD7124_ERR_REG_ADC_CONV_ERR (1 << 17)

◆ AD7124_ERR_REG_ADC_SAT_ERR

#define AD7124_ERR_REG_ADC_SAT_ERR (1 << 16)

◆ AD7124_ERR_REG_AINM_OV_ERR

#define AD7124_ERR_REG_AINM_OV_ERR (1 << 13)

◆ AD7124_ERR_REG_AINM_UV_ERR

#define AD7124_ERR_REG_AINM_UV_ERR (1 << 12)

◆ AD7124_ERR_REG_AINP_OV_ERR

#define AD7124_ERR_REG_AINP_OV_ERR (1 << 15)

◆ AD7124_ERR_REG_AINP_UV_ERR

#define AD7124_ERR_REG_AINP_UV_ERR (1 << 14)

◆ AD7124_ERR_REG_ALDO_PSM_ERR

#define AD7124_ERR_REG_ALDO_PSM_ERR (1 << 7)

◆ AD7124_ERR_REG_DLDO_PSM_ERR

#define AD7124_ERR_REG_DLDO_PSM_ERR (1 << 9)

◆ AD7124_ERR_REG_LDO_CAP_ERR

#define AD7124_ERR_REG_LDO_CAP_ERR (1 << 19)

◆ AD7124_ERR_REG_MM_CRC_ERR

#define AD7124_ERR_REG_MM_CRC_ERR (1 << 1)

◆ AD7124_ERR_REG_REF_DET_ERR

#define AD7124_ERR_REG_REF_DET_ERR (1 << 11)

◆ AD7124_ERR_REG_ROM_CRC_ERR

#define AD7124_ERR_REG_ROM_CRC_ERR (1 << 0)

◆ AD7124_ERR_REG_SPI_CRC_ERR

#define AD7124_ERR_REG_SPI_CRC_ERR (1 << 2)

◆ AD7124_ERR_REG_SPI_IGNORE_ERR

#define AD7124_ERR_REG_SPI_IGNORE_ERR (1 << 6)

◆ AD7124_ERR_REG_SPI_READ_ERR

#define AD7124_ERR_REG_SPI_READ_ERR (1 << 4)

◆ AD7124_ERR_REG_SPI_SLCK_CNT_ERR

#define AD7124_ERR_REG_SPI_SLCK_CNT_ERR (1 << 5)

◆ AD7124_ERR_REG_SPI_WRITE_ERR

#define AD7124_ERR_REG_SPI_WRITE_ERR (1 << 3)

◆ AD7124_ERREN_REG

#define AD7124_ERREN_REG 0x07

◆ AD7124_ERREN_REG_ADC_CAL_ERR_EN

#define AD7124_ERREN_REG_ADC_CAL_ERR_EN (1 << 18)

◆ AD7124_ERREN_REG_ADC_CONV_ERR_EN

#define AD7124_ERREN_REG_ADC_CONV_ERR_EN (1 << 17)

◆ AD7124_ERREN_REG_ADC_SAT_ERR_EN

#define AD7124_ERREN_REG_ADC_SAT_ERR_EN (1 << 16)

◆ AD7124_ERREN_REG_AINM_OV_ERR_EN

#define AD7124_ERREN_REG_AINM_OV_ERR_EN (1 << 13)

◆ AD7124_ERREN_REG_AINM_UV_ERR_EN

#define AD7124_ERREN_REG_AINM_UV_ERR_EN (1 << 12)

◆ AD7124_ERREN_REG_AINP_OV_ERR_EN

#define AD7124_ERREN_REG_AINP_OV_ERR_EN (1 << 15)

◆ AD7124_ERREN_REG_AINP_UV_ERR_EN

#define AD7124_ERREN_REG_AINP_UV_ERR_EN (1 << 14)

◆ AD7124_ERREN_REG_ALDO_PSM_ERR_EN

#define AD7124_ERREN_REG_ALDO_PSM_ERR_EN (1 << 7)

◆ AD7124_ERREN_REG_ALDO_PSM_TRIP_TEST_EN

#define AD7124_ERREN_REG_ALDO_PSM_TRIP_TEST_EN (1 << 8)

◆ AD7124_ERREN_REG_DLDO_PSM_ERR_ERR

#define AD7124_ERREN_REG_DLDO_PSM_ERR_ERR (1 << 9)

◆ AD7124_ERREN_REG_DLDO_PSM_TRIP_TEST_EN

#define AD7124_ERREN_REG_DLDO_PSM_TRIP_TEST_EN (1 << 10)

◆ AD7124_ERREN_REG_LDO_CAP_CHK

#define AD7124_ERREN_REG_LDO_CAP_CHK ( x ) (((x) & 0x3) << 19)

◆ AD7124_ERREN_REG_LDO_CAP_CHK_TEST_EN

#define AD7124_ERREN_REG_LDO_CAP_CHK_TEST_EN (1 << 21)

◆ AD7124_ERREN_REG_MCLK_CNT_EN

#define AD7124_ERREN_REG_MCLK_CNT_EN (1 << 22)

◆ AD7124_ERREN_REG_MM_CRC_ERR_EN

#define AD7124_ERREN_REG_MM_CRC_ERR_EN (1 << 1)

◆ AD7124_ERREN_REG_REF_DET_ERR_EN

#define AD7124_ERREN_REG_REF_DET_ERR_EN (1 << 11)

◆ AD7124_ERREN_REG_ROM_CRC_ERR_EN

#define AD7124_ERREN_REG_ROM_CRC_ERR_EN (1 << 0)

◆ AD7124_ERREN_REG_SPI_CRC_ERR_EN

#define AD7124_ERREN_REG_SPI_CRC_ERR_EN (1 << 2)

◆ AD7124_ERREN_REG_SPI_IGNORE_ERR_EN

#define AD7124_ERREN_REG_SPI_IGNORE_ERR_EN (1 << 6)

◆ AD7124_ERREN_REG_SPI_READ_ERR_EN

#define AD7124_ERREN_REG_SPI_READ_ERR_EN (1 << 4)

◆ AD7124_ERREN_REG_SPI_SCLK_CNT_ERR_EN

#define AD7124_ERREN_REG_SPI_SCLK_CNT_ERR_EN (1 << 5)

◆ AD7124_ERREN_REG_SPI_WRITE_ERR_EN

#define AD7124_ERREN_REG_SPI_WRITE_ERR_EN (1 << 3)

◆ AD7124_FILT0_REG

#define AD7124_FILT0_REG 0x21

◆ AD7124_FILT1_REG

#define AD7124_FILT1_REG 0x22

◆ AD7124_FILT2_REG

#define AD7124_FILT2_REG 0x23

◆ AD7124_FILT3_REG

#define AD7124_FILT3_REG 0x24

◆ AD7124_FILT4_REG

#define AD7124_FILT4_REG 0x25

◆ AD7124_FILT5_REG

#define AD7124_FILT5_REG 0x26

◆ AD7124_FILT6_REG

#define AD7124_FILT6_REG 0x27

◆ AD7124_FILT7_REG

#define AD7124_FILT7_REG 0x28

◆ AD7124_FILT_REG_FILTER

#define AD7124_FILT_REG_FILTER ( x ) (((x) & 0x7) << 21)

◆ AD7124_FILT_REG_FS

#define AD7124_FILT_REG_FS ( x ) (((x) & 0x7FF) << 0)

◆ AD7124_FILT_REG_POST_FILTER

#define AD7124_FILT_REG_POST_FILTER ( x ) (((x) & 0x7) << 17)

◆ AD7124_FILT_REG_REJ60

#define AD7124_FILT_REG_REJ60 (1 << 20)

◆ AD7124_FILT_REG_SINGLE_CYCLE

#define AD7124_FILT_REG_SINGLE_CYCLE (1 << 16)

◆ AD7124_GAIN0_REG

#define AD7124_GAIN0_REG 0x31

◆ AD7124_GAIN1_REG

#define AD7124_GAIN1_REG 0x32

◆ AD7124_GAIN2_REG

#define AD7124_GAIN2_REG 0x33

◆ AD7124_GAIN3_REG

#define AD7124_GAIN3_REG 0x34

◆ AD7124_GAIN4_REG

#define AD7124_GAIN4_REG 0x35

◆ AD7124_GAIN5_REG

#define AD7124_GAIN5_REG 0x36

◆ AD7124_GAIN6_REG

#define AD7124_GAIN6_REG 0x37

◆ AD7124_GAIN7_REG

#define AD7124_GAIN7_REG 0x38

◆ AD7124_ID_REG

#define AD7124_ID_REG 0x05

◆ AD7124_ID_REG_DEVICE_ID

#define AD7124_ID_REG_DEVICE_ID ( x ) (((x) & 0xF) << 4)

◆ AD7124_ID_REG_SILICON_REV

#define AD7124_ID_REG_SILICON_REV ( x ) (((x) & 0xF) << 0)

◆ AD7124_IO_CTRL1_REG

#define AD7124_IO_CTRL1_REG 0x03

◆ AD7124_IO_CTRL1_REG_GPIO_CTRL1

#define AD7124_IO_CTRL1_REG_GPIO_CTRL1 (1 << 18)

◆ AD7124_IO_CTRL1_REG_GPIO_CTRL2

#define AD7124_IO_CTRL1_REG_GPIO_CTRL2 (1 << 19)

◆ AD7124_IO_CTRL1_REG_GPIO_DAT1

#define AD7124_IO_CTRL1_REG_GPIO_DAT1 (1 << 22)

◆ AD7124_IO_CTRL1_REG_GPIO_DAT2

#define AD7124_IO_CTRL1_REG_GPIO_DAT2 (1 << 23)

◆ AD7124_IO_CTRL1_REG_IOUT0

#define AD7124_IO_CTRL1_REG_IOUT0 ( x ) (((x) & 0x7) << 8)

◆ AD7124_IO_CTRL1_REG_IOUT1

#define AD7124_IO_CTRL1_REG_IOUT1 ( x ) (((x) & 0x7) << 11)

◆ AD7124_IO_CTRL1_REG_IOUT_CH0

#define AD7124_IO_CTRL1_REG_IOUT_CH0 ( x ) (((x) & 0xF) << 0)

◆ AD7124_IO_CTRL1_REG_IOUT_CH1

#define AD7124_IO_CTRL1_REG_IOUT_CH1 ( x ) (((x) & 0xF) << 4)

◆ AD7124_IO_CTRL1_REG_PDSW

#define AD7124_IO_CTRL1_REG_PDSW (1 << 15)

◆ AD7124_IO_CTRL2_REG

#define AD7124_IO_CTRL2_REG 0x04

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS0

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS0 (1 << 0)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS1

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS1 (1 << 1)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS2

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS2 (1 << 4)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS3

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS3 (1 << 5)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS4

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS4 (1 << 10)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS5

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS5 (1 << 11)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS6

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS6 (1 << 14)

◆ AD7124_IO_CTRL2_REG_GPIO_VBIAS7

#define AD7124_IO_CTRL2_REG_GPIO_VBIAS7 (1 << 15)

◆ AD7124_MAX_CHANNELS

#define AD7124_MAX_CHANNELS 16

◆ AD7124_MAX_SETUPS

#define AD7124_MAX_SETUPS 8

◆ AD7124_OFFS0_REG

#define AD7124_OFFS0_REG 0x29

◆ AD7124_OFFS1_REG

#define AD7124_OFFS1_REG 0x2A

◆ AD7124_OFFS2_REG

#define AD7124_OFFS2_REG 0x2B

◆ AD7124_OFFS3_REG

#define AD7124_OFFS3_REG 0x2C

◆ AD7124_OFFS4_REG

#define AD7124_OFFS4_REG 0x2D

◆ AD7124_OFFS5_REG

#define AD7124_OFFS5_REG 0x2E

◆ AD7124_OFFS6_REG

#define AD7124_OFFS6_REG 0x2F

◆ AD7124_OFFS7_REG

#define AD7124_OFFS7_REG 0x30

◆ AD7124_POWER_MODE_MSK

#define AD7124_POWER_MODE_MSK NO_OS_GENMASK(7,6)

◆ AD7124_R

#define AD7124_R 2 /* Read only */

◆ AD7124_REF_BUF_MSK

#define AD7124_REF_BUF_MSK NO_OS_GENMASK(8,7)

◆ AD7124_RW

#define AD7124_RW 1 /* Read and Write */

◆ AD7124_SETUP_CONF_REG_REF_SEL_MSK

#define AD7124_SETUP_CONF_REG_REF_SEL_MSK NO_OS_GENMASK(4,3)

◆ AD7124_STATUS_REG

#define AD7124_STATUS_REG 0x00

◆ AD7124_STATUS_REG_CH_ACTIVE

#define AD7124_STATUS_REG_CH_ACTIVE ( x ) ((x) & 0xF)

◆ AD7124_STATUS_REG_ERROR_FLAG

#define AD7124_STATUS_REG_ERROR_FLAG (1 << 6)

◆ AD7124_STATUS_REG_POR_FLAG

#define AD7124_STATUS_REG_POR_FLAG (1 << 4)

◆ AD7124_STATUS_REG_RDY

#define AD7124_STATUS_REG_RDY (1 << 7)

◆ AD7124_USE_CRC

#define AD7124_USE_CRC 1

◆ AD7124_W

#define AD7124_W 3 /* Write only */

Enumeration Type Documentation

◆ ad7124_analog_input

enum ad7124_analog_input

ADC input sources for each channel.

Enumerator
AD7124_AIN0
AD7124_AIN1
AD7124_AIN2
AD7124_AIN3
AD7124_AIN4
AD7124_AIN5
AD7124_AIN6
AD7124_AIN7
AD7124_AIN8
AD7124_AIN9
AD7124_AIN10
AD7124_AIN11
AD7124_AIN12
AD7124_AIN13
AD7124_AIN14
AD7124_AIN15
AD7124_AVSS
AD7124_TEMP_SENSOR
AD7124_IN_REF
AD7124_DGND
AD7124_AVDD_AVSS_P
AD7124_AVDD_AVSS_M
AD7124_IOVDD_DGND_P
AD7124_IOVDD_DGND_M
AD7124_ALDO_AVSS_P
AD7124_ALDO_AVSS_M
AD7124_DLDO_DGND_P
AD7124_DLDO_DGND_M
AD7124_V_20MV_P
AD7124_V_20MV_M

◆ ad7124_device_type

enum ad7124_device_type

AD7124 Device definitions

Enumerator
ID_AD7124_4
ID_AD7124_8

◆ ad7124_mode

enum ad7124_mode

ADC Modes of Operation.

Enumerator
AD7124_CONTINUOUS
AD7124_SINGLE
AD7124_STANDBY
AD7124_POWER_DOWN
AD7124_IDLE
AD7124_IN_ZERO_SCALE_OFF
AD7124_IN_FULL_SCALE_GAIN
AD7124_SYS_ZERO_SCALE_OFF
AD7124_SYS_ZERO_SCALE_GAIN
ADC_MAX_MODES

◆ ad7124_power_mode

enum ad7124_power_mode

Power modes.

Enumerator
AD7124_LOW_POWER
AD7124_MID_POWER
AD7124_HIGH_POWER

◆ ad7124_reference_source

enum ad7124_reference_source

Type of ADC Reference.

Enumerator
EXTERNAL_REFIN1
EXTERNAL_REFIN2
INTERNAL_REF
AVDD_AVSS
MAX_REF_SOURCES

◆ ad7124_registers

enum ad7124_registers

Enumerator
AD7124_Status
AD7124_ADC_Control
AD7124_Data
AD7124_IOCon1
AD7124_IOCon2
AD7124_ID
AD7124_Error
AD7124_Error_En
AD7124_Mclk_Count
AD7124_Channel_0
AD7124_Channel_1
AD7124_Channel_2
AD7124_Channel_3
AD7124_Channel_4
AD7124_Channel_5
AD7124_Channel_6
AD7124_Channel_7
AD7124_Channel_8
AD7124_Channel_9
AD7124_Channel_10
AD7124_Channel_11
AD7124_Channel_12
AD7124_Channel_13
AD7124_Channel_14
AD7124_Channel_15
AD7124_Config_0
AD7124_Config_1
AD7124_Config_2
AD7124_Config_3
AD7124_Config_4
AD7124_Config_5
AD7124_Config_6
AD7124_Config_7
AD7124_Filter_0
AD7124_Filter_1
AD7124_Filter_2
AD7124_Filter_3
AD7124_Filter_4
AD7124_Filter_5
AD7124_Filter_6
AD7124_Filter_7
AD7124_Offset_0
AD7124_Offset_1
AD7124_Offset_2
AD7124_Offset_3
AD7124_Offset_4
AD7124_Offset_5
AD7124_Offset_6
AD7124_Offset_7
AD7124_Gain_0
AD7124_Gain_1
AD7124_Gain_2
AD7124_Gain_3
AD7124_Gain_4
AD7124_Gain_5
AD7124_Gain_6
AD7124_Gain_7
AD7124_REG_NO

Function Documentation

◆ ad7124_assign_setup()

int ad7124_assign_setup	(	struct ad7124_dev *	device,
		uint8_t	chn_num,
		uint8_t	setup
	)

Assign Setup to Channel.

Parameters

device	- AD7124 Device Descriptor.
chn_num	- Channel ID (number).
setup	- Setup ID (number).

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_compute_crc8()

uint8_t ad7124_compute_crc8	(	uint8_t *	p_buf,
		uint8_t	buf_size
	)

Computes the CRC checksum for a data buffer.

Parameters

p_buf	- Data buffer
buf_size	- Data buffer size in bytes

Returns: Returns the computed CRC checksum.

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◆ AD7124_ComputeXOR8()

uint8_t AD7124_ComputeXOR8	(	uint8_t *	p_buf,
		uint8_t	buf_size
	)

◆ ad7124_connect_analog_input()

int ad7124_connect_analog_input	(	struct ad7124_dev *	device,
		uint8_t	chn_num,
		struct ad7124_analog_inputs	analog_input
	)

Set Analog Inputs to channel.

Parameters

device	- AD7124 Device Descriptor.
chn_num	- Channel whose Analog input is to be configured.
analog_input	- Analog Inputs to the Channel.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_enable_buffers()

int ad7124_enable_buffers	(	struct ad7124_dev *	device,
		bool	inbuf_en,
		bool	refbuf_en,
		uint8_t	setup_id
	)

Enable Input Buffer.

Parameters

device	- AD7124 Device Descriptor.
inbuf_en	- Enable Input Buffer.
refbuf_en	- Enable reference Buffer.
setup_id	- Setup ID (Number).

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_fclk_get()

int32_t ad7124_fclk_get	(	struct ad7124_dev *	dev,
		float *	f_clk
	)

Get the AD7124 reference clock.

Parameters

[in]	dev	- Pointer to the application handler.
[out]	f_clk	- Pointer to the clock frequency container.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_fltcoff_get()

int32_t ad7124_fltcoff_get	(	struct ad7124_dev *	dev,
		int16_t	chn_num,
		uint16_t *	flt_coff
	)

Get the filter coefficient for the sample rate.

Parameters

[in]	dev	- Pointer to the application handler.
[in]	chn_num	- Channel number.
[out]	flt_coff	- Pointer to the filter coefficient container.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_get_odr()

float ad7124_get_odr	(	struct ad7124_dev *	dev,
		int16_t	chn_num
	)

Calculate ODR of the device.

Parameters

[in]	dev	- Pointer to the application handler.
[in]	chn_num	- Channel number.

Returns: Output data rate in case of success, negative error code otherwise.

◆ ad7124_get_read_chan_id()

int32_t ad7124_get_read_chan_id	(	struct ad7124_dev *	dev,
		uint32_t *	status
	)

Get the ID of the channel of the latest conversion.

Parameters

dev	- The handler of the instance of the driver.
status	- Pointer to store the read data.

Returns: Returns 0 for success or negative error code otherwise.

◆ ad7124_no_check_read_register()

int32_t ad7124_no_check_read_register	(	struct ad7124_dev *	dev,
		struct ad7124_st_reg *	p_reg
	)

Reads the value of the specified register without checking if the device is ready to accept user requests.

Parameters

dev	- The handler of the instance of the driver.
p_reg	- Pointer to the register structure holding info about the register to be read. The read value is stored inside the register structure.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_no_check_write_register()

int32_t ad7124_no_check_write_register	(	struct ad7124_dev *	dev,
		struct ad7124_st_reg	reg
	)

Writes the value of the specified register without checking if the device is ready to accept user requests.

Parameters

dev	- The handler of the instance of the driver.
reg	- Register structure holding info about the register to be written

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_read_data()

int32_t ad7124_read_data	(	struct ad7124_dev *	dev,
		int32_t *	p_data
	)

Reads the conversion result from the device.

Parameters

dev	- The handler of the instance of the driver.
p_data	- Pointer to store the read data.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_read_register()

int32_t ad7124_read_register	(	struct ad7124_dev *	dev,
		struct ad7124_st_reg *	p_reg
	)

Reads the value of the specified register only when the device is ready to accept user requests. If the device ready flag is deactivated the read operation will be executed without checking the device state. DEPRECATED, use ad7124_read_register2.

Parameters

dev	- The handler of the instance of the driver.
p_reg	- Pointer to the register structure holding info about the register to be read. The read value is stored inside the register structure.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_read_register2()

int32_t ad7124_read_register2	(	struct ad7124_dev *	dev,
		uint32_t	reg,
		uint32_t *	readval
	)

Wrap the read register function to give it a modern signature.

Parameters

[in]	dev	- Driver handler pointer.
[in]	reg	- Address of the register to be read.
[out]	readval	- Pointer to the register value.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_reg_write_msk()

int ad7124_reg_write_msk	(	struct ad7124_dev *	dev,
		uint32_t	reg_addr,
		uint32_t	data,
		uint32_t	mask
	)

SPI internal register write to device using a mask.

Parameters

dev	- The device structure.
reg_addr	- The register address.
data	- The register data.
mask	- The mask.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_remove()

int32_t ad7124_remove ( struct ad7124_dev * dev )

Free the resources allocated by ad7124_setup().

Parameters

dev	- The device structure.

Returns: Returns 0 for success or negative error code otherwise.

◆ ad7124_reset()

int32_t ad7124_reset ( struct ad7124_dev * dev )

Resets the device.

Parameters

dev	- The handler of the instance of the driver.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_set_adc_mode()

int ad7124_set_adc_mode	(	struct ad7124_dev *	device,
		enum ad7124_mode	adc_mode
	)

Set ADC Mode.

Parameters

device	- AD7124 Device Descriptor
adc_mode	- ADC Mode to be configured

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_set_channel_status()

int ad7124_set_channel_status	(	struct ad7124_dev *	device,
		uint8_t	chn_num,
		bool	channel_status
	)

Enable/disable channel.

Parameters

device	- The device structure.
chn_num	- The channel number.
channel_status	- Channel status.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_set_odr()

int32_t ad7124_set_odr	(	struct ad7124_dev *	dev,
		float	odr,
		int16_t	chn_num
	)

Set ODR of the device.

Parameters

[in]	dev	- Pointer to the application handler.
[in]	odr	- New ODR of the device.
[in]	chn_num	- Channel number.

Returns: Returns 0 for success or negative error code otherwise.

◆ ad7124_set_polarity()

int ad7124_set_polarity	(	struct ad7124_dev *	device,
		bool	bipolar,
		uint8_t	setup_id
	)

Set Polarity.

Parameters

device	- AD7124 Device Descriptor.
bipolar	- Polarity Select:True in case of Bipolar, False in case of Unipolar.
setup_id	- Setup ID (number).

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_set_power_mode()

int ad7124_set_power_mode	(	struct ad7124_dev *	device,
		enum ad7124_power_mode	mode
	)

Select the Power Mode.

Parameters

device	- AD7124 Device Descriptor.
mode	- ADC Power Mode.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_set_reference_source()

int ad7124_set_reference_source	(	struct ad7124_dev *	device,
		enum ad7124_reference_source	ref_source,
		uint8_t	setup_id,
		bool	ref_en
	)

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◆ ad7124_setup()

int32_t ad7124_setup	(	struct ad7124_dev **	device,
		struct ad7124_init_param *	init_param
	)

Initializes the AD7124.

Parameters

device	- The device structure.
init_param	- The structure that contains the device initial parameters.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_update_crcsetting()

void ad7124_update_crcsetting ( struct ad7124_dev * dev )

Updates the CRC settings.

Parameters

dev	- The handler of the instance of the driver.

Returns: None.

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◆ ad7124_update_dev_spi_settings()

void ad7124_update_dev_spi_settings ( struct ad7124_dev * dev )

Updates the device SPI interface settings.

Parameters

dev	- The handler of the instance of the driver.

Returns: None.

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◆ ad7124_wait_for_conv_ready()

int32_t ad7124_wait_for_conv_ready	(	struct ad7124_dev *	dev,
		uint32_t	timeout
	)

Waits until a new conversion result is available.

Parameters

dev	- The handler of the instance of the driver.
timeout	- Count representing the number of polls to be done until the function returns if no new data is available.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_wait_for_spi_ready()

int32_t ad7124_wait_for_spi_ready	(	struct ad7124_dev *	dev,
		uint32_t	timeout
	)

Waits until the device can accept read and write user actions.

Parameters

dev	- The handler of the instance of the driver.
timeout	- Count representing the number of polls to be done until the function returns.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_wait_to_power_on()

int32_t ad7124_wait_to_power_on	(	struct ad7124_dev *	dev,
		uint32_t	timeout
	)

Waits until the device finishes the power-on reset operation.

Parameters

dev	- The handler of the instance of the driver.
timeout	- Count representing the number of polls to be done until the function returns.

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_write_register()

int32_t ad7124_write_register	(	struct ad7124_dev *	dev,
		struct ad7124_st_reg	p_reg
	)

Writes the value of the specified register only when the device is ready to accept user requests. If the device ready flag is deactivated the write operation will be executed without checking the device state. DEPRECATED, use ad7124_write_register2.

Parameters

dev	- The handler of the instance of the driver.
p_reg	- Register structure holding info about the register to be written

Returns: Returns 0 for success or negative error code otherwise.

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◆ ad7124_write_register2()

int32_t ad7124_write_register2	(	struct ad7124_dev *	dev,
		uint32_t	reg,
		uint32_t	writeval
	)

Wrap the write register function to give it a modern signature.

Parameters

[in]	dev	- Driver handler pointer.
[in]	reg	- Address of the register to be read.
[in]	writeval	- New value for the register.

Returns: 0 in case of success, error code otherwise.

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Classes

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ AD7124_4_B_GRADE_ID

◆ AD7124_4_NEW_ID

◆ AD7124_4_STD_ID

◆ AD7124_8_B_W_GRADE_ID

◆ AD7124_8_IO_CTRL1_REG_GPIO_CTRL1

◆ AD7124_8_IO_CTRL1_REG_GPIO_CTRL2

◆ AD7124_8_IO_CTRL1_REG_GPIO_CTRL3

◆ AD7124_8_IO_CTRL1_REG_GPIO_CTRL4

◆ AD7124_8_IO_CTRL1_REG_GPIO_DAT1

◆ AD7124_8_IO_CTRL1_REG_GPIO_DAT2

◆ AD7124_8_IO_CTRL1_REG_GPIO_DAT3

◆ AD7124_8_IO_CTRL1_REG_GPIO_DAT4

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS0

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS1

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS10

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS11

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS12

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS13

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS14

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS15

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS2

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS3

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS4

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS5

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS6

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS7

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS8

◆ AD7124_8_IO_CTRL2_REG_GPIO_VBIAS9

◆ AD7124_8_NEW_ID

◆ AD7124_8_STD_ID

◆ AD7124_ADC_CTRL_REG

◆ AD7124_ADC_CTRL_REG_CLK_SEL

◆ AD7124_ADC_CTRL_REG_CONT_READ

◆ AD7124_ADC_CTRL_REG_CS_EN

◆ AD7124_ADC_CTRL_REG_DATA_STATUS

◆ AD7124_ADC_CTRL_REG_DOUT_RDY_DEL

◆ AD7124_ADC_CTRL_REG_MODE

◆ AD7124_ADC_CTRL_REG_MODE_MSK

◆ AD7124_ADC_CTRL_REG_POWER_MODE

◆ AD7124_ADC_CTRL_REG_REF_EN

◆ AD7124_AIN_BUF_MSK

◆ AD7124_CFG0_REG

◆ AD7124_CFG1_REG

◆ AD7124_CFG2_REG

◆ AD7124_CFG3_REG

◆ AD7124_CFG4_REG

◆ AD7124_CFG5_REG

◆ AD7124_CFG6_REG

◆ AD7124_CFG7_REG

◆ AD7124_CFG_REG_AIN_BUFP

◆ AD7124_CFG_REG_AINN_BUFM

◆ AD7124_CFG_REG_BIPOLAR

◆ AD7124_CFG_REG_BURNOUT

◆ AD7124_CFG_REG_PGA

◆ AD7124_CFG_REG_REF_BUFM

◆ AD7124_CFG_REG_REF_BUFP

◆ AD7124_CFG_REG_REF_SEL

◆ AD7124_CH0_MAP_REG

◆ AD7124_CH10_MAP_REG

◆ AD7124_CH11_MAP_REG

◆ AD7124_CH12_MAP_REG

◆ AD7124_CH13_MAP_REG

◆ AD7124_CH14_MAP_REG

◆ AD7124_CH15_MAP_REG

◆ AD7124_CH1_MAP_REG

◆ AD7124_CH2_MAP_REG

◆ AD7124_CH3_MAP_REG

◆ AD7124_CH4_MAP_REG

◆ AD7124_CH5_MAP_REG

◆ AD7124_CH6_MAP_REG

◆ AD7124_CH7_MAP_REG

◆ AD7124_CH8_MAP_REG

◆ AD7124_CH9_MAP_REG

◆ AD7124_CH_MAP_REG_AINM