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Functions
main.c File Reference

Main file for Mbed platform of ad74416h project. More...

#include "parameters.h"
#include "common_data.h"
Include dependency graph for main.c:

Functions

int example_main ()
 Basic example main executiont.
 
int main ()
 Main function for Mbed platform.
 

Detailed Description

Main file for Mbed platform of ad74416h project.

Author
Antoniu Miclaus (anton.nosp@m.iu.m.nosp@m.iclau.nosp@m.s@an.nosp@m.alog..nosp@m.com)

Copyright 2023(c) Analog Devices, Inc.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  3. Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Function Documentation

◆ example_main()

int example_main ( void )
extern

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

  • 50 ADC readings with delay.
  • Threshold event (non-blocking).
    Returns
    ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
    ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
    Basic example main executiont.
  • 50 ADC readings with delay.
  • Threshold event (non-blocking).
    Returns
    ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
    Basic example main executiont.
Returns
ret - Result of the example execution. If working correctly, will execute print the sample data.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

  • 50 ADC readings with delay.
  • Threshold event (non-blocking).
    Returns
    ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
    Basic example main executiont.
Returns
ret - Result of the example execution. If working correctly, will execute print the sample data.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

Returns
ret - 0 on success.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run and will not return.
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

  • 50 ADC readings with delay.
  • Threshold event (non-blocking).
    Returns
    ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
    Basic example main executiont.
Returns
ret - Result of the example execution. If working correctly, will execute print the sample data.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

Returns
ret - 0 on success.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run and will not return.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will measure active and reactive energy and RMS for channel A and for voltage stopping whenever an interrupt occurs and resulting in a stoppage of the measurement.

Basic example main executiont.

Returns
ret - Result of the example execution.

Basic example main executiont.

This example demonstrates basic ADMT4000 functionality by continuously reading sensor values and displaying them on the console.

Returns
0 in case of success, negative error code otherwise.
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

  • 50 ADC readings with delay.
  • Threshold event (non-blocking).
    Returns
    ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
    Basic example main executiont.
Returns
ret - Result of the example execution. If working correctly, will execute print the sample data.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

Returns
ret - 0 on success.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run and will not return.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will measure active and reactive energy and RMS for channel A and for voltage stopping whenever an interrupt occurs and resulting in a stoppage of the measurement.

Basic example main executiont.

Returns
ret - Result of the example execution.

Basic example main executiont.

This example demonstrates basic ADMT4000 functionality by continuously reading sensor values and displaying them on the console.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Brings up the full JESD204 link between the FPGA and the ADRV903X:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  8. JESD204 link status readback
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and demonstrates DMA data transfer:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — load sine wave LUT into TX DMA buffer
  8. AXI ADC core init — reset TPL ADC core + IQ correction
  9. TX and RX DMAC initialization
  10. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  11. Start TX DMA (continuous sine wave to DAC)
  12. Wait 1 s then capture RX DMA samples
  13. Print buffer addresses for inspection
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and starts the IIO application loop:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — DDS mode (IIO Oscilloscope controls tones)
  8. AXI ADC core init — reset TPL + IQ correction
  9. RX data offload — normal mode + per-capture XFER_LENGTH + RESETN
  10. TX and RX DMAC initialization
  11. JESD204 topology initialization and FSM start
  12. IIO application init and run (blocking)
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run_with_trigs and will not return.
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

  • 50 ADC readings with delay.
  • Threshold event (non-blocking).
    Returns
    ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
    Basic example main executiont.
Returns
ret - Result of the example execution. If working correctly, will execute print the sample data.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

Returns
ret - 0 on success.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run and will not return.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will measure active and reactive energy and RMS for channel A and for voltage stopping whenever an interrupt occurs and resulting in a stoppage of the measurement.

Basic example main executiont.

Returns
ret - Result of the example execution.

Basic example main executiont.

This example demonstrates basic ADMT4000 functionality by continuously reading sensor values and displaying them on the console.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Brings up the full JESD204 link between the FPGA and the ADRV903X:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  8. JESD204 link status readback
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and demonstrates DMA data transfer:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — load sine wave LUT into TX DMA buffer
  8. AXI ADC core init — reset TPL ADC core + IQ correction
  9. TX and RX DMAC initialization
  10. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  11. Start TX DMA (continuous sine wave to DAC)
  12. Wait 1 s then capture RX DMA samples
  13. Print buffer addresses for inspection
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and starts the IIO application loop:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — DDS mode (IIO Oscilloscope controls tones)
  8. AXI ADC core init — reset TPL + IQ correction
  9. RX data offload — normal mode + per-capture XFER_LENGTH + RESETN
  10. TX and RX DMAC initialization
  11. JESD204 topology initialization and FSM start
  12. IIO application init and run (blocking)
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run_with_trigs and will not return.

Basic example main executiont.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute the code and end at error statement.
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

  • 50 ADC readings with delay.
  • Threshold event (non-blocking).
    Returns
    ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
    Basic example main executiont.
Returns
ret - Result of the example execution. If working correctly, will execute print the sample data.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

Returns
ret - 0 on success.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run and will not return.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will measure active and reactive energy and RMS for channel A and for voltage stopping whenever an interrupt occurs and resulting in a stoppage of the measurement.

Basic example main executiont.

Returns
ret - Result of the example execution.

Basic example main executiont.

This example demonstrates basic ADMT4000 functionality by continuously reading sensor values and displaying them on the console.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Brings up the full JESD204 link between the FPGA and the ADRV903X:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  8. JESD204 link status readback
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and demonstrates DMA data transfer:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — load sine wave LUT into TX DMA buffer
  8. AXI ADC core init — reset TPL ADC core + IQ correction
  9. TX and RX DMAC initialization
  10. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  11. Start TX DMA (continuous sine wave to DAC)
  12. Wait 1 s then capture RX DMA samples
  13. Print buffer addresses for inspection
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and starts the IIO application loop:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — DDS mode (IIO Oscilloscope controls tones)
  8. AXI ADC core init — reset TPL + IQ correction
  9. RX data offload — normal mode + per-capture XFER_LENGTH + RESETN
  10. TX and RX DMAC initialization
  11. JESD204 topology initialization and FSM start
  12. IIO application init and run (blocking)
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run_with_trigs and will not return.

Basic example main executiont.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute the code and end at error statement.

Basic example main executiont.

Returns
0 in case of success, negative error code otherwise
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

  • 50 ADC readings with delay.
  • Threshold event (non-blocking).
    Returns
    ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
    Basic example main executiont.
Returns
ret - Result of the example execution. If working correctly, will execute print the sample data.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

Returns
ret - 0 on success.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run and will not return.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will measure active and reactive energy and RMS for channel A and for voltage stopping whenever an interrupt occurs and resulting in a stoppage of the measurement.

Basic example main executiont.

Returns
ret - Result of the example execution.

Basic example main executiont.

This example demonstrates basic ADMT4000 functionality by continuously reading sensor values and displaying them on the console.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Brings up the full JESD204 link between the FPGA and the ADRV903X:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  8. JESD204 link status readback
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and demonstrates DMA data transfer:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — load sine wave LUT into TX DMA buffer
  8. AXI ADC core init — reset TPL ADC core + IQ correction
  9. TX and RX DMAC initialization
  10. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  11. Start TX DMA (continuous sine wave to DAC)
  12. Wait 1 s then capture RX DMA samples
  13. Print buffer addresses for inspection
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and starts the IIO application loop:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — DDS mode (IIO Oscilloscope controls tones)
  8. AXI ADC core init — reset TPL + IQ correction
  9. RX data offload — normal mode + per-capture XFER_LENGTH + RESETN
  10. TX and RX DMAC initialization
  11. JESD204 topology initialization and FSM start
  12. IIO application init and run (blocking)
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run_with_trigs and will not return.

Basic example main executiont.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute the code and end at error statement.

Basic example main executiont.

Returns
0 in case of success, negative error code otherwise

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will turn the status led's on and off in the while loop, set some values in the config 2 register, and then return 0.
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

  • 50 ADC readings with delay.
  • Threshold event (non-blocking).
    Returns
    ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
    Basic example main executiont.
Returns
ret - Result of the example execution. If working correctly, will execute print the sample data.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

Returns
ret - 0 on success.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run and will not return.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will measure active and reactive energy and RMS for channel A and for voltage stopping whenever an interrupt occurs and resulting in a stoppage of the measurement.

Basic example main executiont.

Returns
ret - Result of the example execution.

Basic example main executiont.

This example demonstrates basic ADMT4000 functionality by continuously reading sensor values and displaying them on the console.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Brings up the full JESD204 link between the FPGA and the ADRV903X:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  8. JESD204 link status readback
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and demonstrates DMA data transfer:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — load sine wave LUT into TX DMA buffer
  8. AXI ADC core init — reset TPL ADC core + IQ correction
  9. TX and RX DMAC initialization
  10. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  11. Start TX DMA (continuous sine wave to DAC)
  12. Wait 1 s then capture RX DMA samples
  13. Print buffer addresses for inspection
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and starts the IIO application loop:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — DDS mode (IIO Oscilloscope controls tones)
  8. AXI ADC core init — reset TPL + IQ correction
  9. RX data offload — normal mode + per-capture XFER_LENGTH + RESETN
  10. TX and RX DMAC initialization
  11. JESD204 topology initialization and FSM start
  12. IIO application init and run (blocking)
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run_with_trigs and will not return.

Basic example main executiont.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute the code and end at error statement.

Basic example main executiont.

Returns
0 in case of success, negative error code otherwise

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will turn the status led's on and off in the while loop, set some values in the config 2 register, and then return 0.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will show the user for each channels if there is digital input present or not. It also changes delay values for channel 3 and sets the state for channel 0 to OFF. If all these operations were performed correctly 0 will be returned.
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

  • 50 ADC readings with delay.
  • Threshold event (non-blocking).
    Returns
    ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
    Basic example main executiont.
Returns
ret - Result of the example execution. If working correctly, will execute print the sample data.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

Returns
ret - 0 on success.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run and will not return.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will measure active and reactive energy and RMS for channel A and for voltage stopping whenever an interrupt occurs and resulting in a stoppage of the measurement.

Basic example main executiont.

Returns
ret - Result of the example execution.

Basic example main executiont.

This example demonstrates basic ADMT4000 functionality by continuously reading sensor values and displaying them on the console.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Brings up the full JESD204 link between the FPGA and the ADRV903X:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  8. JESD204 link status readback
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and demonstrates DMA data transfer:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — load sine wave LUT into TX DMA buffer
  8. AXI ADC core init — reset TPL ADC core + IQ correction
  9. TX and RX DMAC initialization
  10. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  11. Start TX DMA (continuous sine wave to DAC)
  12. Wait 1 s then capture RX DMA samples
  13. Print buffer addresses for inspection
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and starts the IIO application loop:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — DDS mode (IIO Oscilloscope controls tones)
  8. AXI ADC core init — reset TPL + IQ correction
  9. RX data offload — normal mode + per-capture XFER_LENGTH + RESETN
  10. TX and RX DMAC initialization
  11. JESD204 topology initialization and FSM start
  12. IIO application init and run (blocking)
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run_with_trigs and will not return.

Basic example main executiont.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute the code and end at error statement.

Basic example main executiont.

Returns
0 in case of success, negative error code otherwise

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will turn the status led's on and off in the while loop, set some values in the config 2 register, and then return 0.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will show the user for each channels if there is digital input present or not. It also changes delay values for channel 3 and sets the state for channel 0 to OFF. If all these operations were performed correctly 0 will be returned.

Basic example main executiont.

Returns
ret - Result for the main execution of the example. If working correctly the device's channel 0 will be set to SOURCE mode and also have delay values changed. Counter values for channel 0 will be changed as well and printed afterwards. 0 will be returned at the end in case of succes.
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

  • 50 ADC readings with delay.
  • Threshold event (non-blocking).
    Returns
    ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.
    Basic example main executiont.
Returns
ret - Result of the example execution. If working correctly, will execute print the sample data.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously the while(1) loop and will not return.

Basic example main executiont.

Returns
ret - 0 on success.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run and will not return.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will measure active and reactive energy and RMS for channel A and for voltage stopping whenever an interrupt occurs and resulting in a stoppage of the measurement.

Basic example main executiont.

Returns
ret - Result of the example execution.

Basic example main executiont.

This example demonstrates basic ADMT4000 functionality by continuously reading sensor values and displaying them on the console.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Brings up the full JESD204 link between the FPGA and the ADRV903X:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  8. JESD204 link status readback
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and demonstrates DMA data transfer:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — load sine wave LUT into TX DMA buffer
  8. AXI ADC core init — reset TPL ADC core + IQ correction
  9. TX and RX DMAC initialization
  10. JESD204 topology initialization and FSM start FSM drives: MCS (LINK_SETUP/OPT_SETUP_STAGE1/2) + link enable
  11. Start TX DMA (continuous sine wave to DAC)
  12. Wait 1 s then capture RX DMA samples
  13. Print buffer addresses for inspection
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Brings up the full JESD204 link and starts the IIO application loop:

  1. AD9528 clock synthesizer setup (DEVCLK + SYSREF)
  2. SYSREF_REQ GPIO configuration
  3. ADXCVR initialization (TX and RX)
  4. AXI JESD204 TX and RX controller initialization
  5. ADRV903X initialization (firmware load up to PreMcsInit_NonBroadcast)
  6. AXI clkgen setup (lane_rate / 66 for JESD204C)
  7. AXI DAC core init — DDS mode (IIO Oscilloscope controls tones)
  8. AXI ADC core init — reset TPL + IQ correction
  9. RX data offload — normal mode + per-capture XFER_LENGTH + RESETN
  10. TX and RX DMAC initialization
  11. JESD204 topology initialization and FSM start
  12. IIO application init and run (blocking)
Returns
0 on success, negative error code on failure.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute continuously function iio_app_run_with_trigs and will not return.

Basic example main executiont.

Returns
0 in case of success, negative error code otherwise.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will execute the code and end at error statement.

Basic example main executiont.

Returns
0 in case of success, negative error code otherwise

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will turn the status led's on and off in the while loop, set some values in the config 2 register, and then return 0.

Basic example main executiont.

Returns
ret - Result of the example execution. If working correctly, will show the user for each channels if there is digital input present or not. It also changes delay values for channel 3 and sets the state for channel 0 to OFF. If all these operations were performed correctly 0 will be returned.

Basic example main executiont.

Returns
ret - Result for the main execution of the example. If working correctly the device's channel 0 will be set to SOURCE mode and also have delay values changed. Counter values for channel 0 will be changed as well and printed afterwards. 0 will be returned at the end in case of succes.

Basic example main executiont.

Returns
int

IIO descriptor and initialization parameter.

IIO app.

Declaring iio_devices structure

Initializing IIO app init param.

Initializing IIO app.

Running the IIO app (use iio_info or osc in terminal).

Set the threshold voltage to 5V

The comparator output will be available on the GPO_A pin

Set the DAC output on channel C to 5V

Measure input current on channel D

IIO descriptor and initialization parameter.

IIO app.

Declaring iio_devices structure

Initializing IIO app init param.

Initializing IIO app.

Running the IIO app (use iio_info or osc in terminal).

Set the threshold voltage to 5V

The comparator output will be available on the GPO_A pin

Set the DAC output on channel C to 5V

Measure input current on channel D

Initialize the ADC_RDY GPIO and associated IRQ event

Returns
0 if success, negative error code otherwise

IIO descriptor and initialization parameter.

IIO app.

Declaring iio_devices structure

Initializing IIO app init param.

Initializing IIO app.

Running the IIO app (use iio_info or osc in terminal).

Set the threshold voltage to 5V

The comparator output will be available on the GPO_A pin

Set the DAC output on channel C to 5V

Measure input current on channel D

Initialize the ADC_RDY GPIO and associated IRQ event

Returns
0 if success, negative error code otherwise

GPIO Pin Interrupt Controller

IIO descriptor and initialization parameter.

IIO app.

Declaring iio_devices structure

Initializing IIO app init param.

Initializing IIO app.

Running the IIO app (use iio_info or osc in terminal).

Set the threshold voltage to 5V

The comparator output will be available on the GPO_A pin

Set the DAC output on channel C to 5V

Measure input current on channel D

Initialize the ADC_RDY GPIO and associated IRQ event

Returns
0 if success, negative error code otherwise

GPIO Pin Interrupt Controller

Negative temperature

Positive temperature

Negative temperature

Positive temperature

IIO descriptor and initialization parameter.

IIO app.

Declaring iio_devices structure

Initializing IIO app init param.

Initializing IIO app.

Running the IIO app (use iio_info or osc in terminal).

Set the threshold voltage to 5V

The comparator output will be available on the GPO_A pin

Set the DAC output on channel C to 5V

Measure input current on channel D

Initialize the ADC_RDY GPIO and associated IRQ event

Returns
0 if success, negative error code otherwise

GPIO Pin Interrupt Controller

Negative temperature

Positive temperature

Negative temperature

Positive temperature

Switch to APG mode

Switch to AWG mode

IIO descriptor and initialization parameter.

IIO app.

Declaring iio_devices structure

Initializing IIO app init param.

Initializing IIO app.

Running the IIO app (use iio_info or osc in terminal).

Set the threshold voltage to 5V

The comparator output will be available on the GPO_A pin

Set the DAC output on channel C to 5V

Measure input current on channel D

Initialize the ADC_RDY GPIO and associated IRQ event

Returns
0 if success, negative error code otherwise

GPIO Pin Interrupt Controller

Negative temperature

Positive temperature

Negative temperature

Positive temperature

Switch to APG mode

Switch to AWG mode

Parameter to be passed when the callback is called.

GPIO Pin Interrupt Controller

MAX14906 Initialization

Setting SLED set bit 1 in the config register.

Turning the Status LEDs on, then off.

Setting a current limit for channel 0.

Read current limit for all channels.

Setting the on state for channel 0, and then verifying it.

IIO descriptor and initialization parameter.

Channel configuration to be used in the example.

IIO app.

Declaring iio_devices structure

Initializing IIO app init param.

Initializing IIO app.

Running the IIO app (use iio_info or osc in terminal).

IIO descriptor and initialization parameter.

IIO app.

Declaring iio_devices structure

Initializing IIO app init param.

Initializing IIO app.

Running the IIO app (use iio_info or osc in terminal).

Set the threshold voltage to 5V

The comparator output will be available on the GPO_A pin

Set the DAC output on channel C to 5V

Measure input current on channel D

Initialize the ADC_RDY GPIO and associated IRQ event

Returns
0 if success, negative error code otherwise

GPIO Pin Interrupt Controller

Negative temperature

Positive temperature

Negative temperature

Positive temperature

Switch to APG mode

Switch to AWG mode

Parameter to be passed when the callback is called.

GPIO Pin Interrupt Controller

MAX14906 Initialization

Setting SLED set bit 1 in the config register.

Turning the Status LEDs on, then off.

Setting a current limit for channel 0.

Read current limit for all channels.

Setting the on state for channel 0, and then verifying it.

IIO descriptor and initialization parameter.

Channel configuration to be used in the example.

IIO app.

Declaring iio_devices structure

Initializing IIO app init param.

Initializing IIO app.

Running the IIO app (use iio_info or osc in terminal).

Maximum value of 3V.

The increment of the AO1 to be used (needs to be smaller then the SR step-size).

Frequency of the signal.

Initializing GPIO 0 of MAX22017.

Setting its value to HIGH.

Changing operation mode of MAX22017.

Changing configuration of MAX22017.

Changing slew-rate configuration of MAX22017.

Reading the GAIN correction.

IIO descriptor and initialization parameter.

IIO app.

Declaring iio_devices structure

Initializing IIO app init param.

Initializing IIO app.

Running the IIO app (use iio_info or osc in terminal).

Set the threshold voltage to 5V

The comparator output will be available on the GPO_A pin

Set the DAC output on channel C to 5V

Measure input current on channel D

Initialize the ADC_RDY GPIO and associated IRQ event

Returns
0 if success, negative error code otherwise

GPIO Pin Interrupt Controller

Negative temperature

Positive temperature

Negative temperature

Positive temperature

Switch to APG mode

Switch to AWG mode

Parameter to be passed when the callback is called.

GPIO Pin Interrupt Controller

MAX14906 Initialization

Setting SLED set bit 1 in the config register.

Turning the Status LEDs on, then off.

Setting a current limit for channel 0.

Read current limit for all channels.

Setting the on state for channel 0, and then verifying it.

IIO descriptor and initialization parameter.

Channel configuration to be used in the example.

IIO app.

Declaring iio_devices structure

Initializing IIO app init param.

Initializing IIO app.

Running the IIO app (use iio_info or osc in terminal).

Maximum value of 3V.

The increment of the AO1 to be used (needs to be smaller then the SR step-size).

Frequency of the signal.

Initializing GPIO 0 of MAX22017.

Setting its value to HIGH.

Changing operation mode of MAX22017.

Changing configuration of MAX22017.

Changing slew-rate configuration of MAX22017.

Reading the GAIN correction.

◆ main()

int main ( void )

Main function for Mbed platform.

Returns
ret - Result of the enabled examples.