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cn0391.h
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1/***************************************************************************/
33
34#ifndef __CN0391_H__
35#define __CN0391_H__
36
37#include "ad7124.h"
38#include "no_os_thermocouple.h"
39#include "no_os_rtd.h"
40
41#define CN0391_ADC_RESOLUTION 24 /* AD7124 is a high precision 24-bit Sigma-Delta ADC */
42#define CN0391_ADC_FULL_SCALE (1U << CN0391_ADC_RESOLUTION) /* 2^24 */
43#define CN0391_ADC_MIDSCALE (CN0391_ADC_FULL_SCALE >> 1) /* 2^23, bipolar zero-code */
44
45#define CN0391_GAIN 32
46#define CN0391_RTD_GAIN 1
47#define CN0391_THERMO_RES 1600
48#define CN0391_ADC_REF_VOLTAGE 2.5
49
50/* AD7124 setup indices */
51#define CN0391_SETUP_TC_IDX 0 /* Thermocouple: Gain=32, bipolar, internal ref */
52#define CN0391_SETUP_RTD_IDX 1 /* R5 + CJC RTD: Gain=1, bipolar, internal ref */
53
54/* AD7124-8 internal oscillator frequency at full power mode (Hz) */
55#define CN0391_ADC_CLK_HZ 614400ULL
56/* Filter FS register value: sets output data rate = fCLK / (32 × FS) */
57#define CN0391_FILTER_FS 384U
58
59/*
60 * Digital filter type selection.
61 * Override at build time with -DCN0391_FILTER_TYPE=<value>:
62 * 0 — Sinc4: best noise rejection, 4-period settling (default)
63 * 2 — Sinc3: 25% faster settling, slightly lower noise rejection
64 *
65 * AD7124_FILT_REG_FILTER(CN0391_FILTER_TYPE) encodes this into the
66 * filter register bits [23:21].
67 *
68 * NOTE: in single conversion mode (used by cn0391_read_temperature) the
69 * AD7124 always runs the full 4-stage CIC filter for settling regardless
70 * of this setting. Sinc3 vs Sinc4 therefore has no effect on acquisition
71 * speed here; it only affects noise shaping of the output word. The only
72 * effective knob for reducing conversion time in this mode is CN0391_FILTER_FS.
73 */
74#ifndef CN0391_FILTER_TYPE
75#define CN0391_FILTER_TYPE 0 /* Sinc4 */
76#endif
77
78#if (CN0391_FILTER_TYPE == 0)
79#define CN0391_FILTER_ORDER 4U /* Sinc4: 4-period settling */
80#elif (CN0391_FILTER_TYPE == 2)
81#define CN0391_FILTER_ORDER 3U /* Sinc3: 3-period settling */
82#else
83#error "CN0391_FILTER_TYPE must be 0 (Sinc4) or 2 (Sinc3)"
84#endif
85
86/*
87 * Filter register value combining type, FS, and no post-filter.
88 * Used to initialise all 8 AD7124 filter setup registers in common_data.c.
89 */
90#define CN0391_FILTER_REG_VAL \
91 (AD7124_FILT_REG_FILTER(CN0391_FILTER_TYPE) | AD7124_FILT_REG_FS(CN0391_FILTER_FS))
92
93/*
94 * Worst-case time for one single conversion (µs).
95 * SincN requires (filter_order + 1) conversion periods before producing a
96 * valid output after a channel switch:
97 * t_conv = (filter_order + 1) × FS × 32 / fCLK
98 */
99#define CN0391_CONV_TIME_US \
100 (((CN0391_FILTER_ORDER + 1U) * CN0391_FILTER_FS * 32ULL * 1000000ULL) \
101 / CN0391_ADC_CLK_HZ)
102
103/*
104 * Minimum number of SPI STATUS register polls to cover one worst-case
105 * conversion, with a 2× safety margin.
106 * Each poll transfers 2 bytes (1 command + 1 STATUS data byte):
107 * poll_time_us = 2 × 8 / spi_hz × 1e6
108 * poll_cnt = conv_time_us × 2 / poll_time_us
109 * = conv_time_us × spi_hz / (8 × 1e6)
110 */
111#define CN0391_SPI_RDY_POLL_CNT(spi_hz) \
112 ((CN0391_CONV_TIME_US * 2ULL * (spi_hz)) / (16ULL * 1000000ULL))
113
114#define CN0391_ADC_CHANNELS_PER_IIO_CH 3
115
116#define CN0391_NUM_IIO_CHANNELS 4
117
118#define CN0391_CH0_ID 0
119#define CN0391_CH1_ID 1
120#define CN0391_CH2_ID 2
121#define CN0391_CH3_ID 3
122
123/* ADC channel triplet for one thermocouple IIO channel */
125 uint8_t tc; /* thermocouple ADC channel */
126 uint8_t r5; /* reference resistor R5 ADC channel */
127 uint8_t rtd; /* CJC RTD ADC channel */
128 uint8_t iout_ain; /* AIN pin index for IOUT0 excitation (IOUT_CH0 field) */
129};
130
137
140 /* Cached last measurement per IIO channel; -1 = no valid cache */
141 int8_t cache_ch;
143};
144
148
155int cn0391_init(struct cn0391_dev **dev,
157
163int cn0391_remove(struct cn0391_dev *dev);
164
178int cn0391_read_temperature(struct cn0391_dev *dev, uint8_t ch_idx,
179 double *hot_junction_temp,
180 double *cold_junction_temp,
181 double *thermocouple_voltage,
182 double *rtd_resistance);
183
184#endif /* __CN0391_H__ */
AD7124 header file. Devices: AD7124-4, AD7124-8.
struct ad7616_init_param init_param
Definition ad7616_sdz.c:106
int cn0391_init(struct cn0391_dev **dev, struct cn0391_init_param *init_param)
Initialize CN0391 device: set up AD7124 and configure IOUT.
Definition cn0391.c:89
int cn0391_read_temperature(struct cn0391_dev *dev, uint8_t ch_idx, double *hot_junction_temp, double *cold_junction_temp, double *thermocouple_voltage, double *rtd_resistance)
Perform a full temperature measurement cycle. Reads all 3 ADC channels (thermocouple,...
Definition cn0391.c:150
int cn0391_remove(struct cn0391_dev *dev)
Remove CN0391 device and free resources.
Definition cn0391.c:137
Header file of RTD temperature conversion routines.
Header file of thermocouple temperature conversion routines.
Definition ad7124.h:527
Definition cn0391.h:124
uint8_t r5
Definition cn0391.h:126
uint8_t iout_ain
Definition cn0391.h:128
uint8_t rtd
Definition cn0391.h:127
uint8_t tc
Definition cn0391.h:125
Definition cn0391.h:131
double tc_voltage
Definition cn0391.h:134
double rtd_resistance
Definition cn0391.h:135
double cold_junction_temp
Definition cn0391.h:133
double hot_junction_temp
Definition cn0391.h:132
Definition cn0391.h:138
struct cn0391_cache cache
Definition cn0391.h:142
struct ad7124_dev * ad7124_dev
Definition cn0391.h:139
int8_t cache_ch
Definition cn0391.h:141
Definition cn0391.h:145
struct ad7124_init_param * ad7124_init
Definition cn0391.h:146