#include <ad9172.h>
◆ appJesdConfig
◆ channel_interpolation
| uint32_t ad9172_state::channel_interpolation |
◆ clk_data
◆ clock_output_config
| uint32_t ad9172_state::clock_output_config |
◆ dac_clk
◆ dac_clkin_Hz
| uint64_t ad9172_state::dac_clkin_Hz |
◆ dac_h
◆ dac_interpolation
| uint32_t ad9172_state::dac_interpolation |
◆ dac_rate_khz
| uint32_t ad9172_state::dac_rate_khz |
◆ id
◆ interpolation
| uint32_t ad9172_state::interpolation |
◆ jesd_dual_link_mode
| uint32_t ad9172_state::jesd_dual_link_mode |
◆ jesd_link_mode
| uint32_t ad9172_state::jesd_link_mode |
◆ jesd_subclass
| uint32_t ad9172_state::jesd_subclass |
◆ logic_lanes
| uint8_t ad9172_state::logic_lanes[8] |
◆ nco_channel_enable
| uint8_t ad9172_state::nco_channel_enable |
◆ nco_main_enable
| uint8_t ad9172_state::nco_main_enable |
◆ parent
◆ pll_bypass
| bool ad9172_state::pll_bypass |
◆ scrambling
| uint32_t ad9172_state::scrambling |
◆ syncoutb_type
◆ sysref_coupling
◆ sysref_mode
| uint32_t ad9172_state::sysref_mode |
The documentation for this struct was generated from the following file: