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Public Attributes | List of all members
ad9361_phy_platform_data Struct Reference

#include <ad9361.h>

Collaboration diagram for ad9361_phy_platform_data:
[legend]

Public Attributes

bool rx2tx2
 
bool fdd
 
bool fdd_independent_mode
 
bool split_gt
 
bool use_extclk
 
bool ensm_pin_pulse_mode
 
bool ensm_pin_ctrl
 
bool debug_mode
 
bool tdd_use_dual_synth
 
bool tdd_skip_vco_cal
 
bool use_ext_rx_lo
 
bool use_ext_tx_lo
 
bool rx1rx2_phase_inversion_en
 
bool qec_tracking_slow_mode_en
 
uint8_t dc_offset_update_events
 
uint8_t dc_offset_attenuation_high
 
uint8_t dc_offset_attenuation_low
 
uint8_t rf_dc_offset_count_high
 
uint8_t rf_dc_offset_count_low
 
uint8_t dig_interface_tune_skipmode
 
uint8_t dig_interface_tune_fir_disable
 
uint8_t lo_powerdown_managed_en
 
uint32_t dcxo_coarse
 
uint32_t dcxo_fine
 
uint32_t rf_rx_input_sel
 
uint32_t rf_tx_output_sel
 
uint32_t rx1tx1_mode_use_rx_num
 
uint32_t rx1tx1_mode_use_tx_num
 
uint32_t rx_path_clks [NUM_RX_CLOCKS]
 
uint32_t tx_path_clks [NUM_TX_CLOCKS]
 
uint32_t trx_synth_max_fref
 
uint64_t rx_synth_freq
 
uint64_t tx_synth_freq
 
uint32_t rf_rx_bandwidth_Hz
 
uint32_t rf_tx_bandwidth_Hz
 
int32_t tx_atten
 
bool update_tx_gain_via_alert
 
uint32_t rx_fastlock_delay_ns
 
uint32_t tx_fastlock_delay_ns
 
bool trx_fastlock_pinctrl_en [2]
 
enum ad9361_clkout ad9361_clkout_mode
 
struct gain_control gain_ctrl
 
struct rssi_control rssi_ctrl
 
struct port_control port_ctrl
 
struct ctrl_outs_control ctrl_outs_ctrl
 
struct elna_control elna_ctrl
 
struct auxadc_control auxadc_ctrl
 
struct auxdac_control auxdac_ctrl
 
struct gpo_control gpo_ctrl
 
struct tx_monitor_control txmon_ctrl
 

Member Data Documentation

◆ ad9361_clkout_mode

enum ad9361_clkout ad9361_phy_platform_data::ad9361_clkout_mode

◆ auxadc_ctrl

struct auxadc_control ad9361_phy_platform_data::auxadc_ctrl

◆ auxdac_ctrl

struct auxdac_control ad9361_phy_platform_data::auxdac_ctrl

◆ ctrl_outs_ctrl

struct ctrl_outs_control ad9361_phy_platform_data::ctrl_outs_ctrl

◆ dc_offset_attenuation_high

uint8_t ad9361_phy_platform_data::dc_offset_attenuation_high

◆ dc_offset_attenuation_low

uint8_t ad9361_phy_platform_data::dc_offset_attenuation_low

◆ dc_offset_update_events

uint8_t ad9361_phy_platform_data::dc_offset_update_events

◆ dcxo_coarse

uint32_t ad9361_phy_platform_data::dcxo_coarse

◆ dcxo_fine

uint32_t ad9361_phy_platform_data::dcxo_fine

◆ debug_mode

bool ad9361_phy_platform_data::debug_mode

◆ dig_interface_tune_fir_disable

uint8_t ad9361_phy_platform_data::dig_interface_tune_fir_disable

◆ dig_interface_tune_skipmode

uint8_t ad9361_phy_platform_data::dig_interface_tune_skipmode

◆ elna_ctrl

struct elna_control ad9361_phy_platform_data::elna_ctrl

◆ ensm_pin_ctrl

bool ad9361_phy_platform_data::ensm_pin_ctrl

◆ ensm_pin_pulse_mode

bool ad9361_phy_platform_data::ensm_pin_pulse_mode

◆ fdd

bool ad9361_phy_platform_data::fdd

◆ fdd_independent_mode

bool ad9361_phy_platform_data::fdd_independent_mode

◆ gain_ctrl

struct gain_control ad9361_phy_platform_data::gain_ctrl

◆ gpo_ctrl

struct gpo_control ad9361_phy_platform_data::gpo_ctrl

◆ lo_powerdown_managed_en

uint8_t ad9361_phy_platform_data::lo_powerdown_managed_en

◆ port_ctrl

struct port_control ad9361_phy_platform_data::port_ctrl

◆ qec_tracking_slow_mode_en

bool ad9361_phy_platform_data::qec_tracking_slow_mode_en

◆ rf_dc_offset_count_high

uint8_t ad9361_phy_platform_data::rf_dc_offset_count_high

◆ rf_dc_offset_count_low

uint8_t ad9361_phy_platform_data::rf_dc_offset_count_low

◆ rf_rx_bandwidth_Hz

uint32_t ad9361_phy_platform_data::rf_rx_bandwidth_Hz

◆ rf_rx_input_sel

uint32_t ad9361_phy_platform_data::rf_rx_input_sel

◆ rf_tx_bandwidth_Hz

uint32_t ad9361_phy_platform_data::rf_tx_bandwidth_Hz

◆ rf_tx_output_sel

uint32_t ad9361_phy_platform_data::rf_tx_output_sel

◆ rssi_ctrl

struct rssi_control ad9361_phy_platform_data::rssi_ctrl

◆ rx1rx2_phase_inversion_en

bool ad9361_phy_platform_data::rx1rx2_phase_inversion_en

◆ rx1tx1_mode_use_rx_num

uint32_t ad9361_phy_platform_data::rx1tx1_mode_use_rx_num

◆ rx1tx1_mode_use_tx_num

uint32_t ad9361_phy_platform_data::rx1tx1_mode_use_tx_num

◆ rx2tx2

bool ad9361_phy_platform_data::rx2tx2

◆ rx_fastlock_delay_ns

uint32_t ad9361_phy_platform_data::rx_fastlock_delay_ns

◆ rx_path_clks

uint32_t ad9361_phy_platform_data::rx_path_clks[NUM_RX_CLOCKS]

◆ rx_synth_freq

uint64_t ad9361_phy_platform_data::rx_synth_freq

◆ split_gt

bool ad9361_phy_platform_data::split_gt

◆ tdd_skip_vco_cal

bool ad9361_phy_platform_data::tdd_skip_vco_cal

◆ tdd_use_dual_synth

bool ad9361_phy_platform_data::tdd_use_dual_synth

◆ trx_fastlock_pinctrl_en

bool ad9361_phy_platform_data::trx_fastlock_pinctrl_en[2]

◆ trx_synth_max_fref

uint32_t ad9361_phy_platform_data::trx_synth_max_fref

◆ tx_atten

int32_t ad9361_phy_platform_data::tx_atten

◆ tx_fastlock_delay_ns

uint32_t ad9361_phy_platform_data::tx_fastlock_delay_ns

◆ tx_path_clks

uint32_t ad9361_phy_platform_data::tx_path_clks[NUM_TX_CLOCKS]

◆ tx_synth_freq

uint64_t ad9361_phy_platform_data::tx_synth_freq

◆ txmon_ctrl

struct tx_monitor_control ad9361_phy_platform_data::txmon_ctrl

◆ update_tx_gain_via_alert

bool ad9361_phy_platform_data::update_tx_gain_via_alert

◆ use_ext_rx_lo

bool ad9361_phy_platform_data::use_ext_rx_lo

◆ use_ext_tx_lo

bool ad9361_phy_platform_data::use_ext_tx_lo

◆ use_extclk

bool ad9361_phy_platform_data::use_extclk
The documentation for this struct was generated from the following file: