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Structure representing an SPI engine device. More...
#include <spi_engine.h>
Public Attributes | |
| uint32_t | ref_clk_hz |
| enum xil_spi_type | type |
| struct axi_dmac * | offload_tx_dma |
| struct axi_dmac * | offload_rx_dma |
| enum cyclic_transfer | cyclic |
| uint8_t | offload_config |
| uint8_t | offload_tx_len |
| uint8_t | offload_rx_len |
| uint32_t | spi_engine_baseaddr |
| uint32_t | rx_dma_baseaddr |
| uint32_t | tx_dma_baseaddr |
| uint8_t | cs_delay |
| uint32_t | clk_div |
| uint8_t | data_width |
| uint8_t | max_data_width |
| uint8_t | sdo_idle_state |
Structure representing an SPI engine device.
| uint32_t spi_engine_desc::clk_div |
Clock divider used in transmission delays
| uint8_t spi_engine_desc::cs_delay |
Delay between the CS toggle and the start of SCLK
| enum cyclic_transfer spi_engine_desc::cyclic |
Transfer mode for Tx DMAC
| uint8_t spi_engine_desc::data_width |
Data with of one SPI transfer ( in bits )
| uint8_t spi_engine_desc::max_data_width |
The maximum data width supported by the engine
| uint8_t spi_engine_desc::offload_config |
Offload's module transfer direction : TX, RX or both
| struct axi_dmac* spi_engine_desc::offload_rx_dma |
Pointer to a DMAC used in reception
| uint8_t spi_engine_desc::offload_rx_len |
Number of words that the module has to receive
| struct axi_dmac* spi_engine_desc::offload_tx_dma |
Pointer to a DMAC used in transmission
| uint8_t spi_engine_desc::offload_tx_len |
Number of words that the module has to send
| uint32_t spi_engine_desc::ref_clk_hz |
SPI engine reference clock
| uint32_t spi_engine_desc::rx_dma_baseaddr |
Base address where the RX DMAC core is situated
| uint8_t spi_engine_desc::sdo_idle_state |
output of SDO when CS is inactive or read-only transfers
| uint32_t spi_engine_desc::spi_engine_baseaddr |
Base address where the HDL core is situated
| uint32_t spi_engine_desc::tx_dma_baseaddr |
Base address where the TX DMAC core is situated
| enum xil_spi_type spi_engine_desc::type |
Type of implementation