#include <stdlib.h>
#include <stdint.h>
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include "xil_printf.h"

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Classes
struct	CEC_INTERRUPTS

struct	cec_status

Macros
#define	RX_DEVICE 0 /Set the Target Rx device. Tv Driver supports the following devices: 7844, 7842, 7604, 7840, 7612, 7611, 7614, 7622/3, 7619 /

#define	TX_DEVICE 7511 /Set the Target Tx Device. Tv Driver supports the following Tx devices: 7623/2, 7511, 7510, 7520 /

#define	TX_USER_CONFIG 1 /Always set to 1 when using ADI REP Middleware and ADI REP Application. /

#define	TX_USER_INIT 0 /Always set to 0. Set to 1 for customer initialisation custimization only. /

#define	TX_CALLBACK_FUNCTION TRANSMITTER_Notification

#define	UART_DEBUG 1 /Set to 1 to enable Debug message Printouts. Set to 0 to disable. /

#define	IGNORE_INT_LINES 1 /Set to 1 to ignore hw interrupt pin status to determine if interrupt is pending. Software method used only/

#define	ADVANTIV 1

#define	STATIC static

#define	INLINE inline

#define	CONSTANT const

#define	EXTERNAL extern

#define	PACKED __attribute__((packed))

#define	PACKED_STR struct PACKED

#define	UINT8 UCHAR

#define	BOOL UCHAR

#define	TRUE 1

#define	FALSE 0

#define	NULL ((void *)0)

#define	ADV7511_MAIN_I2C_ADDR 0x39

#define	ADV7511_MAIN_CEC_TX_STATUS 0x97

#define	ADV7511_MAIN_CEC_TX_STATUS_RDY(x) (((x) << 5) & 0x20)

#define	ADV7511_MAIN_CEC_TX_STATUS_ALI(x) (((x) << 4) & 0x10)

#define	ADV7511_MAIN_CEC_TX_STATUS_RTI(x) (((x) << 3) & 0x08)

#define	ADV7511_MAIN_CEC_PWRDWN 0xe2

#define	ADV7511_MAIN_CEC_PWRDWN_SET(x) (((x) << 1) & 0x01)

#define	ADV7511_CEC_I2C_ADDR 0x3c

#define	ADV7511_CEC_TX_FRAME_HEADER 0x00

#define	ADV7511_CEC_TX_FRAME_LENGTH 0x10

#define	ADV7511_CEC_TX_FRAME_LENGTH_MASK 0x1f

#define	ADV7511_CEC_TX_FRAME_LENGTH_SHIFT 0x00

#define	ADV7511_CEC_TX_TRANS_ENABLE 0x11

#define	ADV7511_CEC_TX_TRANS_ENABLE_MASK 0x01

#define	ADV7511_CEC_TX_TRANS_ENABLE_SHIFT 0x00

#define	ADV7511_CEC_TX_TRANSMISSION_EN 0x11

#define	ADV7511_CEC_TX_TRANSMISSION_EN_SET(x) (((x) << 0) & 0x1)

#define	ADV7511_CEC_TX_RETRY_COUNT 0x12

#define	ADV7511_CEC_TX_RETRY_COUNT_MASK 0x70

#define	ADV7511_CEC_TX_RETRY_COUNT_SHIFT 0x04

#define	ADV7511_CEC_TX_RETRY_COUNT_SET(x) (((x) << 4) & 0x70)

#define	ADV7511_CEC_TX_NACK_CNT 0x14

#define	ADV7511_CEC_TX_NACK_CNT_MASK 0x0f

#define	ADV7511_CEC_TX_NACK_CNT_SHIFT 0x00

#define	ADV7511_CEC_RX_BUFF1_HDR 0x15

#define	ADV7511_CEC_RX_ENABLE 0x26

#define	ADV7511_CEC_RX_ENABLE_MASK 0x40

#define	ADV7511_CEC_RX_ENABLE_SHIFT 0x06

#define	ADV7511_CEC_RX_BUFF2_HDR 0x27

#define	ADV7511_CEC_RX_BUFF3_HDR 0x38

#define	ADV7511_CEC_RX_BUFFER_NUMBER 0x4a

#define	ADV7511_CEC_RX_BUFFER_NUMBER_MASK 0x08

#define	ADV7511_CEC_RX_BUFFER_NUMBER_SHIFT 0x03

#define	ADV7511_CEC_RX_BUFFER1_RDY 0x4a

#define	ADV7511_CEC_RX_BUFFER1_RDY_MASK 0x01

#define	ADV7511_CEC_RX_BUFFER1_RDY_SHIFT 0x00

#define	ADV7511_CEC_RX_BUFFER2_RDY 0x4a

#define	ADV7511_CEC_RX_BUFFER2_RDY_MASK 0x02

#define	ADV7511_CEC_RX_BUFFER2_RDY_SHIFT 0x01

#define	ADV7511_CEC_RX_BUFFER3_RDY 0x4a

#define	ADV7511_CEC_RX_BUFFER3_RDY_MASK 0x04

#define	ADV7511_CEC_RX_BUFFER3_RDY_SHIFT 0x02

#define	ADV7511_CEC_LOGICADDR_DEV01_REG 0x4c

#define	ADV7511_CEC_LOGICADDR_DEV2_REG 0x4d

#define	ADV7511_CEC_LOGICADDR_MASK 0x4b

#define	ADV7511_CEC_LOGICADDR_MASK_MASK 0x70

#define	ADV7511_CEC_LOGICADDR_MASK_SHIFT 0x04

#define	ADV7511_CEC_LOGICADDR_MASK_ADDR0 0x01

#define	ADV7511_CEC_LOGICADDR_MASK_ADDR1 0x02

#define	ADV7511_CEC_LOGICADDR_MASK_ADDR2 0x04

#define	ADV7511_CEC_LOGICADDR0 0x4c

#define	ADV7511_CEC_LOGICADDR0_MASK 0x0f

#define	ADV7511_CEC_LOGICADDR0_SHIFT 0x00

#define	ADV7511_CEC_LOGICADDR1 0x4c

#define	ADV7511_CEC_LOGICADDR1_MASK 0xf0

#define	ADV7511_CEC_LOGICADDR1_SHIFT 0x04

#define	ADV7511_CEC_LOGICADDR2 0x4d

#define	ADV7511_CEC_LOGICADDR2_MASK 0x0f

#define	ADV7511_CEC_LOGICADDR2_SHIFT 0x00

#define	ADV7511_CEC_POWER_MODE 0x4e

#define	ADV7511_CEC_POWER_MODE_MASK 0x03

#define	ADV7511_CEC_POWER_MODE_SHIFT 0x00

#define	ADV7511_CEC_POWER_MODE_SET(x) (((x) << 0) & 0x01)

#define	ADV7511_CEC_SOFT_RESET 0x50

#define	ADV7511_CEC_SOFT_RESET_MASK 0x01

#define	ADV7511_CEC_SOFT_RESET_SHIFT 0x00

#define	ADV7511_CEC_SOFT_RESET_SET(x) (((x) << 0) & 0x01)

#define	MAX_VIC_VALUE 64

#define	NUM_OF_VICS (MAX_VIC_VALUE+1)

#define	CEC_RETRY_COUNT 3

#define	CEC_MAX_MSG_SIZE 16

#define	CEC_TX_BUF_LEN 30

#define	PKT_AV_INFO_FRAME 0x0001

#define	PKT_AUDIO_INFO_FRAME 0x0002

#define	PKT_ACP_PACKET 0x0004

#define	PKT_SPD_PACKET 0x0008

#define	PKT_ISRC1_PACKET 0x0010

#define	PKT_ISRC2_PACKET 0x0020

#define	PKT_GMD_PACKET 0x0040

#define	PKT_GC_PACKET 0x0080

#define	PKT_MPEG_PACKET 0x0100

#define	PKT_VS_PACKET 0x0200

#define	PKT_AUDIO_SAMPLE_PACKET 0x0800

#define	PKT_ACR_PACKET 0x1000

#define	PKT_ALL_PACKETS 0xffff

#define	CEC_TRIPLE_NUMBER 3

#define	DBG_MSG xil_printf

#define	RX_I2C_IO_MAP_ADDR 0x40

#define	RX2_I2C_IO_MAP_ADDR 0xB4

#define	RX_I2C_SDP_VDP_MAP_ADDR 0x22

#define	RX_I2C_AFE_DPLL_MAP_ADDR 0x30

#define	RX_I2C_ESDP_MAP_ADDR 0x34 /* Def 0x70 */

#define	RX_I2C_SDP_IO_MAP_ADDR 0x42

#define	RX_I2C_CP_MAP_ADDR 0x44

#define	RX_I2C_VDP_MAP_ADDR 0x48

#define	RX_I2C_TEST_MAP3_ADDR 0x52

#define	RX_I2C_TEST_MAP1_ADDR 0x60

#define	RX_I2C_TEST_MAP2_ADDR 0x62

#define	RX_I2C_REPEATER_MAP_ADDR 0x64

#define	RX_I2C_HDMI_MAP_ADDR 0x68

#define	RX_I2C_EDID_MAP_ADDR 0x6C

#define	RX_I2C_DPP_MAP_ADDR 0x74 /* Def 0x78 */

#define	RX_I2C_INFOFRAME_MAP_ADDR 0x76 /* 0x7C on ATV_MB seems to cause readback of all 0x00, occasionally. Happens more often when no Sink is connected */

#define	RX_I2C_CEC_MAP_ADDR 0x80

#define	RX_I2C_SDP_MAP_ADDR 0x82

#define	RX_I2C_AVLINK_MAP_ADDR 0x84

#define	RX_I2C_OSD_MAP_ADDR 0x88

#define	RX_I2C_AUDIO_CODEC_MAP_ADDR 0x5C

#define	RX_I2C_XMEM_MAP_ADDR 0xA8

#define	RX_I2C_VFE_MAP_ADDR 0xA0

#define	RX2_I2C_SDP_VDP_MAP_ADDR 0xC0

#define	RX2_I2C_AFE_DPLL_MAP_ADDR 0xC2

#define	RX2_I2C_ESDP_MAP_ADDR 0xC4 /* Def 0x70 */

#define	RX2_I2C_SDP_IO_MAP_ADDR 0xC6

#define	RX2_I2C_CP_MAP_ADDR 0xC8

#define	RX2_I2C_VDP_MAP_ADDR 0xCA

#define	RX2_I2C_TEST_MAP3_ADDR 0xCC

#define	RX2_I2C_TEST_MAP1_ADDR 0xCE

#define	RX2_I2C_TEST_MAP2_ADDR 0xD0

#define	RX2_I2C_REPEATER_MAP_ADDR 0xD2

#define	RX2_I2C_HDMI_MAP_ADDR 0xD4

#define	RX2_I2C_EDID_MAP_ADDR 0xD6

#define	RX2_I2C_DPP_MAP_ADDR 0xD8 /* Def 0x78 */

#define	RX2_I2C_INFOFRAME_MAP_ADDR 0xDA

#define	RX2_I2C_CEC_MAP_ADDR 0xDC

#define	RX2_I2C_SDP_MAP_ADDR 0xDE

#define	RX2_I2C_AVLINK_MAP_ADDR 0xE0

#define	RX2_I2C_OSD_MAP_ADDR 0xE2

#define	RX2_I2C_VFE_MAP_ADDR RX_I2C_VFE_MAP_ADDR

#define	RX2_I2C_AUDIO_CODEC_MAP_ADDR RX_I2C_AUDIO_CODEC_MAP_ADDR

#define	RX2_I2C_XMEM_GAMMA_MAP_ADDR RX_I2C_XMEM_MAP_ADDR

#define	TX_I2C_MAIN_MAP_ADDR 0x72

#define	TX2_I2C_MAIN_MAP_ADDR 0x7A

#define	TX_I2C_PKT_MEM_MAP_ADDR 0x70

#define	TX_I2C_CEC_MAP_ADDR 0x78

#define	TX_I2C_EDID_MAP_ADDR 0x7E

#define	TX2_I2C_PKT_MEM_MAP_ADDR 0x76

#define	TX2_I2C_CEC_MAP_ADDR 0x82

#define	TX2_I2C_EDID_MAP_ADDR 0x86

#define	TX_INCLUDE_CEC 1

#define	TX_EDID_RETRY_COUNT 8

#define	TX_NUM_OF_DEVICES 1

#define	REP_SUPPORTED_DS_DEVICE_COUNT 12

#define	REP_SUPPORTED_EDID_SEGMENTS 2

#define	TX_SUPPORTED_DS_DEVICE_COUNT REP_SUPPORTED_DS_DEVICE_COUNT

#define	TX_SUPPORTED_EDID_SEGMENTS REP_SUPPORTED_EDID_SEGMENTS

#define	CEC_RX_BUFFER1 0

#define	CEC_RX_BUFFER2 1

#define	CEC_RX_BUFFER3 2

#define	CEC_TRIPLE_NUMBER 3

#define	ATV_I2CIsField8 (BOOL)ATV_I2CReadField8

#define	ATV_I2CGetField8(d, r, m, b, p) *p=ATV_I2CReadField8(d,r,m,b)

#define	ATV_I2CGetField32(d, r, Mm, Lm, b, s, p) *p=ATV_I2CReadField32(d,r,Mm,Lm,b,s)

#define	ATV_I2CGetField32LE(d, r, Mm, Lm, b, s, p) *p=ATV_I2CReadField32LE(d,r,Mm,Lm,b,s)

#define	ATV_I2CGetMultiField(d, r, s, p) HAL_I2CReadBlock(d,r,p,(UINT16)s)

Typedefs
typedef unsigned char	UCHAR

typedef unsigned short	UINT16

typedef unsigned long	UINT32

typedef short int	INT16

typedef long int	INT32

typedef char	CHAR

typedef unsigned short	u16

typedef unsigned long	u32

typedef unsigned char	u8

Enumerations
enum	ATV_ERR { ATVERR_OK = 0, ATVERR_FALSE = 0, ATVERR_TRUE = 1, ATVERR_INV_PARM, ATVERR_NOT_AVAILABLE, ATVERR_FAILED }

enum	{ CEC_EVENT_RX_MSG, CEC_EVENT_TX_DONE, CEC_EVENT_TX_TIMEOUT, CEC_EVENT_TX_ARB_LOST, CEC_EVENT_LOG_ADDR_ALLOC, CEC_EVENT_LOG_ADDR_LIST, CEC_EVENT_RX_MSG_RESPOND }

enum	cec_tx_state_machine { CEC_TX_STATE_DONE, CEC_TX_STATE_BUSY }

enum	cec_operations { CEC_OP_NONE, CEC_OP_LOG_ADDR_ALLOC, CEC_OP_GET_LOG_ADDR_LIST }

Functions
void	HAL_DelayMs (UINT16 Counter)

UCHAR	HAL_I2CReadByte (UCHAR Dev, UCHAR Reg, UCHAR *Data)

UCHAR	HAL_I2CWriteByte (UCHAR Dev, UCHAR Reg, UCHAR Data)

UINT16	HAL_I2CReadBlock (UCHAR Dev, UCHAR Reg, UCHAR *Data, UINT16 NumberBytes)

UINT16	HAL_I2CWriteBlock (UCHAR Dev, UCHAR Reg, UCHAR *Data, UINT16 NumberBytes)

UCHAR	HAL_SetRxChipSelect (UCHAR DevIdx)

void	WaitMilliSec (unsigned int msec)

void	DBG_Printf (const char *data,...)

UCHAR	ATV_I2CReadField8 (UCHAR DevAddr, UCHAR RegAddr, UCHAR Mask, UCHAR BitPos)

void	ATV_I2CWriteField8 (UCHAR DevAddr, UCHAR RegAddr, UCHAR Mask, UCHAR BitPos, UCHAR FieldVal)

UINT32	ATV_I2CReadField32 (UCHAR DevAddr, UCHAR RegAddr, UCHAR MsbMask, UCHAR LsbMask, UCHAR LsbPos, UCHAR FldSpan)

UINT32	ATV_I2CReadField32LE (UCHAR DevAddr, UCHAR RegAddr, UCHAR MsbMask, UCHAR LsbMask, UCHAR LsbPos, UCHAR FldSpan)

void	ATV_I2CWriteField32 (UCHAR DevAddr, UCHAR RegAddr, UCHAR MsbMask, UCHAR LsbMask, UCHAR LsbPos, UCHAR FldSpan, UINT32 Val)

void	ATV_I2CWriteField32LE (UCHAR DevAddr, UCHAR RegAddr, UCHAR MsbMask, UCHAR LsbMask, UCHAR LsbPos, UCHAR FldSpan, UINT32 Val)

void	ATV_I2CWriteFields (UCHAR *Table, UCHAR EndVal)

void	ATV_I2CWriteTable (UCHAR *Table, UCHAR EndVal)

UINT16	ATV_LookupValue8 (UCHAR *Table, UCHAR Value, UCHAR EndVal, UINT16 Step)

void	ATV_PrintTime (char Prefix, UCHAR Gran, char Postfix)

UINT32	ATV_GetElapsedMs (UINT32 StartCount, UINT32 *CurrMsCount)

UINT32	ATV_GetMsCountNZ (void)

ATV_ERR	CEC_Reset (void)

ATV_ERR	CEC_Enable (BOOL Enable)

ATV_ERR	CEC_SetLogicalAddr (UCHAR LogAddr, UCHAR DevId, BOOL Enable)

ATV_ERR	CEC_SendMessage (UCHAR *MsgPtr, UCHAR MsgLen)

ATV_ERR	CEC_SendMessageOut (void)

ATV_ERR	CEC_ResendLastMessage (void)

ATV_ERR	CEC_AllocateLogAddr (UCHAR *LogAddrList)

void	CEC_Isr (CEC_INTERRUPTS *CecInts)

BOOL	HAL_GetMBSwitchState ()

uint32_t	HAL_GetCurrentMsCount ()

void	uart_int_handler (void *instance)

bool	HAL_TxIntPending ()

Variables
EXTERNAL CONSTANT UINT16	VicInfo []

Macro Definition Documentation

◆ ADV7511_CEC_I2C_ADDR

#define ADV7511_CEC_I2C_ADDR 0x3c

◆ ADV7511_CEC_LOGICADDR0

#define ADV7511_CEC_LOGICADDR0 0x4c

◆ ADV7511_CEC_LOGICADDR0_MASK

#define ADV7511_CEC_LOGICADDR0_MASK 0x0f

◆ ADV7511_CEC_LOGICADDR0_SHIFT

#define ADV7511_CEC_LOGICADDR0_SHIFT 0x00

◆ ADV7511_CEC_LOGICADDR1

#define ADV7511_CEC_LOGICADDR1 0x4c

◆ ADV7511_CEC_LOGICADDR1_MASK

#define ADV7511_CEC_LOGICADDR1_MASK 0xf0

◆ ADV7511_CEC_LOGICADDR1_SHIFT

#define ADV7511_CEC_LOGICADDR1_SHIFT 0x04

◆ ADV7511_CEC_LOGICADDR2

#define ADV7511_CEC_LOGICADDR2 0x4d

◆ ADV7511_CEC_LOGICADDR2_MASK

#define ADV7511_CEC_LOGICADDR2_MASK 0x0f

◆ ADV7511_CEC_LOGICADDR2_SHIFT

#define ADV7511_CEC_LOGICADDR2_SHIFT 0x00

◆ ADV7511_CEC_LOGICADDR_DEV01_REG

#define ADV7511_CEC_LOGICADDR_DEV01_REG 0x4c

◆ ADV7511_CEC_LOGICADDR_DEV2_REG

#define ADV7511_CEC_LOGICADDR_DEV2_REG 0x4d

◆ ADV7511_CEC_LOGICADDR_MASK

#define ADV7511_CEC_LOGICADDR_MASK 0x4b

◆ ADV7511_CEC_LOGICADDR_MASK_ADDR0

#define ADV7511_CEC_LOGICADDR_MASK_ADDR0 0x01

◆ ADV7511_CEC_LOGICADDR_MASK_ADDR1

#define ADV7511_CEC_LOGICADDR_MASK_ADDR1 0x02

◆ ADV7511_CEC_LOGICADDR_MASK_ADDR2

#define ADV7511_CEC_LOGICADDR_MASK_ADDR2 0x04

◆ ADV7511_CEC_LOGICADDR_MASK_MASK

#define ADV7511_CEC_LOGICADDR_MASK_MASK 0x70

◆ ADV7511_CEC_LOGICADDR_MASK_SHIFT

#define ADV7511_CEC_LOGICADDR_MASK_SHIFT 0x04

◆ ADV7511_CEC_POWER_MODE

#define ADV7511_CEC_POWER_MODE 0x4e

◆ ADV7511_CEC_POWER_MODE_MASK

#define ADV7511_CEC_POWER_MODE_MASK 0x03

◆ ADV7511_CEC_POWER_MODE_SET

#define ADV7511_CEC_POWER_MODE_SET ( x ) (((x) << 0) & 0x01)

◆ ADV7511_CEC_POWER_MODE_SHIFT

#define ADV7511_CEC_POWER_MODE_SHIFT 0x00

◆ ADV7511_CEC_RX_BUFF1_HDR

#define ADV7511_CEC_RX_BUFF1_HDR 0x15

◆ ADV7511_CEC_RX_BUFF2_HDR

#define ADV7511_CEC_RX_BUFF2_HDR 0x27

◆ ADV7511_CEC_RX_BUFF3_HDR

#define ADV7511_CEC_RX_BUFF3_HDR 0x38

◆ ADV7511_CEC_RX_BUFFER1_RDY

#define ADV7511_CEC_RX_BUFFER1_RDY 0x4a

◆ ADV7511_CEC_RX_BUFFER1_RDY_MASK

#define ADV7511_CEC_RX_BUFFER1_RDY_MASK 0x01

◆ ADV7511_CEC_RX_BUFFER1_RDY_SHIFT

#define ADV7511_CEC_RX_BUFFER1_RDY_SHIFT 0x00

◆ ADV7511_CEC_RX_BUFFER2_RDY

#define ADV7511_CEC_RX_BUFFER2_RDY 0x4a

◆ ADV7511_CEC_RX_BUFFER2_RDY_MASK

#define ADV7511_CEC_RX_BUFFER2_RDY_MASK 0x02

◆ ADV7511_CEC_RX_BUFFER2_RDY_SHIFT

#define ADV7511_CEC_RX_BUFFER2_RDY_SHIFT 0x01

◆ ADV7511_CEC_RX_BUFFER3_RDY

#define ADV7511_CEC_RX_BUFFER3_RDY 0x4a

◆ ADV7511_CEC_RX_BUFFER3_RDY_MASK

#define ADV7511_CEC_RX_BUFFER3_RDY_MASK 0x04

◆ ADV7511_CEC_RX_BUFFER3_RDY_SHIFT

#define ADV7511_CEC_RX_BUFFER3_RDY_SHIFT 0x02

◆ ADV7511_CEC_RX_BUFFER_NUMBER

#define ADV7511_CEC_RX_BUFFER_NUMBER 0x4a

◆ ADV7511_CEC_RX_BUFFER_NUMBER_MASK

#define ADV7511_CEC_RX_BUFFER_NUMBER_MASK 0x08

◆ ADV7511_CEC_RX_BUFFER_NUMBER_SHIFT

#define ADV7511_CEC_RX_BUFFER_NUMBER_SHIFT 0x03

◆ ADV7511_CEC_RX_ENABLE

#define ADV7511_CEC_RX_ENABLE 0x26

◆ ADV7511_CEC_RX_ENABLE_MASK

#define ADV7511_CEC_RX_ENABLE_MASK 0x40

◆ ADV7511_CEC_RX_ENABLE_SHIFT

#define ADV7511_CEC_RX_ENABLE_SHIFT 0x06

◆ ADV7511_CEC_SOFT_RESET

#define ADV7511_CEC_SOFT_RESET 0x50

◆ ADV7511_CEC_SOFT_RESET_MASK

#define ADV7511_CEC_SOFT_RESET_MASK 0x01

◆ ADV7511_CEC_SOFT_RESET_SET

#define ADV7511_CEC_SOFT_RESET_SET ( x ) (((x) << 0) & 0x01)

◆ ADV7511_CEC_SOFT_RESET_SHIFT

#define ADV7511_CEC_SOFT_RESET_SHIFT 0x00

◆ ADV7511_CEC_TX_FRAME_HEADER

#define ADV7511_CEC_TX_FRAME_HEADER 0x00

◆ ADV7511_CEC_TX_FRAME_LENGTH

#define ADV7511_CEC_TX_FRAME_LENGTH 0x10

◆ ADV7511_CEC_TX_FRAME_LENGTH_MASK

#define ADV7511_CEC_TX_FRAME_LENGTH_MASK 0x1f

◆ ADV7511_CEC_TX_FRAME_LENGTH_SHIFT

#define ADV7511_CEC_TX_FRAME_LENGTH_SHIFT 0x00

◆ ADV7511_CEC_TX_NACK_CNT

#define ADV7511_CEC_TX_NACK_CNT 0x14

◆ ADV7511_CEC_TX_NACK_CNT_MASK

#define ADV7511_CEC_TX_NACK_CNT_MASK 0x0f

◆ ADV7511_CEC_TX_NACK_CNT_SHIFT

#define ADV7511_CEC_TX_NACK_CNT_SHIFT 0x00

◆ ADV7511_CEC_TX_RETRY_COUNT

#define ADV7511_CEC_TX_RETRY_COUNT 0x12

◆ ADV7511_CEC_TX_RETRY_COUNT_MASK

#define ADV7511_CEC_TX_RETRY_COUNT_MASK 0x70

◆ ADV7511_CEC_TX_RETRY_COUNT_SET

#define ADV7511_CEC_TX_RETRY_COUNT_SET ( x ) (((x) << 4) & 0x70)

◆ ADV7511_CEC_TX_RETRY_COUNT_SHIFT

#define ADV7511_CEC_TX_RETRY_COUNT_SHIFT 0x04

◆ ADV7511_CEC_TX_TRANS_ENABLE

#define ADV7511_CEC_TX_TRANS_ENABLE 0x11

◆ ADV7511_CEC_TX_TRANS_ENABLE_MASK

#define ADV7511_CEC_TX_TRANS_ENABLE_MASK 0x01

◆ ADV7511_CEC_TX_TRANS_ENABLE_SHIFT

#define ADV7511_CEC_TX_TRANS_ENABLE_SHIFT 0x00

◆ ADV7511_CEC_TX_TRANSMISSION_EN

#define ADV7511_CEC_TX_TRANSMISSION_EN 0x11

◆ ADV7511_CEC_TX_TRANSMISSION_EN_SET

#define ADV7511_CEC_TX_TRANSMISSION_EN_SET ( x ) (((x) << 0) & 0x1)

◆ ADV7511_MAIN_CEC_PWRDWN

#define ADV7511_MAIN_CEC_PWRDWN 0xe2

◆ ADV7511_MAIN_CEC_PWRDWN_SET

#define ADV7511_MAIN_CEC_PWRDWN_SET ( x ) (((x) << 1) & 0x01)

◆ ADV7511_MAIN_CEC_TX_STATUS

#define ADV7511_MAIN_CEC_TX_STATUS 0x97

◆ ADV7511_MAIN_CEC_TX_STATUS_ALI

#define ADV7511_MAIN_CEC_TX_STATUS_ALI ( x ) (((x) << 4) & 0x10)

◆ ADV7511_MAIN_CEC_TX_STATUS_RDY

#define ADV7511_MAIN_CEC_TX_STATUS_RDY ( x ) (((x) << 5) & 0x20)

◆ ADV7511_MAIN_CEC_TX_STATUS_RTI

#define ADV7511_MAIN_CEC_TX_STATUS_RTI ( x ) (((x) << 3) & 0x08)

◆ ADV7511_MAIN_I2C_ADDR

#define ADV7511_MAIN_I2C_ADDR 0x39

◆ ADVANTIV

#define ADVANTIV 1

◆ ATV_I2CGetField32

#define ATV_I2CGetField32	(	d,
		r,
		Mm,
		Lm,
		b,
		s,
		p
	)	*p=ATV_I2CReadField32(d,r,Mm,Lm,b,s)

◆ ATV_I2CGetField32LE

#define ATV_I2CGetField32LE	(	d,
		r,
		Mm,
		Lm,
		b,
		s,
		p
	)	*p=ATV_I2CReadField32LE(d,r,Mm,Lm,b,s)

◆ ATV_I2CGetField8

#define ATV_I2CGetField8	(	d,
		r,
		m,
		b,
		p
	)	*p=ATV_I2CReadField8(d,r,m,b)

◆ ATV_I2CGetMultiField

#define ATV_I2CGetMultiField	(	d,
		r,
		s,
		p
	)	HAL_I2CReadBlock(d,r,p,(UINT16)s)

◆ ATV_I2CIsField8

#define ATV_I2CIsField8 (BOOL)ATV_I2CReadField8

◆ BOOL

#define BOOL UCHAR

◆ CEC_MAX_MSG_SIZE

#define CEC_MAX_MSG_SIZE 16

◆ CEC_RETRY_COUNT

#define CEC_RETRY_COUNT 3

◆ CEC_RX_BUFFER1

#define CEC_RX_BUFFER1 0

◆ CEC_RX_BUFFER2

#define CEC_RX_BUFFER2 1

◆ CEC_RX_BUFFER3

#define CEC_RX_BUFFER3 2

◆ CEC_TRIPLE_NUMBER [1/2]

#define CEC_TRIPLE_NUMBER 3

◆ CEC_TRIPLE_NUMBER [2/2]

#define CEC_TRIPLE_NUMBER 3

◆ CEC_TX_BUF_LEN

#define CEC_TX_BUF_LEN 30

◆ CONSTANT

#define CONSTANT const

◆ DBG_MSG

#define DBG_MSG xil_printf

◆ EXTERNAL

#define EXTERNAL extern

◆ FALSE

#define FALSE 0

◆ IGNORE_INT_LINES

#define IGNORE_INT_LINES 1 /*Set to 1 to ignore hw interrupt pin status to determine if interrupt is pending. Software method used only*/

◆ INLINE

#define INLINE inline

◆ MAX_VIC_VALUE

#define MAX_VIC_VALUE 64

◆ NULL

#define NULL ((void *)0)

◆ NUM_OF_VICS

#define NUM_OF_VICS (MAX_VIC_VALUE+1)

◆ PACKED

#define PACKED __attribute__((packed))

◆ PACKED_STR

#define PACKED_STR struct PACKED

◆ PKT_ACP_PACKET

#define PKT_ACP_PACKET 0x0004

◆ PKT_ACR_PACKET

#define PKT_ACR_PACKET 0x1000

◆ PKT_ALL_PACKETS

#define PKT_ALL_PACKETS 0xffff

◆ PKT_AUDIO_INFO_FRAME

#define PKT_AUDIO_INFO_FRAME 0x0002

◆ PKT_AUDIO_SAMPLE_PACKET

#define PKT_AUDIO_SAMPLE_PACKET 0x0800

◆ PKT_AV_INFO_FRAME

#define PKT_AV_INFO_FRAME 0x0001

◆ PKT_GC_PACKET

#define PKT_GC_PACKET 0x0080

◆ PKT_GMD_PACKET

#define PKT_GMD_PACKET 0x0040

◆ PKT_ISRC1_PACKET

#define PKT_ISRC1_PACKET 0x0010

◆ PKT_ISRC2_PACKET

#define PKT_ISRC2_PACKET 0x0020

◆ PKT_MPEG_PACKET

#define PKT_MPEG_PACKET 0x0100

◆ PKT_SPD_PACKET

#define PKT_SPD_PACKET 0x0008

◆ PKT_VS_PACKET

#define PKT_VS_PACKET 0x0200

◆ REP_SUPPORTED_DS_DEVICE_COUNT

#define REP_SUPPORTED_DS_DEVICE_COUNT 12

◆ REP_SUPPORTED_EDID_SEGMENTS

#define REP_SUPPORTED_EDID_SEGMENTS 2

◆ RX2_I2C_AFE_DPLL_MAP_ADDR

#define RX2_I2C_AFE_DPLL_MAP_ADDR 0xC2

◆ RX2_I2C_AUDIO_CODEC_MAP_ADDR

#define RX2_I2C_AUDIO_CODEC_MAP_ADDR RX_I2C_AUDIO_CODEC_MAP_ADDR

◆ RX2_I2C_AVLINK_MAP_ADDR

#define RX2_I2C_AVLINK_MAP_ADDR 0xE0

◆ RX2_I2C_CEC_MAP_ADDR

#define RX2_I2C_CEC_MAP_ADDR 0xDC

◆ RX2_I2C_CP_MAP_ADDR

#define RX2_I2C_CP_MAP_ADDR 0xC8

◆ RX2_I2C_DPP_MAP_ADDR

#define RX2_I2C_DPP_MAP_ADDR 0xD8 /* Def 0x78 */

◆ RX2_I2C_EDID_MAP_ADDR

#define RX2_I2C_EDID_MAP_ADDR 0xD6

◆ RX2_I2C_ESDP_MAP_ADDR

#define RX2_I2C_ESDP_MAP_ADDR 0xC4 /* Def 0x70 */

◆ RX2_I2C_HDMI_MAP_ADDR

#define RX2_I2C_HDMI_MAP_ADDR 0xD4

◆ RX2_I2C_INFOFRAME_MAP_ADDR

#define RX2_I2C_INFOFRAME_MAP_ADDR 0xDA

◆ RX2_I2C_IO_MAP_ADDR

#define RX2_I2C_IO_MAP_ADDR 0xB4

◆ RX2_I2C_OSD_MAP_ADDR

#define RX2_I2C_OSD_MAP_ADDR 0xE2

◆ RX2_I2C_REPEATER_MAP_ADDR

#define RX2_I2C_REPEATER_MAP_ADDR 0xD2

◆ RX2_I2C_SDP_IO_MAP_ADDR

#define RX2_I2C_SDP_IO_MAP_ADDR 0xC6

◆ RX2_I2C_SDP_MAP_ADDR

#define RX2_I2C_SDP_MAP_ADDR 0xDE

◆ RX2_I2C_SDP_VDP_MAP_ADDR

#define RX2_I2C_SDP_VDP_MAP_ADDR 0xC0

◆ RX2_I2C_TEST_MAP1_ADDR

#define RX2_I2C_TEST_MAP1_ADDR 0xCE

◆ RX2_I2C_TEST_MAP2_ADDR

#define RX2_I2C_TEST_MAP2_ADDR 0xD0

◆ RX2_I2C_TEST_MAP3_ADDR

#define RX2_I2C_TEST_MAP3_ADDR 0xCC

◆ RX2_I2C_VDP_MAP_ADDR

#define RX2_I2C_VDP_MAP_ADDR 0xCA

◆ RX2_I2C_VFE_MAP_ADDR

#define RX2_I2C_VFE_MAP_ADDR RX_I2C_VFE_MAP_ADDR

◆ RX2_I2C_XMEM_GAMMA_MAP_ADDR

#define RX2_I2C_XMEM_GAMMA_MAP_ADDR RX_I2C_XMEM_MAP_ADDR

◆ RX_DEVICE

#define RX_DEVICE 0 /*Set the Target Rx device. Tv Driver supports the following devices: 7844, 7842, 7604, 7840, 7612, 7611, 7614, 7622/3, 7619 */

◆ RX_I2C_AFE_DPLL_MAP_ADDR

#define RX_I2C_AFE_DPLL_MAP_ADDR 0x30

◆ RX_I2C_AUDIO_CODEC_MAP_ADDR

#define RX_I2C_AUDIO_CODEC_MAP_ADDR 0x5C

◆ RX_I2C_AVLINK_MAP_ADDR

#define RX_I2C_AVLINK_MAP_ADDR 0x84

◆ RX_I2C_CEC_MAP_ADDR

#define RX_I2C_CEC_MAP_ADDR 0x80

◆ RX_I2C_CP_MAP_ADDR

#define RX_I2C_CP_MAP_ADDR 0x44

◆ RX_I2C_DPP_MAP_ADDR

#define RX_I2C_DPP_MAP_ADDR 0x74 /* Def 0x78 */

◆ RX_I2C_EDID_MAP_ADDR

#define RX_I2C_EDID_MAP_ADDR 0x6C

◆ RX_I2C_ESDP_MAP_ADDR

#define RX_I2C_ESDP_MAP_ADDR 0x34 /* Def 0x70 */

◆ RX_I2C_HDMI_MAP_ADDR

#define RX_I2C_HDMI_MAP_ADDR 0x68

◆ RX_I2C_INFOFRAME_MAP_ADDR

#define RX_I2C_INFOFRAME_MAP_ADDR 0x76 /* 0x7C on ATV_MB seems to cause readback of all 0x00, occasionally. Happens more often when no Sink is connected */

◆ RX_I2C_IO_MAP_ADDR

#define RX_I2C_IO_MAP_ADDR 0x40

◆ RX_I2C_OSD_MAP_ADDR

#define RX_I2C_OSD_MAP_ADDR 0x88

◆ RX_I2C_REPEATER_MAP_ADDR

#define RX_I2C_REPEATER_MAP_ADDR 0x64

◆ RX_I2C_SDP_IO_MAP_ADDR

#define RX_I2C_SDP_IO_MAP_ADDR 0x42

◆ RX_I2C_SDP_MAP_ADDR

#define RX_I2C_SDP_MAP_ADDR 0x82

◆ RX_I2C_SDP_VDP_MAP_ADDR

#define RX_I2C_SDP_VDP_MAP_ADDR 0x22

◆ RX_I2C_TEST_MAP1_ADDR

#define RX_I2C_TEST_MAP1_ADDR 0x60

◆ RX_I2C_TEST_MAP2_ADDR

#define RX_I2C_TEST_MAP2_ADDR 0x62

◆ RX_I2C_TEST_MAP3_ADDR

#define RX_I2C_TEST_MAP3_ADDR 0x52

◆ RX_I2C_VDP_MAP_ADDR

#define RX_I2C_VDP_MAP_ADDR 0x48

◆ RX_I2C_VFE_MAP_ADDR

#define RX_I2C_VFE_MAP_ADDR 0xA0

◆ RX_I2C_XMEM_MAP_ADDR

#define RX_I2C_XMEM_MAP_ADDR 0xA8

◆ STATIC

#define STATIC static

◆ TRUE

#define TRUE 1

◆ TX2_I2C_CEC_MAP_ADDR

#define TX2_I2C_CEC_MAP_ADDR 0x82

◆ TX2_I2C_EDID_MAP_ADDR

#define TX2_I2C_EDID_MAP_ADDR 0x86

◆ TX2_I2C_MAIN_MAP_ADDR

#define TX2_I2C_MAIN_MAP_ADDR 0x7A

◆ TX2_I2C_PKT_MEM_MAP_ADDR

#define TX2_I2C_PKT_MEM_MAP_ADDR 0x76

◆ TX_CALLBACK_FUNCTION

#define TX_CALLBACK_FUNCTION TRANSMITTER_Notification

◆ TX_DEVICE

#define TX_DEVICE 7511 /*Set the Target Tx Device. Tv Driver supports the following Tx devices: 7623/2, 7511, 7510, 7520 */

◆ TX_EDID_RETRY_COUNT

#define TX_EDID_RETRY_COUNT 8

◆ TX_I2C_CEC_MAP_ADDR

#define TX_I2C_CEC_MAP_ADDR 0x78

◆ TX_I2C_EDID_MAP_ADDR

#define TX_I2C_EDID_MAP_ADDR 0x7E

◆ TX_I2C_MAIN_MAP_ADDR

#define TX_I2C_MAIN_MAP_ADDR 0x72

◆ TX_I2C_PKT_MEM_MAP_ADDR

#define TX_I2C_PKT_MEM_MAP_ADDR 0x70

◆ TX_INCLUDE_CEC

#define TX_INCLUDE_CEC 1

◆ TX_NUM_OF_DEVICES

#define TX_NUM_OF_DEVICES 1

◆ TX_SUPPORTED_DS_DEVICE_COUNT

#define TX_SUPPORTED_DS_DEVICE_COUNT REP_SUPPORTED_DS_DEVICE_COUNT

◆ TX_SUPPORTED_EDID_SEGMENTS

#define TX_SUPPORTED_EDID_SEGMENTS REP_SUPPORTED_EDID_SEGMENTS

◆ TX_USER_CONFIG

#define TX_USER_CONFIG 1 /*Always set to 1 when using ADI REP Middleware and ADI REP Application. */

◆ TX_USER_INIT

#define TX_USER_INIT 0 /*Always set to 0. Set to 1 for customer initialisation custimization only. */

◆ UART_DEBUG

#define UART_DEBUG 1 /*Set to 1 to enable Debug message Printouts. Set to 0 to disable. */

◆ UINT8

#define UINT8 UCHAR

Typedef Documentation

◆ CHAR

typedef char CHAR

◆ INT16

typedef short int INT16

◆ INT32

typedef long int INT32

◆ u16

typedef unsigned short u16

◆ u32

typedef unsigned long u32

◆ u8

typedef unsigned char u8

◆ UCHAR

typedef unsigned char UCHAR

◆ UINT16

typedef unsigned short UINT16

◆ UINT32

typedef unsigned long UINT32

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Enumerator
CEC_EVENT_RX_MSG
CEC_EVENT_TX_DONE
CEC_EVENT_TX_TIMEOUT
CEC_EVENT_TX_ARB_LOST
CEC_EVENT_LOG_ADDR_ALLOC
CEC_EVENT_LOG_ADDR_LIST
CEC_EVENT_RX_MSG_RESPOND

◆ ATV_ERR

enum ATV_ERR

Enumerator
ATVERR_OK
ATVERR_FALSE
ATVERR_TRUE
ATVERR_INV_PARM
ATVERR_NOT_AVAILABLE
ATVERR_FAILED

◆ cec_operations

enum cec_operations

Enumerator
CEC_OP_NONE
CEC_OP_LOG_ADDR_ALLOC
CEC_OP_GET_LOG_ADDR_LIST

◆ cec_tx_state_machine

enum cec_tx_state_machine

Enumerator
CEC_TX_STATE_DONE
CEC_TX_STATE_BUSY

Function Documentation

◆ ATV_GetElapsedMs()

UINT32 ATV_GetElapsedMs	(	UINT32	StartCount,
		UINT32 *	CurrMsCount
	)

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◆ ATV_GetMsCountNZ()

UINT32 ATV_GetMsCountNZ ( void )

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◆ ATV_I2CReadField32()

UINT32 ATV_I2CReadField32	(	UCHAR	DevAddr,
		UCHAR	RegAddr,
		UCHAR	MsbMask,
		UCHAR	LsbMask,
		UCHAR	LsbPos,
		UCHAR	FldSpan
	)

◆ ATV_I2CReadField32LE()

UINT32 ATV_I2CReadField32LE	(	UCHAR	DevAddr,
		UCHAR	RegAddr,
		UCHAR	MsbMask,
		UCHAR	LsbMask,
		UCHAR	LsbPos,
		UCHAR	FldSpan
	)

◆ ATV_I2CReadField8()

UCHAR ATV_I2CReadField8	(	UCHAR	DevAddr,
		UCHAR	RegAddr,
		UCHAR	Mask,
		UCHAR	BitPos
	)

◆ ATV_I2CWriteField32()

void ATV_I2CWriteField32	(	UCHAR	DevAddr,
		UCHAR	RegAddr,
		UCHAR	MsbMask,
		UCHAR	LsbMask,
		UCHAR	LsbPos,
		UCHAR	FldSpan,
		UINT32	Val
	)

◆ ATV_I2CWriteField32LE()

void ATV_I2CWriteField32LE	(	UCHAR	DevAddr,
		UCHAR	RegAddr,
		UCHAR	MsbMask,
		UCHAR	LsbMask,
		UCHAR	LsbPos,
		UCHAR	FldSpan,
		UINT32	Val
	)

◆ ATV_I2CWriteField8()

void ATV_I2CWriteField8	(	UCHAR	DevAddr,
		UCHAR	RegAddr,
		UCHAR	Mask,
		UCHAR	BitPos,
		UCHAR	FieldVal
	)

◆ ATV_I2CWriteFields()

void ATV_I2CWriteFields	(	UCHAR *	Table,
		UCHAR	EndVal
	)

◆ ATV_I2CWriteTable()

void ATV_I2CWriteTable	(	UCHAR *	Table,
		UCHAR	EndVal
	)

◆ ATV_LookupValue8()

UINT16 ATV_LookupValue8	(	UCHAR *	Table,
		UCHAR	Value,
		UCHAR	EndVal,
		UINT16	Step
	)

◆ ATV_PrintTime()

void ATV_PrintTime	(	char *	Prefix,
		UCHAR	Gran,
		char *	Postfix
	)

◆ CEC_AllocateLogAddr()

ATV_ERR CEC_AllocateLogAddr ( UCHAR * LogAddrList )

◆ CEC_Enable()

ATV_ERR CEC_Enable ( BOOL Enable )

◆ CEC_Isr()

void CEC_Isr ( CEC_INTERRUPTS * CecInts )

◆ CEC_ResendLastMessage()

ATV_ERR CEC_ResendLastMessage ( void )

◆ CEC_Reset()

ATV_ERR CEC_Reset ( void )

◆ CEC_SendMessage()

ATV_ERR CEC_SendMessage	(	UCHAR *	MsgPtr,
		UCHAR	MsgLen
	)

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◆ CEC_SendMessageOut()

ATV_ERR CEC_SendMessageOut ( void )

◆ CEC_SetLogicalAddr()

ATV_ERR CEC_SetLogicalAddr	(	UCHAR	LogAddr,
		UCHAR	DevId,
		BOOL	Enable
	)

◆ DBG_Printf()

void DBG_Printf	(	const char *	data,
			...
	)

◆ HAL_DelayMs()

void HAL_DelayMs ( UINT16 Counter )

◆ HAL_GetCurrentMsCount()

uint32_t HAL_GetCurrentMsCount ( )

Get the current microseconds count from the timer variable.

Parameters

void

Returns: number of microseconds

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◆ HAL_GetMBSwitchState()

BOOL HAL_GetMBSwitchState ( )

Return switch state.

Parameters

void

Returns: bool value corresponding to the switch state.

◆ HAL_I2CReadBlock()

UINT16 HAL_I2CReadBlock	(	UCHAR	Dev,
		UCHAR	Reg,
		UCHAR *	Data,
		UINT16	NumberBytes
	)

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◆ HAL_I2CReadByte()

UCHAR HAL_I2CReadByte	(	UCHAR	Dev,
		UCHAR	Reg,
		UCHAR *	Data
	)

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◆ HAL_I2CWriteBlock()

UINT16 HAL_I2CWriteBlock	(	UCHAR	Dev,
		UCHAR	Reg,
		UCHAR *	Data,
		UINT16	NumberBytes
	)

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◆ HAL_I2CWriteByte()

UCHAR HAL_I2CWriteByte	(	UCHAR	Dev,
		UCHAR	Reg,
		UCHAR	Data
	)

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◆ HAL_SetRxChipSelect()

UCHAR HAL_SetRxChipSelect ( UCHAR DevIdx )

◆ HAL_TxIntPending()

bool HAL_TxIntPending ( )

Returns the status of the interrupts asserted in the ADV7511 IC.

Parameters

void

Returns: status of the ADV7511 interrupts

◆ uart_int_handler()

void uart_int_handler ( void * instance )

Wrapper for the UART ISR.

Uses the PS UART driver if it exists, else uses the PL UART one.

Parameters

[in] instance - Pointer to the UART driver handler passed by the application.

Returns: void

◆ WaitMilliSec()

void WaitMilliSec ( unsigned int msec )

Wait for passed number of milli-seconds

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Variable Documentation

◆ VicInfo

EXTERNAL CONSTANT UINT16 VicInfo[]

Classes

Macros

Typedefs

Enumerations

Functions

Variables

Macro Definition Documentation

◆ ADV7511_CEC_I2C_ADDR

◆ ADV7511_CEC_LOGICADDR0

◆ ADV7511_CEC_LOGICADDR0_MASK

◆ ADV7511_CEC_LOGICADDR0_SHIFT

◆ ADV7511_CEC_LOGICADDR1

◆ ADV7511_CEC_LOGICADDR1_MASK

◆ ADV7511_CEC_LOGICADDR1_SHIFT

◆ ADV7511_CEC_LOGICADDR2

◆ ADV7511_CEC_LOGICADDR2_MASK

◆ ADV7511_CEC_LOGICADDR2_SHIFT

◆ ADV7511_CEC_LOGICADDR_DEV01_REG

◆ ADV7511_CEC_LOGICADDR_DEV2_REG

◆ ADV7511_CEC_LOGICADDR_MASK

◆ ADV7511_CEC_LOGICADDR_MASK_ADDR0

◆ ADV7511_CEC_LOGICADDR_MASK_ADDR1

◆ ADV7511_CEC_LOGICADDR_MASK_ADDR2

◆ ADV7511_CEC_LOGICADDR_MASK_MASK

◆ ADV7511_CEC_LOGICADDR_MASK_SHIFT

◆ ADV7511_CEC_POWER_MODE

◆ ADV7511_CEC_POWER_MODE_MASK

◆ ADV7511_CEC_POWER_MODE_SET

◆ ADV7511_CEC_POWER_MODE_SHIFT

◆ ADV7511_CEC_RX_BUFF1_HDR

◆ ADV7511_CEC_RX_BUFF2_HDR

◆ ADV7511_CEC_RX_BUFF3_HDR

◆ ADV7511_CEC_RX_BUFFER1_RDY

◆ ADV7511_CEC_RX_BUFFER1_RDY_MASK

◆ ADV7511_CEC_RX_BUFFER1_RDY_SHIFT

◆ ADV7511_CEC_RX_BUFFER2_RDY

◆ ADV7511_CEC_RX_BUFFER2_RDY_MASK

◆ ADV7511_CEC_RX_BUFFER2_RDY_SHIFT

◆ ADV7511_CEC_RX_BUFFER3_RDY

◆ ADV7511_CEC_RX_BUFFER3_RDY_MASK

◆ ADV7511_CEC_RX_BUFFER3_RDY_SHIFT

◆ ADV7511_CEC_RX_BUFFER_NUMBER

◆ ADV7511_CEC_RX_BUFFER_NUMBER_MASK

◆ ADV7511_CEC_RX_BUFFER_NUMBER_SHIFT

◆ ADV7511_CEC_RX_ENABLE

◆ ADV7511_CEC_RX_ENABLE_MASK

◆ ADV7511_CEC_RX_ENABLE_SHIFT

◆ ADV7511_CEC_SOFT_RESET

◆ ADV7511_CEC_SOFT_RESET_MASK

◆ ADV7511_CEC_SOFT_RESET_SET

◆ ADV7511_CEC_SOFT_RESET_SHIFT

◆ ADV7511_CEC_TX_FRAME_HEADER

◆ ADV7511_CEC_TX_FRAME_LENGTH

◆ ADV7511_CEC_TX_FRAME_LENGTH_MASK

◆ ADV7511_CEC_TX_FRAME_LENGTH_SHIFT

◆ ADV7511_CEC_TX_NACK_CNT

◆ ADV7511_CEC_TX_NACK_CNT_MASK

◆ ADV7511_CEC_TX_NACK_CNT_SHIFT

◆ ADV7511_CEC_TX_RETRY_COUNT

◆ ADV7511_CEC_TX_RETRY_COUNT_MASK

◆ ADV7511_CEC_TX_RETRY_COUNT_SET

◆ ADV7511_CEC_TX_RETRY_COUNT_SHIFT

◆ ADV7511_CEC_TX_TRANS_ENABLE

◆ ADV7511_CEC_TX_TRANS_ENABLE_MASK

◆ ADV7511_CEC_TX_TRANS_ENABLE_SHIFT

◆ ADV7511_CEC_TX_TRANSMISSION_EN

◆ ADV7511_CEC_TX_TRANSMISSION_EN_SET

◆ ADV7511_MAIN_CEC_PWRDWN

◆ ADV7511_MAIN_CEC_PWRDWN_SET

◆ ADV7511_MAIN_CEC_TX_STATUS

◆ ADV7511_MAIN_CEC_TX_STATUS_ALI

◆ ADV7511_MAIN_CEC_TX_STATUS_RDY

◆ ADV7511_MAIN_CEC_TX_STATUS_RTI

◆ ADV7511_MAIN_I2C_ADDR

◆ ADVANTIV

◆ ATV_I2CGetField32

◆ ATV_I2CGetField32LE

◆ ATV_I2CGetField8

◆ ATV_I2CGetMultiField

◆ ATV_I2CIsField8