21 #include "no_os_gpio.h"
22 #include "no_os_uart.h"
23 #include "no_os_irq.h"
24 #include "no_os_pwm.h"
30 #define MBED_PLATFORM 1
31 #define STM32_PLATFORM 2
34 #define CONTINUOUS_DATA_CAPTURE 0
35 #define WINDOWED_DATA_CAPTURE 1
39 #define BURST_AVERAGING_MODE 1
40 #define AVERAGING_MODE 2
43 #define STRAIGHT_BINARY 0
44 #define TWOS_COMPLEMENT 1
48 #define SPI_INTERRUPT 1
52 #define STR(s) XSTR(s)
57 #if !defined(ACTIVE_PLATFORM)
58 #define ACTIVE_PLATFORM STM32_PLATFORM
64 #if !defined(USE_PHY_COM_PORT)
65 #define USE_VIRTUAL_COM_PORT
69 #if !defined(APP_CAPTURE_MODE)
70 #define APP_CAPTURE_MODE WINDOWED_DATA_CAPTURE
74 #if !defined(ADC_CAPTURE_MODE)
75 #define ADC_CAPTURE_MODE SAMPLE_MODE
79 #if !defined(ADC_DATA_FORMAT)
80 #define ADC_DATA_FORMAT TWOS_COMPLEMENT
86 #if !defined(INTERFACE_MODE)
87 #if (ACTIVE_PLATFORM == STM32_PLATFORM)
88 #define INTERFACE_MODE SPI_DMA
90 #define INTERFACE_MODE SPI_INTERRUPT
102 #if defined(DEV_AD4052)
103 #define ACTIVE_DEVICE_NAME "ad4052"
104 #define DEVICE_NAME "DEV_AD4052"
105 #define ACTIVE_DEVICE_ID ID_AD4052
106 #define HW_MEZZANINE_NAME "EVAL-AD4052-ARDZ"
107 #define ADC_BURST_AVG_MODE_RESOLUTION 20
108 #elif defined(DEV_AD4050)
109 #define ACTIVE_DEVICE_NAME "ad4050"
110 #define DEVICE_NAME "DEV_AD4050"
111 #define ACTIVE_DEVICE_ID ID_AD4050
112 #define HW_MEZZANINE_NAME "EVAL-AD4050-ARDZ"
113 #define ADC_BURST_AVG_MODE_RESOLUTION 16
115 #define ACTIVE_DEVICE_NAME "ad4052"
116 #define DEVICE_NAME "DEV_AD4052"
117 #define ACTIVE_DEVICE_ID ID_AD4052
118 #define HW_MEZZANINE_NAME "EVAL-AD4052-ARDZ"
119 #define ADC_BURST_AVG_MODE_RESOLUTION 20
122 #if (ACTIVE_PLATFORM == MBED_PLATFORM)
123 #include "app_config_mbed.h"
124 #define HW_CARRIER_NAME TARGET_NAME
125 #elif (ACTIVE_PLATFORM == STM32_PLATFORM)
127 #define HW_CARRIER_NAME TARGET_NAME
128 #if (INTERFACE_MODE != SPI_DMA)
129 #define trigger_gpio_handle 0
131 #define trigger_gpio_handle STM32_DMA_CONT_HANDLE
133 #if (INTERFACE_MODE == SPI_DMA)
134 #define TRIGGER_INT_ID STM32_DMA_CONT_TRIGGER
136 #define TRIGGER_INT_ID GP1_PIN_NUM
139 #error "No/Invalid active platform selected"
143 #define ADC_SAMPLE_MODE_RESOLUTION 16
144 #define ADC_AVERAGING_MODE_RESOLUTION 24
145 #define DEFAULT_BURST_SAMPLE_RATE 2000000
148 #define ADC_REF_VOLTAGE 2.5
150 #if (ADC_CAPTURE_MODE == SAMPLE_MODE)
151 #if (ADC_DATA_FORMAT == STRAIGHT_BINARY)
152 #define ADC_MAX_COUNT (uint32_t)(1 << (ADC_SAMPLE_MODE_RESOLUTION))
154 #define ADC_MAX_COUNT (uint32_t)(1 << (ADC_SAMPLE_MODE_RESOLUTION - 1))
157 #if (ADC_DATA_FORMAT == STRAIGHT_BINARY)
158 #define ADC_MAX_COUNT (uint32_t)(1 << (ADC_BURST_AVG_MODE_RESOLUTION))
160 #define ADC_MAX_COUNT (uint32_t)(1 << (ADC_BURST_AVG_MODE_RESOLUTION - 1))
166 #define MIN_DATA_CAPTURE_TIME_NS 8000
170 #if (APP_CAPTURE_MODE == CONTINUOUS_DATA_CAPTURE)
171 #define MIN_INTERRUPT_OVER_HEAD 4500
173 #define MIN_INTERRUPT_OVER_HEAD 3000
177 #define IIO_UART_BAUD_RATE (230400)
181 #define FIRMWARE_NAME "ad405x_iio"
183 #if !defined(PLATFORM_NAME)
184 #define PLATFORM_NAME HW_CARRIER_NAME
190 #define VIRTUAL_COM_PORT_VID 0x0456
191 #define VIRTUAL_COM_PORT_PID 0xb66c
193 #define VIRTUAL_COM_SERIAL_NUM (FIRMWARE_NAME "_" DEVICE_NAME "_" STR(PLATFORM_NAME))
196 #if defined(USE_PHY_COM_PORT)
198 #if (ACTIVE_PLATFORM == MBED_PLATFORM)
199 #define CONSOLE_STDIO_PORT_AVAILABLE
203 #define CONSOLE_STDIO_PORT_AVAILABLE
216 extern struct no_os_pwm_desc *
pwm_desc;
225 #if (INTERFACE_MODE == SPI_DMA)
227 extern struct no_os_dma_ch
dma_chan;
struct no_os_irq_ctrl_desc * trigger_irq_desc
Definition: app_config.c:103
int32_t init_system(void)
Initialize the system peripherals.
Definition: app_config.c:185
struct no_os_uart_desc * uart_iio_com_desc
Definition: app_config.c:127
struct no_os_dma_ch dma_chan
volatile struct iio_device_data * iio_dev_data_g
Definition: ad405x_iio.c:331
uint32_t nb_of_samples_g
Definition: ad405x_iio.c:334
struct no_os_pwm_init_param pwm_init_params
Definition: app_config.c:108
struct no_os_eeprom_desc * eeprom_desc
Definition: app_config.c:194
struct no_os_pwm_desc * tx_trigger_desc
Definition: app_config.c:202
struct no_os_dma_xfer_desc dma_tx_desc
int32_t ad405x_gpio_reset(void)
struct no_os_pwm_desc * pwm_desc
Definition: app_config.c:106
struct no_os_gpio_desc * trigger_gpio_desc
Definition: app_config.c:192
struct no_os_gpio_init_param cs_pwm_gpio_params
Definition: app_config.h:231
struct no_os_pwm_init_param cs_init_params
Definition: app_config.c:133
volatile uint32_t * buff_start_addr
Definition: ad405x_iio.c:174
int32_t data_read
Definition: ad405x_iio.c:337
struct no_os_gpio_init_param pwm_gpio_params
Definition: app_config.h:232
int32_t init_pwm(void)
Initialize the PWM interface.
Definition: app_config.c:283
struct no_os_dma_init_param ad405x_dma_init_param
Definition: app_config.c:205
struct no_os_uart_desc * uart_console_stdio_desc
Definition: app_config.c:100
Header file for STM32 platform configurations.