precision-converters-firmware
app_config.h
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1 /*************************************************************************/
14 #ifndef APP_CONFIG_H
15 #define APP_CONFIG_H
16 
17 /******************************************************************************/
18 /***************************** Include Files **********************************/
19 /******************************************************************************/
20 #include <stdint.h>
21 #include "no_os_gpio.h"
22 #include "no_os_uart.h"
23 #include "no_os_irq.h"
24 #include "no_os_pwm.h"
25 
26 /******************************************************************************/
27 /********************** Macros and Constants Definition ***********************/
28 /******************************************************************************/
29 /* List of supported platforms */
30 #define MBED_PLATFORM 1
31 #define STM32_PLATFORM 2
32 
33 /* List of data capture modes supported by application*/
34 #define CONTINUOUS_DATA_CAPTURE 0
35 #define WINDOWED_DATA_CAPTURE 1
36 
37 /* List of supported data capture modes by device */
38 #define SAMPLE_MODE 0
39 #define BURST_AVERAGING_MODE 1
40 #define AVERAGING_MODE 2
41 
42 /* List of supported data format by device */
43 #define STRAIGHT_BINARY 0
44 #define TWOS_COMPLEMENT 1
45 
46 /* List of data capture methods supported by hardware platform */
47 #define SPI_DMA 0
48 #define SPI_INTERRUPT 1
49 
50 /* Macros for stringification */
51 #define XSTR(s) #s
52 #define STR(s) XSTR(s)
53 
54 /******************************************************************************/
55 
56 /* Select the active platform (default is Mbed) */
57 #if !defined(ACTIVE_PLATFORM)
58 #define ACTIVE_PLATFORM STM32_PLATFORM
59 #endif
60 
61 /* Enable the UART/VirtualCOM port connection */
62 #define USE_PHY_COM_PORT // Uncomment to select UART
63 
64 #if !defined(USE_PHY_COM_PORT)
65 #define USE_VIRTUAL_COM_PORT
66 #endif
67 
68 /* Select the application data capture mode (default is CC mode) */
69 #if !defined(APP_CAPTURE_MODE)
70 #define APP_CAPTURE_MODE WINDOWED_DATA_CAPTURE
71 #endif
72 
73 /* Select the ADC data capture mode (default is sample mode) */
74 #if !defined(ADC_CAPTURE_MODE)
75 #define ADC_CAPTURE_MODE SAMPLE_MODE
76 #endif
77 
78 /* Select the ADC output data format (default is twos complement mode) */
79 #if !defined(ADC_DATA_FORMAT)
80 #define ADC_DATA_FORMAT TWOS_COMPLEMENT
81 #endif
82 
83 /* Note: The STM32 platform supports SPI interrupt and SPI DMA Mode
84  * for data capturing. The MBED platform supports only SPI interrupt mode
85  * */
86 #if !defined(INTERFACE_MODE)
87 #if (ACTIVE_PLATFORM == STM32_PLATFORM)
88 #define INTERFACE_MODE SPI_DMA
89 #else // Mbed
90 #define INTERFACE_MODE SPI_INTERRUPT
91 #endif
92 #endif
93 
94 #define ACTIVE_DEVICE_NAME "ad405x"
95 #define DEVICE_NAME "DEV_AD405x"
96 
97 #if (ACTIVE_PLATFORM == MBED_PLATFORM)
98 #include "app_config_mbed.h"
99 #define HW_CARRIER_NAME TARGET_NAME
100 #define CONSOLE_STDIO_PORT_AVAILABLE
101 #elif (ACTIVE_PLATFORM == STM32_PLATFORM)
102 #include "app_config_stm32.h"
103 #define HW_CARRIER_NAME TARGET_NAME
104 #define CONSOLE_STDIO_PORT_AVAILABLE
105 #if (INTERFACE_MODE != SPI_DMA)
106 #define trigger_gpio_handle 0 // Unused macro
107 #else
108 #define trigger_gpio_handle STM32_DMA_CONT_HANDLE
109 #endif
110 #if (INTERFACE_MODE == SPI_DMA)
111 #define TRIGGER_INT_ID STM32_DMA_CONT_TRIGGER
112 #else
113 #define TRIGGER_INT_ID GP1_PIN_NUM
114 #endif
115 #else
116 #error "No/Invalid active platform selected"
117 #endif
118 
119 #define DEFAULT_BURST_SAMPLE_RATE 2000000
120 
121 /* ADC reference voltage (Range: 2.5 to 3.3v) */
122 #define ADC_REF_VOLTAGE 2.5
123 
124 /* Time taken for the application to process the interrupt and
125  * push data into iio buffer. */
126 #define MIN_DATA_CAPTURE_TIME_NS 8000
127 
128 /* Time taken by the MCU to Jump into the ISR after the occurrence of
129  * data ready event */
130 #if (APP_CAPTURE_MODE == CONTINUOUS_DATA_CAPTURE)
131 #define MIN_INTERRUPT_OVER_HEAD 4500
132 #else
133 #define MIN_INTERRUPT_OVER_HEAD 3000
134 #endif
135 
136 /* Baud rate for IIO application UART interface */
137 #define IIO_UART_BAUD_RATE (230400)
138 
139 /****** Macros used to form a VCOM serial number ******/
140 /* Used to form a VCOM serial number */
141 #define FIRMWARE_NAME "ad405x_iio"
142 
143 #if !defined(PLATFORM_NAME)
144 #define PLATFORM_NAME HW_CARRIER_NAME
145 #endif
146 
147 /* Below USB configurations (VID and PID) are owned and assigned by ADI.
148  * If intended to distribute software further, use the VID and PID owned by your
149  * organization */
150 #define VIRTUAL_COM_PORT_VID 0x0456
151 #define VIRTUAL_COM_PORT_PID 0xb66c
152 /* Serial number string is formed as: application name + device (target) name + platform (host) name */
153 #define VIRTUAL_COM_SERIAL_NUM (FIRMWARE_NAME "_" DEVICE_NAME "_" STR(PLATFORM_NAME))
154 
155 /* Enable/Disable the use of SDRAM for ADC data capture buffer */
156 //#define USE_SDRAM // Uncomment to use SDRAM as data buffer
157 
158 /******************************************************************************/
159 /********************** Variables and User Defined Data Types *****************/
160 /******************************************************************************/
161 
162 /******************************************************************************/
163 /************************ Public Declarations *********************************/
164 /******************************************************************************/
165 extern struct no_os_pwm_desc *pwm_desc;
166 extern struct no_os_uart_desc *uart_iio_com_desc;
167 extern struct no_os_uart_desc *uart_console_stdio_desc;
168 extern struct no_os_gpio_desc *trigger_gpio_desc;
169 extern struct no_os_irq_ctrl_desc *trigger_irq_desc;
170 extern struct no_os_eeprom_desc *eeprom_desc;
171 extern struct no_os_gpio_init_param cs_pwm_gpio_params;
172 extern struct no_os_gpio_init_param pwm_gpio_params;
173 extern struct no_os_pwm_init_param pwm_init_params;
174 
175 #if (INTERFACE_MODE == SPI_DMA)
176 extern struct no_os_dma_xfer_desc dma_tx_desc;
177 extern struct no_os_dma_ch dma_chan;
178 extern struct no_os_pwm_init_param cs_init_params;
179 extern struct no_os_dma_init_param ad405x_dma_init_param;
180 extern struct no_os_gpio_init_param cs_pwm_gpio_params;
181 extern struct no_os_gpio_init_param pwm_gpio_params;
182 extern volatile uint32_t* buff_start_addr;
183 extern volatile struct iio_device_data* iio_dev_data_g;
184 extern uint32_t nb_of_samples_g;
185 extern int32_t data_read;
186 extern struct no_os_pwm_desc* tx_trigger_desc;
187 #endif
188 
189 int32_t init_pwm(void);
190 int32_t ad405x_gpio_reset(void);
191 int32_t init_system(void);
192 
193 #endif //APP_CONFIG_H
struct no_os_irq_ctrl_desc * trigger_irq_desc
Definition: app_config.c:103
int32_t init_system(void)
Initialize the system peripherals.
Definition: app_config.c:185
struct no_os_uart_desc * uart_iio_com_desc
Definition: app_config.c:127
struct no_os_dma_ch dma_chan
volatile struct iio_device_data * iio_dev_data_g
Definition: ad405x_iio.c:322
uint32_t nb_of_samples_g
Definition: ad405x_iio.c:325
struct no_os_pwm_init_param pwm_init_params
Definition: app_config.c:108
struct no_os_eeprom_desc * eeprom_desc
Definition: app_config.c:194
struct no_os_pwm_desc * tx_trigger_desc
Definition: app_config.c:202
struct no_os_dma_xfer_desc dma_tx_desc
int32_t ad405x_gpio_reset(void)
struct no_os_pwm_desc * pwm_desc
Definition: app_config.c:106
struct no_os_gpio_desc * trigger_gpio_desc
Definition: app_config.c:192
struct no_os_gpio_init_param cs_pwm_gpio_params
Definition: app_config.h:180
struct no_os_pwm_init_param cs_init_params
Definition: app_config.c:133
volatile uint32_t * buff_start_addr
Definition: ad405x_iio.c:169
int32_t data_read
Definition: ad405x_iio.c:328
struct no_os_gpio_init_param pwm_gpio_params
Definition: app_config.h:181
int32_t init_pwm(void)
Initialize the PWM interface.
Definition: app_config.c:287
struct no_os_dma_init_param ad405x_dma_init_param
Definition: app_config.c:205
struct no_os_uart_desc * uart_console_stdio_desc
Definition: app_config.c:100
Header file for STM32 platform configurations.