17#ifndef AD7124_SUPPORT_H_
18#define AD7124_SUPPORT_H_
21#include "no_os_util.h"
24#define AD7124_PGA_GAIN(x) (1 << (x))
26#define AD7124_REF_VOLTAGE 2.5
27#define AD7124_ADC_N_BITS 24
30#define AD7124_ADC_CTRL_REG_POWER_MODE_MSK NO_OS_GENMASK(7,6)
31#define AD7124_ADC_CTRL_REG_POWER_MODE_RD(x) (((x) >> 6) & 0x3)
32#define AD7124_ADC_CTRL_REG_MSK NO_OS_GENMASK(5,2)
35#define AD7124_CH_MAP_REG_CH_ENABLE_RD(x) (((x) >> 15) & 0x1)
36#define AD7124_CH_MAP_REG_SETUP_MSK NO_OS_GENMASK(14, 12)
37#define AD7124_CH_MAP_REG_SETUP_RD(x) (((x) >> 12) & 0x7)
38#define AD7124_CH_MAP_REG_AINP_MSK NO_OS_GENMASK(9, 5)
39#define AD7124_CH_MAP_REG_AINP_RD(x) (((x) >> 5) & 0x1F)
40#define AD7124_CH_MAP_REG_AINM_MSK NO_OS_GENMASK(4, 0)
41#define AD7124_CH_MAP_REG_AINM_RD(x) (((x) >> 0) & 0x1F)
44#define AD7124_CFG_REG_BIPOLAR_RD(x) (((x) >> 11) & 0x1)
45#define AD7124_CFG_REG_REF_BUFP_RD(x) (((x) >> 8) & 0x1)
46#define AD7124_CFG_REG_REF_BUFM_RD(x) (((x) >> 7) & 0x1)
47#define AD7124_CFG_REG_AIN_BUFP_RD(x) (((x) >> 6) & 0x1)
48#define AD7124_CFG_REG_AINM_BUFP_RD(x) (((x) >> 5) & 0x1)
49#define AD7124_CFG_REG_REF_SEL_MSK NO_OS_GENMASK(4, 3)
50#define AD7124_CFG_REG_REF_SEL_RD(x) (((x) >> 3) & 0x3)
51#define AD7124_CFG_REG_PGA_MSK NO_OS_GENMASK(2, 0)
52#define AD7124_CFG_REG_PGA_RD(x) (((x) >> 0) & 0x7)
55#define AD7124_FILT_REG_FILTER_MSK NO_OS_GENMASK(23, 21)
56#define AD7124_FILT_REG_FILTER_RD(x) (((x) >> 21) & 0x7)
57#define AD7124_FILT_REG_FS_MSK NO_OS_GENMASK(10, 0)
58#define AD7124_FILT_REG_FS_RD(x) (((x) >> 0) & 0x7FF)
bool ad7124_get_channel_bipolar(struct ad7124_dev *dev, uint8_t channel)
Definition ad7124_support.c:62
uint8_t ad7124_get_channel_setup(struct ad7124_dev *dev, uint8_t channel)
Definition ad7124_support.c:30
uint8_t ad7124_get_channel_pga(struct ad7124_dev *dev, uint8_t channel)
Definition ad7124_support.c:45
float ad7124_convert_sample_to_voltage(struct ad7124_dev *dev, uint8_t channel, uint32_t sample)
Definition ad7124_support.c:85