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app_config_mbed.h
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1/***************************************************************************/
13#ifndef APP_CONFIG_MBED_H_
14#define APP_CONFIG_MBED_H_
15
16/******************************************************************************/
17/***************************** Include Files **********************************/
18/******************************************************************************/
19
20#include <stdint.h>
21#include <PinNames.h>
22
23#include "mbed_uart.h"
24#include "mbed_gpio_irq.h"
25#include "mbed_spi.h"
26#include "mbed_i2c.h"
27#include "mbed_gpio.h"
28#include "mbed_pwm.h"
29
30/******************************************************************************/
31/********************** Macros and Constants Definition ***********************/
32/******************************************************************************/
33
34/* Pin mapping of SDP-K1 w.r.t Arduino connector */
35#define SPI_CSB ARDUINO_UNO_D10
36#define SPI_HOST_SDO ARDUINO_UNO_D11
37#define SPI_HOST_SDI ARDUINO_UNO_D12
38#define SPI_SCK ARDUINO_UNO_D13
39
40#define I2C_SCL ARDUINO_UNO_D15
41#define I2C_SDA ARDUINO_UNO_D14
42
43#define UART_TX CONSOLE_TX
44#define UART_RX CONSOLE_RX
45
46#define DCLK_PIN ARDUINO_UNO_D2
47#define ODR_PIN ARDUINO_UNO_D3
48#define DOUT0_PIN ARDUINO_UNO_D4
49#define DOUT1_PIN ARDUINO_UNO_D5
50#define PDN_PIN ARDUINO_UNO_D1
51
52/* Port numbers */
53#define PDN_PORT 0 // (Unused)
54
55/* Memory map for GPIOs on SDP-K1/STM32F4xxx MCU to read the values.
56 * Mbed specific GPIO read/write library functions are very time stringent.
57 * Since data capture on AD7134 is done using bit banging method, memory mapped
58 * IOs are used for faster access of IO pins.
59 * IF USING ANY OTHER MBED BOARD MAKE SURE MEMORY MAP IS UPDATED ACCORDINGLY */
60
61/* Memory address of PORTx IDR (input data) register (Base + 0x10 offset) */
62#define DOUT1_IDR (*((volatile uint32_t *)0x40020010)) // PORTA IDR
63#define ODR_IDR (*((volatile uint32_t *)0x40020C10)) // PORTD_IDR
64#define DCLK_IDR (*((volatile uint32_t *)0x40021810)) // PORTG IDR
65#define DOUT0_IDR (*((volatile uint32_t *)0x40021810)) // PORTG IDR
66
67#define DCLK_ODR (*((volatile uint32_t *)0x40021814)) // PORTG ODR
68
69/* Pin numbers corresponding to GPIOs */
70#define DCLK_PIN_NUM 7 // PG7 (Arduino D2)
71#define ODR_PIN_NUM 12 // PD12 (Arduino D3)
72#define DOUT0_PIN_NUM 9 // PG9 (Arduino D4)
73#define DOUT1_PIN_NUM 11 // PA11 (Arduino D5)
74
75/* Pin mask values for GPIOs */
76#define DCLK_PIN_MASK (uint32_t)(1 << DCLK_PIN_NUM)
77#define ODR_PIN_MASK (uint32_t)(1 << ODR_PIN_NUM)
78#define DOUT0_PIN_MASK (uint32_t)(1 << DOUT0_PIN_NUM)
79#define DOUT1_PIN_MASK (uint32_t)(1 << DOUT1_PIN_NUM)
80
81#define UART_IRQ_ID 0 // Unused
82#define IRQ_INT_ID GPIO_IRQ_ID1
83#define UART_DEVICE_ID 0
84#define SPI_DEVICE_ID 0
85#define I2C_DEVICE_ID 0
86
87/* Define the max possible sampling (or output data) rate for a given platform.
88 * Note: Max possible ODR is 12 KSPS per channel for continuous data capture on IIO client.
89 * This is derived by testing the firmware on SDP-K1 controller board with STM32F469NI MCU
90 * using GCC and ARM compilers. The max possible ODR can vary from board to board and
91 * data continuity is not guaranteed above this ODR on IIO oscilloscope */
92#define SAMPLING_RATE (12000)
93
94/* PWM period and duty cycle for AD7134 ASRC target mode. The low period of ODR as per specs
95 * must be minimum 3 * Tdclk in target mode. The min possible Fdclk for SDP-K1 (STM32F469NI)
96 * platform is ~3Mhz (based on time to sample data over DOUT), which gives Tdclk as ~333nsec.
97 * So ODR min low time must be 333ns * 3 = ~1usec. This is achieved by dividing total ODR
98 * period by 40 as below for 16KSPS ODR */
99#define CONV_TRIGGER_PERIOD_NSEC (((float)(1.0 / SAMPLING_RATE) * 1000000) * 1000)
100#define CONV_TRIGGER_DUTY_CYCLE_NSEC (CONV_TRIGGER_PERIOD_NSEC / 40)
101
102/******************************************************************************/
103/********************** Public/Extern Declarations ****************************/
104/******************************************************************************/
105
106extern struct mbed_gpio_irq_init_param mbed_ext_int_extra_init_params;
107extern struct mbed_uart_init_param mbed_uart_extra_init_params;
108extern struct mbed_uart_init_param mbed_vcom_extra_init_params;
109extern struct mbed_spi_init_param mbed_spi_extra_init_params;
110extern struct mbed_i2c_init_param mbed_i2c_extra_init_params;
111extern struct mbed_pwm_init_param mbed_pwm_extra_init_params;
112extern struct mbed_gpio_init_param mbed_pdn_extra_init_params;
114
115#endif /* APP_CONFIG_MBED_H_ */
struct mbed_pwm_init_param mbed_pwm_extra_init_params
Definition app_config_mbed.c:69
struct mbed_uart_init_param mbed_vcom_extra_init_params
Definition app_config_mbed.c:42
struct mbed_uart_init_param mbed_uart_extra_init_params
Definition app_config_mbed.c:31
struct mbed_spi_init_param mbed_spi_extra_init_params
Definition app_config_mbed.c:54
struct mbed_i2c_init_param mbed_i2c_extra_init_params
Definition app_config_mbed.c:69
struct mbed_gpio_irq_init_param mbed_ext_int_extra_init_params
Definition app_config_mbed.c:53
struct mbed_gpio_init_param mbed_pdn_extra_init_params
Definition app_config_mbed.c:80
void ad7134_configure_intr_priority(void)
Configure the interrupt priorities.
Definition app_config_mbed.c:95