Definitions specific to xilinx platform used by ad400x-fmcz project. More...

#include <stdio.h>
#include <xparameters.h>
#include <xil_cache.h>
#include <xilinx_uart.h>
#include "axi_pwm_extra.h"
#include "spi_engine.h"

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Macros
#define	UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID

#define	INTC_DEVICE_ID XPAR_INTC_SINGLE_DEVICE_ID

#define	UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR

#define	UART_EXTRA &uart_extra_ip

#define	UART_OPS &xil_uart_ops

#define	DCACHE_INVALIDATE Xil_DCacheInvalidateRange

#define	UART_BAUDRATE 115200

#define	DMA_BASEADDR XPAR_AXI_PULSAR_ADC_DMA_BASEADDR

#define	SPI_ENGINE_BASEADDR XPAR_SPI_PULSAR_ADC_SPI_PULSAR_ADC_AXI_REGMAP_BASEADDR

#define	RX_CLKGEN_BASEADDR XPAR_SPI_CLKGEN_BASEADDR

#define	AXI_PWMGEN_BASEADDR XPAR_PULSAR_ADC_TRIGGER_GEN_BASEADDR

#define	ADC_DDR_BASEADDR (XPAR_DDR_MEM_BASEADDR + 0x800000)

#define	SAMPLES_PER_CHANNEL_PLATFORM 2000

#define	MAX_SIZE_BASE_ADDR (SAMPLES_PER_CHANNEL_PLATFORM * sizeof(uint32_t))

#define	SPI_ENG_REF_CLK_FREQ_HZ XPAR_PS7_SPI_0_SPI_CLK_FREQ_HZ

#define	REFCLK_RATE 160000000

#define	SPI_DEVICE_ID 0

#define	SPI_OPS &spi_eng_platform_ops

#define	SPI_EXTRA &spi_eng_init_param

#define	SPI_CS 0

#define	SPI_BAUDRATE 80000000

#define	PWM_OPS &axi_pwm_ops

#define	PWM_EXTRA &ad400x_axi_pwm_init

#define	PWM_PERIOD 555

#define	PWM_DUTY 10

#define	AD400X_ADC_REF_VOLTAGE 5000

Variables
struct xil_uart_init_param	uart_extra_ip

struct spi_engine_init_param	spi_eng_init_param

struct axi_pwm_init_param	ad400x_axi_pwm_init

Detailed Description

Definitions specific to xilinx platform used by ad400x-fmcz project.

Author: Axel Haslam (ahasl.nosp@m.am@b.nosp@m.aylib.nosp@m.re.c.nosp@m.om)

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
The use of this software may or may not infringe the patent rights of one or more patent holders. This license does not release you from the requirement that you obtain separate licenses from these patent holders to use this software.
Use of the software either in source or binary form, must be run on or directly connected to an Analog Devices Inc. component.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ AD400X_ADC_REF_VOLTAGE

#define AD400X_ADC_REF_VOLTAGE 5000

◆ ADC_DDR_BASEADDR

#define ADC_DDR_BASEADDR (XPAR_DDR_MEM_BASEADDR + 0x800000)

◆ AXI_PWMGEN_BASEADDR

#define AXI_PWMGEN_BASEADDR XPAR_PULSAR_ADC_TRIGGER_GEN_BASEADDR

◆ DCACHE_INVALIDATE

#define DCACHE_INVALIDATE Xil_DCacheInvalidateRange

◆ DMA_BASEADDR

#define DMA_BASEADDR XPAR_AXI_PULSAR_ADC_DMA_BASEADDR

◆ INTC_DEVICE_ID

#define INTC_DEVICE_ID XPAR_INTC_SINGLE_DEVICE_ID

◆ MAX_SIZE_BASE_ADDR

#define MAX_SIZE_BASE_ADDR (SAMPLES_PER_CHANNEL_PLATFORM * sizeof(uint32_t))

◆ PWM_DUTY

#define PWM_DUTY 10

◆ PWM_EXTRA

#define PWM_EXTRA &ad400x_axi_pwm_init

◆ PWM_OPS

#define PWM_OPS &axi_pwm_ops

◆ PWM_PERIOD

#define PWM_PERIOD 555

◆ REFCLK_RATE

#define REFCLK_RATE 160000000

◆ RX_CLKGEN_BASEADDR

#define RX_CLKGEN_BASEADDR XPAR_SPI_CLKGEN_BASEADDR

◆ SAMPLES_PER_CHANNEL_PLATFORM

#define SAMPLES_PER_CHANNEL_PLATFORM 2000

◆ SPI_BAUDRATE

#define SPI_BAUDRATE 80000000

◆ SPI_CS

#define SPI_CS 0

◆ SPI_DEVICE_ID

#define SPI_DEVICE_ID 0

◆ SPI_ENG_REF_CLK_FREQ_HZ

#define SPI_ENG_REF_CLK_FREQ_HZ XPAR_PS7_SPI_0_SPI_CLK_FREQ_HZ

◆ SPI_ENGINE_BASEADDR

#define SPI_ENGINE_BASEADDR XPAR_SPI_PULSAR_ADC_SPI_PULSAR_ADC_AXI_REGMAP_BASEADDR

◆ SPI_EXTRA

#define SPI_EXTRA &spi_eng_init_param

◆ SPI_OPS

#define SPI_OPS &spi_eng_platform_ops

◆ UART_BAUDRATE

#define UART_BAUDRATE 115200

◆ UART_DEVICE_ID

#define UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID

◆ UART_EXTRA

#define UART_EXTRA &uart_extra_ip

◆ UART_IRQ_ID

#define UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR

◆ UART_OPS

#define UART_OPS &xil_uart_ops

Variable Documentation

◆ ad400x_axi_pwm_init

struct axi_pwm_init_param ad400x_axi_pwm_init

◆ spi_eng_init_param

struct spi_engine_init_param spi_eng_init_param

◆ uart_extra_ip

struct xil_uart_init_param uart_extra_ip

Macros

Variables