spi_engine.h

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/*******************************************************************************
 *   @file   spi_engine.h
 *   @brief  Header file of SPI Engine core features.
 *   @author Sergiu Cuciurean (sergiu.cuciurean@analog.com)
********************************************************************************
 * Copyright 2019(c) Analog Devices, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 *    this list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 *    this list of conditions and the following disclaimer in the documentation
 *    and/or other materials provided with the distribution.
 *
 * 3. Neither the name of Analog Devices, Inc. nor the names of its
 *    contributors may be used to endorse or promote products derived from this
 *    software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
 * EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
 
#ifndef SPI_ENGINE_H
#define SPI_ENGINE_H
 
#include <stdint.h>
 
#include "xilinx_spi.h"
#include "spi_engine_private.h"
#include "axi_dmac.h"
 
#define OFFLOAD_DISABLED        0x00
#define OFFLOAD_TX_EN           NO_OS_BIT(0)
#define OFFLOAD_RX_EN           NO_OS_BIT(1)
#define OFFLOAD_TX_RX_EN        OFFLOAD_TX_EN | OFFLOAD_RX_EN
 
#define SPI_ENGINE_MSG_QUEUE_END    0xFFFFFFFF
 
/* Spi engine commands */
#define WRITE(no_bytes)         ((SPI_ENGINE_INST_TRANSFER << 12) |\
    (SPI_ENGINE_INSTRUCTION_TRANSFER_W << 8) | no_bytes)
#define WRITE(no_bytes)         ((SPI_ENGINE_INST_TRANSFER << 12) |\ …
 
#define READ(no_bytes)          ((SPI_ENGINE_INST_TRANSFER << 12) |\
    (SPI_ENGINE_INSTRUCTION_TRANSFER_R << 8) | no_bytes)
#define READ(no_bytes)          ((SPI_ENGINE_INST_TRANSFER << 12) |\ …
 
#define WRITE_READ(no_bytes)        ((SPI_ENGINE_INST_TRANSFER << 12) |\
    (SPI_ENGINE_INSTRUCTION_TRANSFER_RW << 8) | no_bytes)
#define WRITE_READ(no_bytes)        ((SPI_ENGINE_INST_TRANSFER << 12) |\ …
 
#define SLEEP(time)         SPI_ENGINE_CMD_SLEEP(time & 0xF)
 
/* The delay and chip select parmeters are passed over the engine descriptor
and will be used inside the function call */
#define CS_HIGH             SPI_ENGINE_CMD_ASSERT(0x03, 0xFF)
#define CS_LOW              SPI_ENGINE_CMD_ASSERT(0x03, 0x00)

struct spi_engine_init_param {
    uint32_t    ref_clk_hz;
    enum xil_spi_type   type;
    uint32_t        spi_engine_baseaddr;
    uint32_t        cs_delay;
    uint8_t         data_width;
    uint8_t         sdo_idle_state;
};
struct spi_engine_init_param {…};
 

struct spi_engine_desc {
    uint32_t    ref_clk_hz;
    enum xil_spi_type   type;
    struct axi_dmac     *offload_tx_dma;
    struct axi_dmac     *offload_rx_dma;
    enum cyclic_transfer cyclic;
    uint8_t         offload_config;
    uint8_t         offload_tx_len;
    uint8_t         offload_rx_len;
    uint32_t        spi_engine_baseaddr;
    uint32_t        rx_dma_baseaddr;
    uint32_t        tx_dma_baseaddr;
    uint8_t         cs_delay;
    uint32_t        clk_div;
    uint8_t         data_width;
    uint8_t         max_data_width;
    uint8_t         sdo_idle_state;
};
struct spi_engine_desc {…};
 

struct spi_engine_offload_init_param {
    uint32_t    rx_dma_baseaddr;
    uint32_t    tx_dma_baseaddr;
    uint32_t    dma_flags;
    uint8_t     offload_config;
};
struct spi_engine_offload_init_param {…};

struct spi_engine_offload_message {
    uint32_t *commands;
    uint32_t no_commands;
    uint32_t *commands_data;
    uint32_t tx_addr;
    uint32_t rx_addr;
};
struct spi_engine_offload_message {…};

extern const struct no_os_spi_platform_ops xil_spi_ops;
 
/* Write SPI Engine's axi registers */
int32_t spi_engine_write(struct spi_engine_desc *desc,
             uint32_t reg_addr,
             uint32_t reg_data);
 
/* Read SPI Engine's axi registers */
int32_t spi_engine_read(struct spi_engine_desc *desc,
            uint32_t reg_addr,
            uint32_t *reg_data);
/* Initialize the SPI engine device */
int32_t spi_engine_init(struct no_os_spi_desc **desc,
            const struct no_os_spi_init_param *param);
 
/* Write and read data over SPI using the SPI engine */
int32_t spi_engine_write_and_read(struct no_os_spi_desc *desc,
                  uint8_t *data,
                  uint16_t bytes_number);
 
/* Free the resources used by the SPI engine device */
int32_t spi_engine_remove(struct no_os_spi_desc *desc);
 
/* Initialize the SPI engine offload module */
int32_t spi_engine_offload_init(struct no_os_spi_desc *desc,
                const struct spi_engine_offload_init_param *param);
 
/* Write and read data over SPI using the offload module */
int32_t spi_engine_offload_transfer(struct no_os_spi_desc *desc,
                    struct spi_engine_offload_message msg,
                    uint32_t no_samples);
 
/* Set SPI transfer width */
int32_t spi_engine_set_transfer_width(struct no_os_spi_desc *desc,
                      uint8_t data_wdith);
 
/* Set SPI transfer speed */
void spi_engine_set_speed(struct no_os_spi_desc *desc,
              uint32_t speed_hz);
 
#endif // SPI_ENGINE_H