Go to the documentation of this file.
51 #define OFFLOAD_DISABLED 0x00
52 #define OFFLOAD_TX_EN NO_OS_BIT(0)
53 #define OFFLOAD_RX_EN NO_OS_BIT(1)
54 #define OFFLOAD_TX_RX_EN OFFLOAD_TX_EN | OFFLOAD_RX_EN
56 #define SPI_ENGINE_MSG_QUEUE_END 0xFFFFFFFF
59 #define WRITE(no_bytes) ((SPI_ENGINE_INST_TRANSFER << 12) |\
60 (SPI_ENGINE_INSTRUCTION_TRANSFER_W << 8) | no_bytes)
62 #define READ(no_bytes) ((SPI_ENGINE_INST_TRANSFER << 12) |\
63 (SPI_ENGINE_INSTRUCTION_TRANSFER_R << 8) | no_bytes)
65 #define WRITE_READ(no_bytes) ((SPI_ENGINE_INST_TRANSFER << 12) |\
66 (SPI_ENGINE_INSTRUCTION_TRANSFER_RW << 8) | no_bytes)
68 #define SLEEP(time) SPI_ENGINE_CMD_SLEEP(time & 0xF)
72 #define CS_HIGH SPI_ENGINE_CMD_ASSERT(0x03, 0xFF)
73 #define CS_LOW SPI_ENGINE_CMD_ASSERT(0x03, 0x00)
199 uint16_t bytes_number);
211 uint32_t no_samples);
221 #endif // SPI_ENGINE_H
uint8_t offload_config
Definition: spi_engine.h:151
uint32_t base
Definition: axi_dmac.h:129
uint32_t no_commands
Definition: spi_engine.h:165
struct spi_engine_cmd_queue * cmds
Definition: spi_engine_private.h:149
Definition: spi_engine_private.h:140
#define SPI_ENGINE_REG_SDI_DATA_FIFO
Definition: spi_engine_private.h:59
struct spi_engine_cmd_queue * next
Definition: spi_engine_private.h:142
uint32_t ref_clk_hz
Definition: spi_engine.h:105
#define SPI_ENGINE_REG_OFFLOAD_SDO_MEM(x)
Definition: spi_engine_private.h:108
Definition: axi_dmac.h:127
#define SPI_ENGINE_CMD_ASSERT(delay, cs)
Definition: spi_engine_private.h:118
const char * name
Definition: axi_dmac.h:128
#define CS_LOW
Definition: spi_engine.h:73
Structure representing an SPI engine device.
Definition: spi_engine.h:103
uint8_t sdo_idle_state
Definition: spi_engine.h:95
int32_t spi_engine_offload_init(struct no_os_spi_desc *desc, const struct spi_engine_offload_init_param *param)
Initialize the SPI engine's offload module.
Definition: spi_engine.c:763
void spi_engine_set_speed(struct no_os_spi_desc *desc, uint32_t speed_hz)
Set SPI engine clock frequency.
Definition: spi_engine.c:148
int32_t axi_dmac_transfer_wait_completion(struct axi_dmac *dmac, uint32_t timeout_ms)
Definition: axi_dmac.c:525
uint8_t data_width
Definition: spi_engine.h:93
uint32_t * commands_data
Definition: spi_engine.h:167
int32_t spi_engine_write(struct spi_engine_desc *desc, uint32_t reg_addr, uint32_t reg_data)
Write SPI Engine's axi registers.
Definition: spi_engine.c:90
struct axi_dmac * offload_tx_dma
Definition: spi_engine.h:109
#define SPI_ENGINE_REG_VERSION
Definition: spi_engine_private.h:47
enum no_os_spi_mode mode
Definition: no_os_spi.h:148
Structure representing an offload message.
Definition: spi_engine.h:158
uint8_t offload_tx_len
Definition: spi_engine.h:117
uint8_t cs_delay
Definition: spi_engine.h:127
uint8_t data_width
Definition: spi_engine.h:131
uint32_t cmd
Definition: spi_engine_private.h:141
int32_t spi_engine_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the spi engine.
Definition: spi_engine.c:626
uint32_t * tx_buf
Definition: spi_engine_private.h:146
void * no_os_calloc(size_t nitems, size_t size)
Allocate memory and return a pointer to it, set memory to 0.
Definition: chibios_alloc.c:54
#define SPI_ENGINE_INST_SYNC_SLEEP
Definition: spi_engine_private.h:73
#define SPI_ENGINE_REG_OFFLOAD_CMD_MEM(x)
Definition: spi_engine_private.h:107
uint32_t tx_dma_baseaddr
Definition: spi_engine.h:147
#define WRITE_READ(no_bytes)
Definition: spi_engine.h:65
#define SPI_ENGINE_REG_DATA_WIDTH
Definition: spi_engine_private.h:48
int32_t axi_dmac_remove(struct axi_dmac *dmac)
Definition: axi_dmac.c:367
int32_t spi_engine_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: spi_engine.c:905
int32_t spi_engine_read(struct spi_engine_desc *desc, uint32_t reg_addr, uint32_t *reg_data)
Read SPI Engine's axi registers.
Definition: spi_engine.c:108
uint8_t chip_select
Definition: no_os_spi.h:146
Definition: axi_dmac.h:102
uint8_t chip_select
Definition: no_os_spi.h:200
int32_t spi_engine_offload_init(struct no_os_spi_desc *desc, const struct spi_engine_offload_init_param *param)
Initialize the SPI engine's offload module.
Definition: spi_engine.c:763
enum xil_spi_type type
Definition: spi_engine.h:87
#define CS_HIGH
Definition: spi_engine.h:72
void spi_engine_set_speed(struct no_os_spi_desc *desc, uint32_t speed_hz)
Set SPI engine clock frequency.
Definition: spi_engine.c:148
uint32_t clk_div
Definition: spi_engine.h:129
#define SPI_ENGINE_CMD_DATA_TRANSFER_LEN
Definition: spi_engine_private.h:77
#define NO_OS_DIV_ROUND_UP(x, y)
Definition: no_os_util.h:52
#define SPI_ENGINE_CMD_SLEEP(delay)
Definition: spi_engine_private.h:126
#define SPI_ENGINE_CMD_TRANSFER(readwrite, n)
Definition: spi_engine_private.h:114
int32_t spi_engine_offload_transfer(struct no_os_spi_desc *desc, struct spi_engine_offload_message msg, uint32_t no_samples)
Initiate a SPI transfer in offload mode.
Definition: spi_engine.c:809
int32_t spi_engine_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write/read on the spi interface.
Definition: spi_engine.c:697
int32_t spi_engine_set_transfer_width(struct no_os_spi_desc *desc, uint8_t data_wdith)
Set width of the transfered word over SPI.
Definition: spi_engine.c:127
@ IRQ_DISABLED
Definition: axi_dmac.h:79
#define SPI_ENGINE_REG_OFFLOAD_CTRL(x)
Definition: spi_engine_private.h:104
#define SPI_ENGINE_REG_OFFLOAD_RESET(x)
Definition: spi_engine_private.h:106
#define SPI_ENGINE_CMD_CONFIG(reg, val)
Definition: spi_engine_private.h:122
uint32_t * rx_buf
Definition: spi_engine_private.h:147
Driver for the Analog Devices AXI-DMAC core.
uint8_t offload_rx_len
Definition: spi_engine.h:119
uint32_t length
Definition: spi_engine_private.h:148
uint32_t spi_engine_baseaddr
Definition: spi_engine.h:121
uint32_t tx_addr
Definition: spi_engine.h:169
Structure holding SPI descriptor.
Definition: no_os_spi.h:192
#define SPI_ENGINE_REG_SDO_DATA_FIFO
Definition: spi_engine_private.h:58
uint32_t width_src
Definition: axi_dmac.h:118
int32_t no_os_axi_io_read(uint32_t base, uint32_t offset, uint32_t *data)
AXI IO Altera specific read function.
Definition: altera_axi_io.c:53
#define OFFLOAD_TX_EN
Definition: spi_engine.h:52
uint8_t offload_config
Definition: spi_engine.h:115
cyclic_transfer
Definition: axi_dmac.h:97
#define SPI_ENGINE_CONFIG_SDO_IDLE
Definition: spi_engine_private.h:91
enum use_irq irq_option
Definition: axi_dmac.h:130
#define SPI_ENGINE_REG_CMD_FIFO
Definition: spi_engine_private.h:57
uint32_t * commands
Definition: spi_engine.h:163
uint32_t rx_dma_baseaddr
Definition: spi_engine.h:145
#define OFFLOAD_DISABLED
Definition: spi_engine.h:51
enum xil_spi_type type
Definition: spi_engine.h:107
void * extra
Definition: no_os_spi.h:212
#define SPI_ENGINE_CMD_SYNC(id)
Definition: spi_engine_private.h:131
xil_spi_type
Xilinx platform architecture sections.
Definition: xilinx_spi.h:58
#define SPI_ENGINE_INST_ASSERT
Definition: spi_engine_private.h:71
void * no_os_malloc(size_t size)
Allocate memory and return a pointer to it.
Definition: chibios_alloc.c:43
uint32_t max_speed_hz
Definition: no_os_spi.h:144
#define OFFLOAD_RX_EN
Definition: spi_engine.h:53
uint32_t no_os_field_get(uint32_t mask, uint32_t word)
#define NO_OS_BIT(x)
Definition: no_os_util.h:45
uint8_t max_data_width
Definition: spi_engine.h:133
@ NO
Definition: axi_dmac.h:98
void no_os_free(void *ptr)
Deallocate memory previously allocated by a call to no_os_calloc or no_os_malloc.
Definition: chibios_alloc.c:69
uint32_t dma_flags
Definition: spi_engine.h:149
#define SPI_ENGINE_CMD_REG_CONFIG
Definition: spi_engine_private.h:76
@ DMA_CYCLIC
Definition: axi_dmac.h:91
int32_t axi_dmac_init(struct axi_dmac **dmac_core, const struct axi_dmac_init *init)
Definition: axi_dmac.c:334
@ CYCLIC
Definition: axi_dmac.h:99
#define SPI_ENGINE_INST_TRANSFER
Definition: spi_engine_private.h:70
#define NULL
Definition: wrapper.h:64
const struct no_os_spi_platform_ops xil_spi_ops
Spi engine platform specific SPI platform ops structure.
Definition: xilinx_spi.c:453
uint32_t tx_dma_baseaddr
Definition: spi_engine.h:125
Structure containing the init parameters needed by the SPI engine.
Definition: spi_engine.h:83
#define SPI_ENGINE_INST_CONFIG
Definition: spi_engine_private.h:72
const struct no_os_spi_platform_ops spi_eng_platform_ops
Spi engine platform specific SPI platform ops structure.
Definition: spi_engine.c:61
#define SPI_ENGINE_REG_DATA_WIDTH_MSK
Definition: spi_engine_private.h:64
int32_t spi_engine_offload_transfer(struct no_os_spi_desc *desc, struct spi_engine_offload_message msg, uint32_t no_samples)
Initiate a SPI transfer in offload mode.
Definition: spi_engine.c:809
int32_t no_os_axi_io_write(uint32_t base, uint32_t offset, uint32_t data)
AXI IO Altera specific write function.
Definition: altera_axi_io.c:67
int32_t spi_engine_set_transfer_width(struct no_os_spi_desc *desc, uint8_t data_wdith)
Set width of the transfered word over SPI.
Definition: spi_engine.c:127
Structure containing the init parameters needed by the offload module.
Definition: spi_engine.h:143
uint32_t spi_engine_baseaddr
Definition: spi_engine.h:89
#define SPI_ENGINE_REG_RESET
Definition: spi_engine_private.h:49
uint32_t max_speed_hz
Definition: no_os_spi.h:198
int32_t spi_engine_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the spi engine.
Definition: spi_engine.c:626
int32_t axi_dmac_transfer_start(struct axi_dmac *dmac, struct axi_dma_transfer *dma_transfer)
Definition: axi_dmac.c:385
#define SPI_ENGINE_REG_SYNC_ID
Definition: spi_engine_private.h:53
Header file of utility functions.
uint32_t rx_dma_baseaddr
Definition: spi_engine.h:123
#define SPI_ENGINE_CMD_REG_CLK_DIV
Definition: spi_engine_private.h:75
uint32_t ref_clk_hz
Definition: spi_engine.h:85
void * extra
Definition: no_os_spi.h:158
uint32_t rx_addr
Definition: spi_engine.h:171
enum no_os_spi_mode mode
Definition: no_os_spi.h:202
Definition: spi_engine_private.h:145
int32_t spi_engine_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: spi_engine.c:905
int32_t spi_engine_read(struct spi_engine_desc *desc, uint32_t reg_addr, uint32_t *reg_data)
Read SPI Engine's axi registers.
Definition: spi_engine.c:108
uint32_t size
Definition: axi_dmac.h:103
enum cyclic_transfer cyclic
Definition: spi_engine.h:113
uint8_t sdo_idle_state
Definition: spi_engine.h:135
Definition: axi_dmac.h:110
uint32_t cs_delay
Definition: spi_engine.h:91
int32_t spi_engine_write(struct spi_engine_desc *desc, uint32_t reg_addr, uint32_t reg_data)
Write SPI Engine's axi registers.
Definition: spi_engine.c:90
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:140
struct axi_dmac * offload_rx_dma
Definition: spi_engine.h:111
int32_t spi_engine_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write/read on the spi interface.
Definition: spi_engine.c:697