Platform dependent parameters. More...

#include "app_config.h"
#include "xparameters.h"

Include dependency graph for parameters.h:

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Macros
#define	GPIO_OFFSET 0

#define	GPIO_DEVICE_ID XPAR_GPIO_0_DEVICE_ID

#define	SPI_DEVICE_ID XPAR_SPI_0_DEVICE_ID

#define	UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR

#define	DDR_MEM_BASEADDR XPAR_AXI_DDR_CNTRL_BASEADDR

#define	RX_CLKGEN_BASEADDR XPAR_AXI_AD9371_RX_CLKGEN_BASEADDR

#define	TX_CLKGEN_BASEADDR XPAR_AXI_AD9371_TX_CLKGEN_BASEADDR

#define	RX_OS_CLKGEN_BASEADDR XPAR_AXI_AD9371_RX_OS_CLKGEN_BASEADDR

#define	RX_JESD_BASEADDR XPAR_AXI_AD9371_RX_JESD_RX_AXI_BASEADDR

#define	TX_JESD_BASEADDR XPAR_AXI_AD9371_TX_JESD_TX_AXI_BASEADDR

#define	RX_OS_JESD_BASEADDR XPAR_AXI_AD9371_RX_OS_JESD_RX_AXI_BASEADDR

#define	RX_XCVR_BASEADDR XPAR_AXI_AD9371_RX_XCVR_BASEADDR

#define	TX_XCVR_BASEADDR XPAR_AXI_AD9371_TX_XCVR_BASEADDR

#define	RX_OS_XCVR_BASEADDR XPAR_AXI_AD9371_RX_OS_XCVR_BASEADDR

#define	RX_CORE_BASEADDR XPAR_RX_AD9371_TPL_CORE_ADC_TPL_CORE_BASEADDR

#define	TX_CORE_BASEADDR XPAR_TX_AD9371_TPL_CORE_DAC_TPL_CORE_BASEADDR

#define	RX_OS_CORE_BASEADDR XPAR_RX_OS_AD9371_TPL_CORE_ADC_TPL_CORE_BASEADDR

#define	RX_OBS_DMA_BASEADDR XPAR_AXI_AD9371_RX_OS_DMA_BASEADDR

#define	RX_DMA_BASEADDR XPAR_AXI_AD9371_RX_DMA_BASEADDR

#define	TX_DMA_BASEADDR XPAR_AXI_AD9371_TX_DMA_BASEADDR

#define	UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID

#define	INTC_DEVICE_ID XPAR_INTC_SINGLE_DEVICE_ID

#define	AD9528_CS 1

#define	AD9371_CS 2

#define	DAC_GPIO_PLDDR_BYPASS GPIO_OFFSET + 60

#define	AD9528_RESET_B GPIO_OFFSET + 59

#define	AD9528_SYSREF_REQ GPIO_OFFSET + 58

#define	AD9371_RESET_B GPIO_OFFSET + 52

Detailed Description

Platform dependent parameters.

Author: DBogdan (drago.nosp@m.s.bo.nosp@m.gdan@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ AD9371_CS

#define AD9371_CS 2

◆ AD9371_RESET_B

#define AD9371_RESET_B GPIO_OFFSET + 52

◆ AD9528_CS

#define AD9528_CS 1

◆ AD9528_RESET_B

#define AD9528_RESET_B GPIO_OFFSET + 59

◆ AD9528_SYSREF_REQ

#define AD9528_SYSREF_REQ GPIO_OFFSET + 58

◆ DAC_GPIO_PLDDR_BYPASS

#define DAC_GPIO_PLDDR_BYPASS GPIO_OFFSET + 60

◆ DDR_MEM_BASEADDR

#define DDR_MEM_BASEADDR XPAR_AXI_DDR_CNTRL_BASEADDR

◆ GPIO_DEVICE_ID

#define GPIO_DEVICE_ID XPAR_GPIO_0_DEVICE_ID

◆ GPIO_OFFSET

#define GPIO_OFFSET 0

◆ INTC_DEVICE_ID

#define INTC_DEVICE_ID XPAR_INTC_SINGLE_DEVICE_ID

◆ RX_CLKGEN_BASEADDR

#define RX_CLKGEN_BASEADDR XPAR_AXI_AD9371_RX_CLKGEN_BASEADDR

◆ RX_CORE_BASEADDR

#define RX_CORE_BASEADDR XPAR_RX_AD9371_TPL_CORE_ADC_TPL_CORE_BASEADDR

◆ RX_DMA_BASEADDR

#define RX_DMA_BASEADDR XPAR_AXI_AD9371_RX_DMA_BASEADDR

◆ RX_JESD_BASEADDR

#define RX_JESD_BASEADDR XPAR_AXI_AD9371_RX_JESD_RX_AXI_BASEADDR

◆ RX_OBS_DMA_BASEADDR

#define RX_OBS_DMA_BASEADDR XPAR_AXI_AD9371_RX_OS_DMA_BASEADDR

◆ RX_OS_CLKGEN_BASEADDR

#define RX_OS_CLKGEN_BASEADDR XPAR_AXI_AD9371_RX_OS_CLKGEN_BASEADDR

◆ RX_OS_CORE_BASEADDR

#define RX_OS_CORE_BASEADDR XPAR_RX_OS_AD9371_TPL_CORE_ADC_TPL_CORE_BASEADDR

◆ RX_OS_JESD_BASEADDR

#define RX_OS_JESD_BASEADDR XPAR_AXI_AD9371_RX_OS_JESD_RX_AXI_BASEADDR

◆ RX_OS_XCVR_BASEADDR

#define RX_OS_XCVR_BASEADDR XPAR_AXI_AD9371_RX_OS_XCVR_BASEADDR

◆ RX_XCVR_BASEADDR

#define RX_XCVR_BASEADDR XPAR_AXI_AD9371_RX_XCVR_BASEADDR

◆ SPI_DEVICE_ID

#define SPI_DEVICE_ID XPAR_SPI_0_DEVICE_ID

◆ TX_CLKGEN_BASEADDR

#define TX_CLKGEN_BASEADDR XPAR_AXI_AD9371_TX_CLKGEN_BASEADDR

◆ TX_CORE_BASEADDR

#define TX_CORE_BASEADDR XPAR_TX_AD9371_TPL_CORE_DAC_TPL_CORE_BASEADDR

◆ TX_DMA_BASEADDR

#define TX_DMA_BASEADDR XPAR_AXI_AD9371_TX_DMA_BASEADDR

◆ TX_JESD_BASEADDR

#define TX_JESD_BASEADDR XPAR_AXI_AD9371_TX_JESD_TX_AXI_BASEADDR

◆ TX_XCVR_BASEADDR

#define TX_XCVR_BASEADDR XPAR_AXI_AD9371_TX_XCVR_BASEADDR

◆ UART_DEVICE_ID

#define UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID

◆ UART_IRQ_ID

#define UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR

Macros