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adf4153_cfg.h
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1 /***************************************************************************/
37 #ifndef __ADF4153_CFG_H__
38 #define __ADF4153_CFG_H__
39 
41  25000000, // RFIN is 25Mhz
42  150000, // Channel spacing is 150 Khz
43  10, // 12-bit fractional value
44  8, // 9-bit integer value
45  ADF4153_FASTLOCK_DISABLED, // Fast-Lock
46  16, // 12-bit interpolator modulus value
47  7, // 4-bit R Counter
48  ADF4153_PRESCALER_4_5, // Prescale
49  ADF4153_MUXOUT_LOGICHIGH, // Muxout
50  ADF4153_LOAD_NORMAL, // Load Control
51  ADF4153_CR_DISABLED, // Counter Reset
52  ADF4153_CP_DISABLED, // CP Three-state
53  ADF4153_PD_DISABLED, // Power-down
54  ADF4153_LDP_24, // LDP
55  ADF4153_PD_POL_POSITIVE, // PD Polarity
56  ADF4153_CP_CURRENT_0_63, // Current settings
57  ADF4153_REF_DOUBLER_DIS, // Reference doubler
58  1, // Resync
59  ADF4153_LOW_SPUR_MODE // Noise and Spur mode
60 };
61 
62 #endif // __ADF4153_CFG_H__
ADF4153_PD_DISABLED
#define ADF4153_PD_DISABLED
Definition: adf4153.h:207
ADF4153_CR_DISABLED
#define ADF4153_CR_DISABLED
Definition: adf4153.h:201
ADF4153_LOW_SPUR_MODE
#define ADF4153_LOW_SPUR_MODE
Definition: adf4153.h:237
adf4153_settings_t
Definition: adf4153.h:251
adf4153_st
struct adf4153_settings_t adf4153_st
Definition: adf4153_cfg.h:40
ADF4153_CP_CURRENT_0_63
#define ADF4153_CP_CURRENT_0_63
Definition: adf4153.h:216
ADF4153_FASTLOCK_DISABLED
#define ADF4153_FASTLOCK_DISABLED
Definition: adf4153.h:183
ADF4153_REF_DOUBLER_DIS
#define ADF4153_REF_DOUBLER_DIS
Definition: adf4153.h:234
ADF4153_MUXOUT_LOGICHIGH
#define ADF4153_MUXOUT_LOGICHIGH
Definition: adf4153.h:192
ADF4153_PD_POL_POSITIVE
#define ADF4153_PD_POL_POSITIVE
Definition: adf4153.h:214
ADF4153_PRESCALER_4_5
#define ADF4153_PRESCALER_4_5
Definition: adf4153.h:186
ADF4153_LOAD_NORMAL
#define ADF4153_LOAD_NORMAL
Definition: adf4153.h:198
ADF4153_LDP_24
#define ADF4153_LDP_24
Definition: adf4153.h:210
ADF4153_CP_DISABLED
#define ADF4153_CP_DISABLED
Definition: adf4153.h:204