adf4371.c File Reference

Implementation of ADF4371 Driver. More...

#include <stdlib.h>
#include <stdbool.h>
#include <inttypes.h>
#include <stdio.h>
#include "no_os_error.h"
#include "no_os_util.h"
#include "no_os_alloc.h"
#include "no_os_clk.h"
#include "adf4371.h"

Include dependency graph for adf4371.c:

Classes
struct	adf4371_pwrdown
struct	reg_sequence
	ADF4382 register format structure for default values. More...

Macros
#define	ADF4371_WRITE   (0 << 15)
#define	ADF4371_READ   (1 << 15)
#define	ADF4371_ADDR(x)
#define	ADF4371_REG(x)
#define	ADF4371_ADDR_ASC_MSK   NO_OS_BIT(2)
#define	ADF4371_ADDR_ASC(x)
#define	ADF4371_ADDR_ASC_R_MSK   NO_OS_BIT(5)
#define	ADF4371_ADDR_ASC_R(x)
#define	ADF4371_SDO_ACT_MSK   NO_OS_BIT(3)
#define	ADF4371_SDO_ACT(x)
#define	ADF4371_SDO_ACT_R_MSK   NO_OS_BIT(4)
#define	ADF4371_SDO_ACT_R(x)
#define	ADF4371_RESET_CMD   0x81
#define	ADF4371_FRAC2WORD_L_MSK   NO_OS_GENMASK(7, 1)
#define	ADF4371_FRAC2WORD_L(x)
#define	ADF4371_FRAC1WORD_MSK   NO_OS_BIT(0)
#define	ADF4371_FRAC1WORD(x)
#define	ADF4371_FRAC2WORD_H_MSK   NO_OS_GENMASK(6, 0)
#define	ADF4371_FRAC2WORD_H(x)
#define	ADF4371_MOD2WORD_MSK   NO_OS_GENMASK(5, 0)
#define	ADF4371_MOD2WORD(x)
#define	ADF4371_CP_CURRENT_MSK   NO_OS_GENMASK(7, 4)
#define	ADF4371_CP_CURRENT(x)
#define	ADF4371_PD_POL_MSK   NO_OS_BIT(3)
#define	ADF4371_PD_POL(x)
#define	ADF4371_MUXOUT_MSK   NO_OS_GENMASK(7, 4)
#define	ADF4371_MUXOUT(x)
#define	ADF4371_MUXOUT_LVL_MSK   NO_OS_BIT(2)
#define	ADF4371_MUXOUT_LVL(x)
#define	ADF4371_MUXOUT_EN_MSK   NO_OS_BIT(3)
#define	ADF4371_MUXOUT_EN(x)
#define	ADF4371_REFIN_MODE_MASK   NO_OS_BIT(6)
#define	ADF4371_REFIN_MODE(x)
#define	ADF4371_RF_DIV_SEL_MSK   NO_OS_GENMASK(6, 4)
#define	ADF4371_RF_DIV_SEL(x)
#define	ADF4371_MUTE_LD_MSK   NO_OS_BIT(7)
#define	ADF4371_MUTE_LD(x)
#define	ADF4371_TIMEOUT_MSK   NO_OS_GENMASK(1, 0)
#define	ADF4371_TIMEOUT(x)
#define	ADF4371_VCO_ALC_TOUT_MSK   NO_OS_GENMASK(4, 0)
#define	ADF4371_VCO_ALC_TOUT(x)
#define	ADF4371_MIN_VCO_FREQ   4000000000ULL /* 4000 MHz */
#define	ADF4371_MAX_VCO_FREQ   8000000000ULL /* 8000 MHz */
#define	ADF4371_MAX_OUT_RF8_FREQ   ADF4371_MAX_VCO_FREQ /* Hz */
#define	ADF4371_MIN_OUT_RF8_FREQ   (ADF4371_MIN_VCO_FREQ / 64) /* Hz */
#define	ADF4371_MAX_OUT_RF16_FREQ   (ADF4371_MAX_VCO_FREQ * 2) /* Hz */
#define	ADF4371_MIN_OUT_RF16_FREQ   (ADF4371_MIN_VCO_FREQ * 2) /* Hz */
#define	ADF4371_MAX_OUT_RF32_FREQ   (ADF4371_MAX_VCO_FREQ * 4) /* Hz */
#define	ADF4371_MIN_OUT_RF32_FREQ   (ADF4371_MIN_VCO_FREQ * 4) /* Hz */
#define	ADF4371_MAX_FREQ_PFD   250000000UL /* Hz */
#define	ADF4371_MAX_FREQ_REFIN   600000000UL /* Hz */
#define	ADF4371_MODULUS1   33554432ULL
#define	ADF4371_MAX_MODULUS2   NO_OS_BIT(14)
#define	ADF4371_CHECK_RANGE(freq, range)

Enumerations
enum	{   ADF4371_FREQ ,   ADF4371_POWER_DOWN ,   ADF4371_CHANNEL_NAME ,   ADF4371_MUXOUT_ENABLE }
enum	{   ADF4371_CH_RF8 ,   ADF4371_CH_RFAUX8 ,   ADF4371_CH_RF16 ,   ADF4371_CH_RF32 }
enum	adf4371_variant {   ADF4371 ,   ADF4372 }
enum	adf4371_muxout {   ADF4371_TRISTATE = 0x00 ,   ADF4371_DIG_LOCK = 0x01 ,   ADF4371_CH_PUMP_UP = 0x02 ,   ADF4371_CH_PUMP_DOWN = 0x03 ,   ADF4371_RDIV2 = 0x04 ,   ADF4371_N_DIV_OUT = 0x05 ,   ADF4371_VCO_TEST = 0x06 ,   ADF4371_HIGH = 0x08 ,   ADF4371_VCO_CALIB_R_BAND = 0x09 ,   ADF4371_VCO_CALIB_N_BAND = 0x0A }

Functions
int32_t	adf4371_clk_recalc_rate_chan (struct adf4371_dev *dev, uint32_t chan, uint64_t *rate)
int32_t	adf4371_clk_round_rate_dev (struct adf4371_dev *dev, uint64_t rate, uint64_t *rounded_rate)
int32_t	adf4371_clk_set_rate_chan (struct adf4371_dev *dev, uint32_t chan, uint64_t rate)
int32_t	adf4371_init (struct adf4371_dev **device, const struct adf4371_init_param *init_param)
int32_t	adf4371_remove (struct adf4371_dev *device)

Variables
const struct no_os_clk_platform_ops	adf4371_clk_ops
	adf4371 clock ops

Detailed Description

Implementation of ADF4371 Driver.

Author

DBogdan (drago.nosp@m.s.bo.nosp@m.gdan@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Copyright 2020(c) Analog Devices, Inc.

SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

ADF4371_ADDR

#define ADF4371_ADDR

(

x

)

Value:

((x) & 0x7FFF)

ADF4371_ADDR_ASC

#define ADF4371_ADDR_ASC

(

x

)

Value:

no_os_field_prep(ADF4371_ADDR_ASC_MSK, x)

ADF4371_ADDR_ASC_MSK

#define ADF4371_ADDR_ASC_MSK   NO_OS_BIT(2)

ADF4371_ADDR_ASC_R

#define ADF4371_ADDR_ASC_R

(

x

)

Value:

no_os_field_prep(ADF4371_ADDR_ASC_R_MSK, x)

ADF4371_ADDR_ASC_R_MSK

#define ADF4371_ADDR_ASC_R_MSK   NO_OS_BIT(5)

ADF4371_CHECK_RANGE

#define ADF4371_CHECK_RANGE	(		freq,
			range )

Value:

    ((freq > ADF4371_MAX_ ## range) || (freq < ADF4371_MIN_ ## range))

ADF4371_CP_CURRENT

#define ADF4371_CP_CURRENT

(

x

)

Value:

no_os_field_prep(ADF4371_CP_CURRENT_MSK, x)

ADF4371_CP_CURRENT_MSK

#define ADF4371_CP_CURRENT_MSK   NO_OS_GENMASK(7, 4)

ADF4371_FRAC1WORD

#define ADF4371_FRAC1WORD

(

x

)

Value:

no_os_field_prep(ADF4371_FRAC1WORD_MSK, x)

ADF4371_FRAC1WORD_MSK

#define ADF4371_FRAC1WORD_MSK   NO_OS_BIT(0)

ADF4371_FRAC2WORD_H

#define ADF4371_FRAC2WORD_H

(

x

)

Value:

no_os_field_prep(ADF4371_FRAC2WORD_H_MSK, x)

ADF4371_FRAC2WORD_H_MSK

#define ADF4371_FRAC2WORD_H_MSK   NO_OS_GENMASK(6, 0)

ADF4371_FRAC2WORD_L

#define ADF4371_FRAC2WORD_L

(

x

)

Value:

no_os_field_prep(ADF4371_FRAC2WORD_L_MSK, x)

ADF4371_FRAC2WORD_L_MSK

#define ADF4371_FRAC2WORD_L_MSK   NO_OS_GENMASK(7, 1)

ADF4371_MAX_FREQ_PFD

#define ADF4371_MAX_FREQ_PFD   250000000UL /* Hz */

ADF4371_MAX_FREQ_REFIN

#define ADF4371_MAX_FREQ_REFIN   600000000UL /* Hz */

ADF4371_MAX_MODULUS2

#define ADF4371_MAX_MODULUS2   NO_OS_BIT(14)

ADF4371_MAX_OUT_RF16_FREQ

#define ADF4371_MAX_OUT_RF16_FREQ   (ADF4371_MAX_VCO_FREQ * 2) /* Hz */

ADF4371_MAX_OUT_RF32_FREQ

#define ADF4371_MAX_OUT_RF32_FREQ   (ADF4371_MAX_VCO_FREQ * 4) /* Hz */

ADF4371_MAX_OUT_RF8_FREQ

#define ADF4371_MAX_OUT_RF8_FREQ   ADF4371_MAX_VCO_FREQ /* Hz */

ADF4371_MAX_VCO_FREQ

#define ADF4371_MAX_VCO_FREQ   8000000000ULL /* 8000 MHz */

ADF4371_MIN_OUT_RF16_FREQ

#define ADF4371_MIN_OUT_RF16_FREQ   (ADF4371_MIN_VCO_FREQ * 2) /* Hz */

ADF4371_MIN_OUT_RF32_FREQ

#define ADF4371_MIN_OUT_RF32_FREQ   (ADF4371_MIN_VCO_FREQ * 4) /* Hz */

ADF4371_MIN_OUT_RF8_FREQ

#define ADF4371_MIN_OUT_RF8_FREQ   (ADF4371_MIN_VCO_FREQ / 64) /* Hz */

ADF4371_MIN_VCO_FREQ

#define ADF4371_MIN_VCO_FREQ   4000000000ULL /* 4000 MHz */

ADF4371_MOD2WORD

#define ADF4371_MOD2WORD

(

x

)

Value:

no_os_field_prep(ADF4371_MOD2WORD_MSK, x)

ADF4371_MOD2WORD_MSK

#define ADF4371_MOD2WORD_MSK   NO_OS_GENMASK(5, 0)

ADF4371_MODULUS1

#define ADF4371_MODULUS1   33554432ULL

ADF4371_MUTE_LD

#define ADF4371_MUTE_LD

(

x

)

Value:

no_os_field_prep(ADF4371_MUTE_LD_MSK, x)

ADF4371_MUTE_LD_MSK

#define ADF4371_MUTE_LD_MSK   NO_OS_BIT(7)

ADF4371_MUXOUT

#define ADF4371_MUXOUT

(

x

)

Value:

no_os_field_prep(ADF4371_MUXOUT_MSK, x)

ADF4371_MUXOUT_EN

#define ADF4371_MUXOUT_EN

(

x

)

Value:

no_os_field_prep(ADF4371_MUXOUT_EN_MSK, x)

ADF4371_MUXOUT_EN_MSK

#define ADF4371_MUXOUT_EN_MSK   NO_OS_BIT(3)

ADF4371_MUXOUT_LVL

#define ADF4371_MUXOUT_LVL

(

x

)

Value:

no_os_field_prep(ADF4371_MUXOUT_LVL_MSK, x)

ADF4371_MUXOUT_LVL_MSK

#define ADF4371_MUXOUT_LVL_MSK   NO_OS_BIT(2)

ADF4371_MUXOUT_MSK

#define ADF4371_MUXOUT_MSK   NO_OS_GENMASK(7, 4)

ADF4371_PD_POL

#define ADF4371_PD_POL

(

x

)

Value:

no_os_field_prep(ADF4371_PD_POL_MSK, x)

ADF4371_PD_POL_MSK

#define ADF4371_PD_POL_MSK   NO_OS_BIT(3)

ADF4371_READ

#define ADF4371_READ   (1 << 15)

ADF4371_REFIN_MODE

#define ADF4371_REFIN_MODE

(

x

)

Value:

no_os_field_prep(ADF4371_REFIN_MODE_MASK, x)

ADF4371_REFIN_MODE_MASK

#define ADF4371_REFIN_MODE_MASK   NO_OS_BIT(6)

ADF4371_REG

#define ADF4371_REG

(

x

)

Value:

(x)

ADF4371_RESET_CMD

#define ADF4371_RESET_CMD   0x81

ADF4371_RF_DIV_SEL

#define ADF4371_RF_DIV_SEL

(

x

)

Value:

no_os_field_prep(ADF4371_RF_DIV_SEL_MSK, x)

ADF4371_RF_DIV_SEL_MSK

#define ADF4371_RF_DIV_SEL_MSK   NO_OS_GENMASK(6, 4)

ADF4371_SDO_ACT

#define ADF4371_SDO_ACT

(

x

)

Value:

no_os_field_prep(ADF4371_SDO_ACT_MSK, x)

ADF4371_SDO_ACT_MSK

#define ADF4371_SDO_ACT_MSK   NO_OS_BIT(3)

ADF4371_SDO_ACT_R

#define ADF4371_SDO_ACT_R

(

x

)

Value:

no_os_field_prep(ADF4371_SDO_ACT_R_MSK, x)

ADF4371_SDO_ACT_R_MSK

#define ADF4371_SDO_ACT_R_MSK   NO_OS_BIT(4)

ADF4371_TIMEOUT

#define ADF4371_TIMEOUT

(

x

)

Value:

no_os_field_prep(ADF4371_TIMEOUT_MSK, x)

ADF4371_TIMEOUT_MSK

#define ADF4371_TIMEOUT_MSK   NO_OS_GENMASK(1, 0)

ADF4371_VCO_ALC_TOUT

#define ADF4371_VCO_ALC_TOUT

(

x

)

Value:

no_os_field_prep(ADF4371_VCO_ALC_TOUT_MSK, x)

ADF4371_VCO_ALC_TOUT_MSK

#define ADF4371_VCO_ALC_TOUT_MSK   NO_OS_GENMASK(4, 0)

ADF4371_WRITE

#define ADF4371_WRITE   (0 << 15)

Enumeration Type Documentation

anonymous enum

anonymous enum

Enumerator
ADF4371_CH_RF8
ADF4371_CH_RFAUX8
ADF4371_CH_RF16
ADF4371_CH_RF32

anonymous enum

anonymous enum

Enumerator
ADF4371_FREQ
ADF4371_POWER_DOWN
ADF4371_CHANNEL_NAME
ADF4371_MUXOUT_ENABLE

adf4371_muxout

enum adf4371_muxout

Enumerator
ADF4371_TRISTATE
ADF4371_DIG_LOCK
ADF4371_CH_PUMP_UP
ADF4371_CH_PUMP_DOWN
ADF4371_RDIV2
ADF4371_N_DIV_OUT
ADF4371_VCO_TEST
ADF4371_HIGH
ADF4371_VCO_CALIB_R_BAND
ADF4371_VCO_CALIB_N_BAND

adf4371_variant

enum adf4371_variant

Enumerator
ADF4371
ADF4372

Function Documentation

adf4371_clk_recalc_rate_chan()

int32_t adf4371_clk_recalc_rate_chan	(	struct adf4371_dev *	dev,
		uint32_t	chan,
		uint64_t *	rate )

Recalculate rate corresponding to a channel.

Parameters

dev	- The device structure.
chan	- Channel number.
rate	- Channel rate.

Returns

0 in case of success, negative error code otherwise.

adf4371_clk_round_rate_dev()

int32_t adf4371_clk_round_rate_dev	(	struct adf4371_dev *	dev,
		uint64_t	rate,
		uint64_t *	rounded_rate )

Calculate closest possible rate

Parameters

dev	- The device structure
rate	- The desired rate.
rounded_rate	- The closest possible rate of desired rate.

Returns

0 in case of success, negative error code otherwise.

adf4371_clk_set_rate_chan()

int32_t adf4371_clk_set_rate_chan	(	struct adf4371_dev *	dev,
		uint32_t	chan,
		uint64_t	rate )

Set channel rate.

Parameters

dev	- The device structure.
chan	- Channel number.
rate	- Channel rate.

Returns

0 in case of success, negative error code otherwise.

adf4371_init()

int32_t adf4371_init	(	struct adf4371_dev **	device,
		const struct adf4371_init_param *	init_param )

Initialize the device.

Parameters

device	- The device structure.
init_param	- The structure that contains the device initial parameters.

Returns

0 in case of success, negative error code otherwise.

adf4371_remove()

int32_t adf4371_remove

(

struct adf4371_dev *

device

)

Remove the device - release resources.

Parameters

device

- The device structure.

Returns

0 in case of success, negative error code otherwise.

Variable Documentation

adf4371_clk_ops

const struct no_os_clk_platform_ops adf4371_clk_ops

Initial value:

= {
    .clk_recalc_rate = &adf4371_clk_recalc_rate,
    .clk_round_rate = &adf4371_clk_round_rate,
    .clk_set_rate = &adf4371_clk_set_rate,
}

adf4371 clock ops