Driver for the Altera CDR/CMU PLL dynamic reconfiguration. More...

#include <limits.h>
#include "no_os_util.h"
#include "altera_a10_cdr_pll.h"

Include dependency graph for altera_a10_cdr_pll.c:

Macros
#define	A10_CDR_PLL_PFD_MIN 50000 /* 50.00 Mhz */

#define	A10_CDR_PLL_PFD_MAX 800000 /* 800.00 Mhz */

#define	A10_CDR_PLL_VCO_MIN 4900000 /* 4.90 GHz */

#define	A10_CDR_PLL_VCO_MAX 14150000 /* 14.15 GHz */

Functions
uint32_t	altera_a10_cdr_lookup_vco_speed (uint32_t fvco)
	altera_a10_cdr_lookup_vco_speed

uint32_t	altera_a10_cdr_lookup_vco_speed_fix (uint32_t fvco)
	altera_a10_cdr_lookup_vco_speed_fix

uint32_t	altera_a10_cdr_lookup_cp_current_pd (uint32_t fvco, uint32_t lpd)
	altera_a10_cdr_lookup_cp_current_pd

uint32_t	altera_a10_cdr_lookup_clklow_div (uint32_t fref)
	altera_a10_cdr_lookup_clklow_div

uint32_t	altera_a10_cdr_lookup_fastlock (uint32_t lpd)
	altera_a10_cdr_lookup_fastlock

uint32_t	altera_a10_cdr_lookup_lf_resistor_pd (uint32_t fvco, uint32_t lpd)
	altera_a10_cdr_lookup_lf_resistor_pd

uint32_t	altera_a10_cdr_lookup_lf_resistor_pfd (uint32_t fvco, uint32_t m, uint32_t lpfd)
	altera_a10_cdr_lookup_lf_resistor_pfd

uint32_t	altera_a10_cdr_lookup_cp_current_pfd (uint32_t fvco, uint32_t m, uint32_t lpfd)
	altera_a10_cdr_lookup_cp_current_pfd

void	altera_a10_cdr_calc_params (uint32_t fref, uint32_t fout, uint32_t best_n, uint32_t best_m, uint32_t best_lpfd, uint32_t best_lpd, uint32_t *best_fvco)
	altera_a10_cdr_calc_params

long	altera_a10_cdr_pll_round_rate (struct adxcvr *xcvr, uint32_t rate_khz)
	altera_a10_cdr_pll_round_rate

int32_t	altera_a10_cdr_pll_set_rate (struct adxcvr *xcvr, uint32_t rate_khz)
	altera_a10_cdr_pll_set_rate

uint32_t	altera_a10_cdr_pll_recalc_rate (struct adxcvr *xcvr)
	altera_a10_cdr_pll_recalc_rate

Detailed Description

Driver for the Altera CDR/CMU PLL dynamic reconfiguration.

Author: DBogdan (drago.nosp@m.s.bo.nosp@m.gdan@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ A10_CDR_PLL_PFD_MAX

#define A10_CDR_PLL_PFD_MAX 800000 /* 800.00 Mhz */

◆ A10_CDR_PLL_PFD_MIN

#define A10_CDR_PLL_PFD_MIN 50000 /* 50.00 Mhz */

◆ A10_CDR_PLL_VCO_MAX

#define A10_CDR_PLL_VCO_MAX 14150000 /* 14.15 GHz */

◆ A10_CDR_PLL_VCO_MIN

#define A10_CDR_PLL_VCO_MIN 4900000 /* 4.90 GHz */