GCR_PMR

Macros
#define	MXC_F_GCR_PMR_MODE_POS   0
#define	MXC_F_GCR_PMR_MODE   ((uint32_t)(0x7UL << MXC_F_GCR_PMR_MODE_POS))
#define	MXC_V_GCR_PMR_MODE_ACTIVE   ((uint32_t)0x0UL)
#define	MXC_S_GCR_PMR_MODE_ACTIVE   (MXC_V_GCR_PMR_MODE_ACTIVE << MXC_F_GCR_PMR_MODE_POS)
#define	MXC_V_GCR_PMR_MODE_SHUTDOWN   ((uint32_t)0x3UL)
#define	MXC_S_GCR_PMR_MODE_SHUTDOWN   (MXC_V_GCR_PMR_MODE_SHUTDOWN << MXC_F_GCR_PMR_MODE_POS)
#define	MXC_V_GCR_PMR_MODE_BACKUP   ((uint32_t)0x4UL)
#define	MXC_S_GCR_PMR_MODE_BACKUP   (MXC_V_GCR_PMR_MODE_BACKUP << MXC_F_GCR_PMR_MODE_POS)
#define	MXC_F_GCR_PMR_GPIOWKEN_POS   4
#define	MXC_F_GCR_PMR_GPIOWKEN   ((uint32_t)(0x1UL << MXC_F_GCR_PMR_GPIOWKEN_POS))
#define	MXC_F_GCR_PMR_RTCWKEN_POS   5
#define	MXC_F_GCR_PMR_RTCWKEN   ((uint32_t)(0x1UL << MXC_F_GCR_PMR_RTCWKEN_POS))
#define	MXC_F_GCR_PMR_USBWKEN_POS   6
#define	MXC_F_GCR_PMR_USBWKEN   ((uint32_t)(0x1UL << MXC_F_GCR_PMR_USBWKEN_POS))
#define	MXC_F_GCR_PMR_CRYPTOPD_POS   15
#define	MXC_F_GCR_PMR_CRYPTOPD   ((uint32_t)(0x1UL << MXC_F_GCR_PMR_CRYPTOPD_POS))
#define	MXC_V_GCR_PMR_CRYPTOPD_ACTIVE   ((uint32_t)0x0UL)
#define	MXC_S_GCR_PMR_CRYPTOPD_ACTIVE   (MXC_V_GCR_PMR_CRYPTOPD_ACTIVE << MXC_F_GCR_PMR_CRYPTOPD_POS)
#define	MXC_V_GCR_PMR_CRYPTOPD_DEEPSLEEP   ((uint32_t)0x1UL)
#define	MXC_S_GCR_PMR_CRYPTOPD_DEEPSLEEP   (MXC_V_GCR_PMR_CRYPTOPD_DEEPSLEEP << MXC_F_GCR_PMR_CRYPTOPD_POS)
#define	MXC_F_GCR_PMR_HIRC96PD_POS   16
#define	MXC_F_GCR_PMR_HIRC96PD   ((uint32_t)(0x1UL << MXC_F_GCR_PMR_HIRC96PD_POS))
#define	MXC_V_GCR_PMR_HIRC96PD_ACTIVE   ((uint32_t)0x0UL)
#define	MXC_S_GCR_PMR_HIRC96PD_ACTIVE   (MXC_V_GCR_PMR_HIRC96PD_ACTIVE << MXC_F_GCR_PMR_HIRC96PD_POS)
#define	MXC_V_GCR_PMR_HIRC96PD_DEEPSLEEP   ((uint32_t)0x1UL)
#define	MXC_S_GCR_PMR_HIRC96PD_DEEPSLEEP   (MXC_V_GCR_PMR_HIRC96PD_DEEPSLEEP << MXC_F_GCR_PMR_HIRC96PD_POS)
#define	MXC_F_GCR_PMR_HIRC8PD_POS   17
#define	MXC_F_GCR_PMR_HIRC8PD   ((uint32_t)(0x1UL << MXC_F_GCR_PMR_HIRC8PD_POS))
#define	MXC_V_GCR_PMR_HIRC8PD_ACTIVE   ((uint32_t)0x0UL)
#define	MXC_S_GCR_PMR_HIRC8PD_ACTIVE   (MXC_V_GCR_PMR_HIRC8PD_ACTIVE << MXC_F_GCR_PMR_HIRC8PD_POS)
#define	MXC_V_GCR_PMR_HIRC8PD_DEEPSLEEP   ((uint32_t)0x1UL)
#define	MXC_S_GCR_PMR_HIRC8PD_DEEPSLEEP   (MXC_V_GCR_PMR_HIRC8PD_DEEPSLEEP << MXC_F_GCR_PMR_HIRC8PD_POS)

Detailed Description

Power Management.

Macro Definition Documentation

MXC_F_GCR_PMR_CRYPTOPD

#define MXC_F_GCR_PMR_CRYPTOPD   ((uint32_t)(0x1UL << MXC_F_GCR_PMR_CRYPTOPD_POS))

PMR_CRYPTOPD Mask

MXC_F_GCR_PMR_CRYPTOPD_POS

#define MXC_F_GCR_PMR_CRYPTOPD_POS   15

PMR_CRYPTOPD Position

MXC_F_GCR_PMR_GPIOWKEN

#define MXC_F_GCR_PMR_GPIOWKEN   ((uint32_t)(0x1UL << MXC_F_GCR_PMR_GPIOWKEN_POS))

PMR_GPIOWKEN Mask

MXC_F_GCR_PMR_GPIOWKEN_POS

#define MXC_F_GCR_PMR_GPIOWKEN_POS   4

PMR_GPIOWKEN Position

MXC_F_GCR_PMR_HIRC8PD

#define MXC_F_GCR_PMR_HIRC8PD   ((uint32_t)(0x1UL << MXC_F_GCR_PMR_HIRC8PD_POS))

PMR_HIRC8PD Mask

MXC_F_GCR_PMR_HIRC8PD_POS

#define MXC_F_GCR_PMR_HIRC8PD_POS   17

PMR_HIRC8PD Position

MXC_F_GCR_PMR_HIRC96PD

#define MXC_F_GCR_PMR_HIRC96PD   ((uint32_t)(0x1UL << MXC_F_GCR_PMR_HIRC96PD_POS))

PMR_HIRC96PD Mask

MXC_F_GCR_PMR_HIRC96PD_POS

#define MXC_F_GCR_PMR_HIRC96PD_POS   16

PMR_HIRC96PD Position

MXC_F_GCR_PMR_MODE

#define MXC_F_GCR_PMR_MODE   ((uint32_t)(0x7UL << MXC_F_GCR_PMR_MODE_POS))

PMR_MODE Mask

MXC_F_GCR_PMR_MODE_POS

#define MXC_F_GCR_PMR_MODE_POS   0

PMR_MODE Position

MXC_F_GCR_PMR_RTCWKEN

#define MXC_F_GCR_PMR_RTCWKEN   ((uint32_t)(0x1UL << MXC_F_GCR_PMR_RTCWKEN_POS))

PMR_RTCWKEN Mask

MXC_F_GCR_PMR_RTCWKEN_POS

#define MXC_F_GCR_PMR_RTCWKEN_POS   5

PMR_RTCWKEN Position

MXC_F_GCR_PMR_USBWKEN

#define MXC_F_GCR_PMR_USBWKEN   ((uint32_t)(0x1UL << MXC_F_GCR_PMR_USBWKEN_POS))

PMR_USBWKEN Mask

MXC_F_GCR_PMR_USBWKEN_POS

#define MXC_F_GCR_PMR_USBWKEN_POS   6

PMR_USBWKEN Position

MXC_S_GCR_PMR_CRYPTOPD_ACTIVE

#define MXC_S_GCR_PMR_CRYPTOPD_ACTIVE   (MXC_V_GCR_PMR_CRYPTOPD_ACTIVE << MXC_F_GCR_PMR_CRYPTOPD_POS)

PMR_CRYPTOPD_ACTIVE Setting

MXC_S_GCR_PMR_CRYPTOPD_DEEPSLEEP

#define MXC_S_GCR_PMR_CRYPTOPD_DEEPSLEEP   (MXC_V_GCR_PMR_CRYPTOPD_DEEPSLEEP << MXC_F_GCR_PMR_CRYPTOPD_POS)

PMR_CRYPTOPD_DEEPSLEEP Setting

MXC_S_GCR_PMR_HIRC8PD_ACTIVE

#define MXC_S_GCR_PMR_HIRC8PD_ACTIVE   (MXC_V_GCR_PMR_HIRC8PD_ACTIVE << MXC_F_GCR_PMR_HIRC8PD_POS)

PMR_HIRC8PD_ACTIVE Setting

MXC_S_GCR_PMR_HIRC8PD_DEEPSLEEP

#define MXC_S_GCR_PMR_HIRC8PD_DEEPSLEEP   (MXC_V_GCR_PMR_HIRC8PD_DEEPSLEEP << MXC_F_GCR_PMR_HIRC8PD_POS)

PMR_HIRC8PD_DEEPSLEEP Setting

MXC_S_GCR_PMR_HIRC96PD_ACTIVE

#define MXC_S_GCR_PMR_HIRC96PD_ACTIVE   (MXC_V_GCR_PMR_HIRC96PD_ACTIVE << MXC_F_GCR_PMR_HIRC96PD_POS)

PMR_HIRC96PD_ACTIVE Setting

MXC_S_GCR_PMR_HIRC96PD_DEEPSLEEP

#define MXC_S_GCR_PMR_HIRC96PD_DEEPSLEEP   (MXC_V_GCR_PMR_HIRC96PD_DEEPSLEEP << MXC_F_GCR_PMR_HIRC96PD_POS)

PMR_HIRC96PD_DEEPSLEEP Setting

MXC_S_GCR_PMR_MODE_ACTIVE

#define MXC_S_GCR_PMR_MODE_ACTIVE   (MXC_V_GCR_PMR_MODE_ACTIVE << MXC_F_GCR_PMR_MODE_POS)

PMR_MODE_ACTIVE Setting

MXC_S_GCR_PMR_MODE_BACKUP

#define MXC_S_GCR_PMR_MODE_BACKUP   (MXC_V_GCR_PMR_MODE_BACKUP << MXC_F_GCR_PMR_MODE_POS)

PMR_MODE_BACKUP Setting

MXC_S_GCR_PMR_MODE_SHUTDOWN

#define MXC_S_GCR_PMR_MODE_SHUTDOWN   (MXC_V_GCR_PMR_MODE_SHUTDOWN << MXC_F_GCR_PMR_MODE_POS)

PMR_MODE_SHUTDOWN Setting

MXC_V_GCR_PMR_CRYPTOPD_ACTIVE

#define MXC_V_GCR_PMR_CRYPTOPD_ACTIVE   ((uint32_t)0x0UL)

PMR_CRYPTOPD_ACTIVE Value

MXC_V_GCR_PMR_CRYPTOPD_DEEPSLEEP

#define MXC_V_GCR_PMR_CRYPTOPD_DEEPSLEEP   ((uint32_t)0x1UL)

PMR_CRYPTOPD_DEEPSLEEP Value

MXC_V_GCR_PMR_HIRC8PD_ACTIVE

#define MXC_V_GCR_PMR_HIRC8PD_ACTIVE   ((uint32_t)0x0UL)

PMR_HIRC8PD_ACTIVE Value

MXC_V_GCR_PMR_HIRC8PD_DEEPSLEEP

#define MXC_V_GCR_PMR_HIRC8PD_DEEPSLEEP   ((uint32_t)0x1UL)

PMR_HIRC8PD_DEEPSLEEP Value

MXC_V_GCR_PMR_HIRC96PD_ACTIVE

#define MXC_V_GCR_PMR_HIRC96PD_ACTIVE   ((uint32_t)0x0UL)

PMR_HIRC96PD_ACTIVE Value

MXC_V_GCR_PMR_HIRC96PD_DEEPSLEEP

#define MXC_V_GCR_PMR_HIRC96PD_DEEPSLEEP   ((uint32_t)0x1UL)

PMR_HIRC96PD_DEEPSLEEP Value

MXC_V_GCR_PMR_MODE_ACTIVE

#define MXC_V_GCR_PMR_MODE_ACTIVE   ((uint32_t)0x0UL)

PMR_MODE_ACTIVE Value

MXC_V_GCR_PMR_MODE_BACKUP

#define MXC_V_GCR_PMR_MODE_BACKUP   ((uint32_t)0x4UL)

PMR_MODE_BACKUP Value

MXC_V_GCR_PMR_MODE_SHUTDOWN

#define MXC_V_GCR_PMR_MODE_SHUTDOWN   ((uint32_t)0x3UL)

PMR_MODE_SHUTDOWN Value