MAX32650 Peripheral Driver API
Peripheral Driver API for the MAX32650
rtc_regs.h
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1
8/******************************************************************************
9 *
10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
11 * Analog Devices, Inc.),
12 * Copyright (C) 2023-2024 Analog Devices, Inc.
13 *
14 * Licensed under the Apache License, Version 2.0 (the "License");
15 * you may not use this file except in compliance with the License.
16 * You may obtain a copy of the License at
17 *
18 * http://www.apache.org/licenses/LICENSE-2.0
19 *
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an "AS IS" BASIS,
22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
25 *
26 ******************************************************************************/
27
28#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_RTC_REGS_H_
29#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_RTC_REGS_H_
30
31/* **** Includes **** */
32#include <stdint.h>
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
38#if defined (__ICCARM__)
39 #pragma system_include
40#endif
41
42#if defined (__CC_ARM)
43 #pragma anon_unions
44#endif
46/*
47 If types are not defined elsewhere (CMSIS) define them here
48*/
49#ifndef __IO
50#define __IO volatile
51#endif
52#ifndef __I
53#define __I volatile const
54#endif
55#ifndef __O
56#define __O volatile
57#endif
58#ifndef __R
59#define __R volatile const
60#endif
62
63/* **** Definitions **** */
64
76typedef struct {
77 __IO uint32_t sec;
78 __IO uint32_t ssec;
79 __IO uint32_t toda;
80 __IO uint32_t sseca;
81 __IO uint32_t ctrl;
82 __R uint32_t rsv_0x14;
83 __IO uint32_t oscctrl;
85
86/* Register offsets for module RTC */
93#define MXC_R_RTC_SEC ((uint32_t)0x00000000UL)
94#define MXC_R_RTC_SSEC ((uint32_t)0x00000004UL)
95#define MXC_R_RTC_TODA ((uint32_t)0x00000008UL)
96#define MXC_R_RTC_SSECA ((uint32_t)0x0000000CUL)
97#define MXC_R_RTC_CTRL ((uint32_t)0x00000010UL)
98#define MXC_R_RTC_OSCCTRL ((uint32_t)0x00000018UL)
107#define MXC_F_RTC_SEC_SEC_POS 0
108#define MXC_F_RTC_SEC_SEC ((uint32_t)(0xFFFFFFFFUL << MXC_F_RTC_SEC_SEC_POS))
119#define MXC_F_RTC_SSEC_SSEC_POS 0
120#define MXC_F_RTC_SSEC_SSEC ((uint32_t)(0xFFUL << MXC_F_RTC_SSEC_SSEC_POS))
130#define MXC_F_RTC_TODA_TOD_ALARM_POS 0
131#define MXC_F_RTC_TODA_TOD_ALARM ((uint32_t)(0xFFFFFUL << MXC_F_RTC_TODA_TOD_ALARM_POS))
142#define MXC_F_RTC_SSECA_SSEC_ALARM_POS 0
143#define MXC_F_RTC_SSECA_SSEC_ALARM ((uint32_t)(0xFFFFFFFFUL << MXC_F_RTC_SSECA_SSEC_ALARM_POS))
153#define MXC_F_RTC_CTRL_ENABLE_POS 0
154#define MXC_F_RTC_CTRL_ENABLE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ENABLE_POS))
155#define MXC_V_RTC_CTRL_ENABLE_DIS ((uint32_t)0x0UL)
156#define MXC_S_RTC_CTRL_ENABLE_DIS (MXC_V_RTC_CTRL_ENABLE_DIS << MXC_F_RTC_CTRL_ENABLE_POS)
157#define MXC_V_RTC_CTRL_ENABLE_EN ((uint32_t)0x1UL)
158#define MXC_S_RTC_CTRL_ENABLE_EN (MXC_V_RTC_CTRL_ENABLE_EN << MXC_F_RTC_CTRL_ENABLE_POS)
160#define MXC_F_RTC_CTRL_TOD_ALARM_EN_POS 1
161#define MXC_F_RTC_CTRL_TOD_ALARM_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_TOD_ALARM_EN_POS))
162#define MXC_V_RTC_CTRL_TOD_ALARM_EN_DIS ((uint32_t)0x0UL)
163#define MXC_S_RTC_CTRL_TOD_ALARM_EN_DIS (MXC_V_RTC_CTRL_TOD_ALARM_EN_DIS << MXC_F_RTC_CTRL_TOD_ALARM_EN_POS)
164#define MXC_V_RTC_CTRL_TOD_ALARM_EN_EN ((uint32_t)0x1UL)
165#define MXC_S_RTC_CTRL_TOD_ALARM_EN_EN (MXC_V_RTC_CTRL_TOD_ALARM_EN_EN << MXC_F_RTC_CTRL_TOD_ALARM_EN_POS)
167#define MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS 2
168#define MXC_F_RTC_CTRL_SSEC_ALARM_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS))
169#define MXC_V_RTC_CTRL_SSEC_ALARM_EN_DIS ((uint32_t)0x0UL)
170#define MXC_S_RTC_CTRL_SSEC_ALARM_EN_DIS (MXC_V_RTC_CTRL_SSEC_ALARM_EN_DIS << MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS)
171#define MXC_V_RTC_CTRL_SSEC_ALARM_EN_EN ((uint32_t)0x1UL)
172#define MXC_S_RTC_CTRL_SSEC_ALARM_EN_EN (MXC_V_RTC_CTRL_SSEC_ALARM_EN_EN << MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS)
174#define MXC_F_RTC_CTRL_BUSY_POS 3
175#define MXC_F_RTC_CTRL_BUSY ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_BUSY_POS))
176#define MXC_V_RTC_CTRL_BUSY_IDLE ((uint32_t)0x0UL)
177#define MXC_S_RTC_CTRL_BUSY_IDLE (MXC_V_RTC_CTRL_BUSY_IDLE << MXC_F_RTC_CTRL_BUSY_POS)
178#define MXC_V_RTC_CTRL_BUSY_BUSY ((uint32_t)0x1UL)
179#define MXC_S_RTC_CTRL_BUSY_BUSY (MXC_V_RTC_CTRL_BUSY_BUSY << MXC_F_RTC_CTRL_BUSY_POS)
181#define MXC_F_RTC_CTRL_READY_POS 4
182#define MXC_F_RTC_CTRL_READY ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_READY_POS))
183#define MXC_V_RTC_CTRL_READY_NOT_READY ((uint32_t)0x0UL)
184#define MXC_S_RTC_CTRL_READY_NOT_READY (MXC_V_RTC_CTRL_READY_NOT_READY << MXC_F_RTC_CTRL_READY_POS)
185#define MXC_V_RTC_CTRL_READY_READY ((uint32_t)0x1UL)
186#define MXC_S_RTC_CTRL_READY_READY (MXC_V_RTC_CTRL_READY_READY << MXC_F_RTC_CTRL_READY_POS)
188#define MXC_F_RTC_CTRL_READY_INT_EN_POS 5
189#define MXC_F_RTC_CTRL_READY_INT_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_READY_INT_EN_POS))
190#define MXC_V_RTC_CTRL_READY_INT_EN_DIS ((uint32_t)0x0UL)
191#define MXC_S_RTC_CTRL_READY_INT_EN_DIS (MXC_V_RTC_CTRL_READY_INT_EN_DIS << MXC_F_RTC_CTRL_READY_INT_EN_POS)
192#define MXC_V_RTC_CTRL_READY_INT_EN_EN ((uint32_t)0x1UL)
193#define MXC_S_RTC_CTRL_READY_INT_EN_EN (MXC_V_RTC_CTRL_READY_INT_EN_EN << MXC_F_RTC_CTRL_READY_INT_EN_POS)
195#define MXC_F_RTC_CTRL_TOD_ALARM_FL_POS 6
196#define MXC_F_RTC_CTRL_TOD_ALARM_FL ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_TOD_ALARM_FL_POS))
197#define MXC_V_RTC_CTRL_TOD_ALARM_FL_INACTIVE ((uint32_t)0x0UL)
198#define MXC_S_RTC_CTRL_TOD_ALARM_FL_INACTIVE (MXC_V_RTC_CTRL_TOD_ALARM_FL_INACTIVE << MXC_F_RTC_CTRL_TOD_ALARM_FL_POS)
199#define MXC_V_RTC_CTRL_TOD_ALARM_FL_PENDING ((uint32_t)0x1UL)
200#define MXC_S_RTC_CTRL_TOD_ALARM_FL_PENDING (MXC_V_RTC_CTRL_TOD_ALARM_FL_PENDING << MXC_F_RTC_CTRL_TOD_ALARM_FL_POS)
202#define MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS 7
203#define MXC_F_RTC_CTRL_SSEC_ALARM_FL ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS))
204#define MXC_V_RTC_CTRL_SSEC_ALARM_FL_INACTIVE ((uint32_t)0x0UL)
205#define MXC_S_RTC_CTRL_SSEC_ALARM_FL_INACTIVE (MXC_V_RTC_CTRL_SSEC_ALARM_FL_INACTIVE << MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS)
206#define MXC_V_RTC_CTRL_SSEC_ALARM_FL_PENDING ((uint32_t)0x1UL)
207#define MXC_S_RTC_CTRL_SSEC_ALARM_FL_PENDING (MXC_V_RTC_CTRL_SSEC_ALARM_FL_PENDING << MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS)
209#define MXC_F_RTC_CTRL_SQWOUT_EN_POS 8
210#define MXC_F_RTC_CTRL_SQWOUT_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SQWOUT_EN_POS))
211#define MXC_V_RTC_CTRL_SQWOUT_EN_DIS ((uint32_t)0x0UL)
212#define MXC_S_RTC_CTRL_SQWOUT_EN_DIS (MXC_V_RTC_CTRL_SQWOUT_EN_DIS << MXC_F_RTC_CTRL_SQWOUT_EN_POS)
213#define MXC_V_RTC_CTRL_SQWOUT_EN_EN ((uint32_t)0x1UL)
214#define MXC_S_RTC_CTRL_SQWOUT_EN_EN (MXC_V_RTC_CTRL_SQWOUT_EN_EN << MXC_F_RTC_CTRL_SQWOUT_EN_POS)
216#define MXC_F_RTC_CTRL_FREQ_SEL_POS 9
217#define MXC_F_RTC_CTRL_FREQ_SEL ((uint32_t)(0x3UL << MXC_F_RTC_CTRL_FREQ_SEL_POS))
218#define MXC_V_RTC_CTRL_FREQ_SEL_FREQ1HZ ((uint32_t)0x0UL)
219#define MXC_S_RTC_CTRL_FREQ_SEL_FREQ1HZ (MXC_V_RTC_CTRL_FREQ_SEL_FREQ1HZ << MXC_F_RTC_CTRL_FREQ_SEL_POS)
220#define MXC_V_RTC_CTRL_FREQ_SEL_FREQ512HZ ((uint32_t)0x1UL)
221#define MXC_S_RTC_CTRL_FREQ_SEL_FREQ512HZ (MXC_V_RTC_CTRL_FREQ_SEL_FREQ512HZ << MXC_F_RTC_CTRL_FREQ_SEL_POS)
222#define MXC_V_RTC_CTRL_FREQ_SEL_FREQ4KHZ ((uint32_t)0x2UL)
223#define MXC_S_RTC_CTRL_FREQ_SEL_FREQ4KHZ (MXC_V_RTC_CTRL_FREQ_SEL_FREQ4KHZ << MXC_F_RTC_CTRL_FREQ_SEL_POS)
225#define MXC_F_RTC_CTRL_ACRE_POS 14
226#define MXC_F_RTC_CTRL_ACRE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ACRE_POS))
227#define MXC_V_RTC_CTRL_ACRE_SYNC ((uint32_t)0x0UL)
228#define MXC_S_RTC_CTRL_ACRE_SYNC (MXC_V_RTC_CTRL_ACRE_SYNC << MXC_F_RTC_CTRL_ACRE_POS)
229#define MXC_V_RTC_CTRL_ACRE_ASYNC ((uint32_t)0x1UL)
230#define MXC_S_RTC_CTRL_ACRE_ASYNC (MXC_V_RTC_CTRL_ACRE_ASYNC << MXC_F_RTC_CTRL_ACRE_POS)
232#define MXC_F_RTC_CTRL_WRITE_EN_POS 15
233#define MXC_F_RTC_CTRL_WRITE_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_WRITE_EN_POS))
234#define MXC_V_RTC_CTRL_WRITE_EN_DIS ((uint32_t)0x0UL)
235#define MXC_S_RTC_CTRL_WRITE_EN_DIS (MXC_V_RTC_CTRL_WRITE_EN_DIS << MXC_F_RTC_CTRL_WRITE_EN_POS)
236#define MXC_V_RTC_CTRL_WRITE_EN_EN ((uint32_t)0x1UL)
237#define MXC_S_RTC_CTRL_WRITE_EN_EN (MXC_V_RTC_CTRL_WRITE_EN_EN << MXC_F_RTC_CTRL_WRITE_EN_POS)
247#define MXC_F_RTC_OSCCTRL_FILTER_EN_POS 0
248#define MXC_F_RTC_OSCCTRL_FILTER_EN ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_FILTER_EN_POS))
250#define MXC_F_RTC_OSCCTRL_IBIAS_SEL_POS 1
251#define MXC_F_RTC_OSCCTRL_IBIAS_SEL ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_IBIAS_SEL_POS))
253#define MXC_F_RTC_OSCCTRL_HYST_EN_POS 2
254#define MXC_F_RTC_OSCCTRL_HYST_EN ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_HYST_EN_POS))
256#define MXC_F_RTC_OSCCTRL_IBIAS_EN_POS 3
257#define MXC_F_RTC_OSCCTRL_IBIAS_EN ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_IBIAS_EN_POS))
259#define MXC_F_RTC_OSCCTRL_BYPASS_POS 4
260#define MXC_F_RTC_OSCCTRL_BYPASS ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_BYPASS_POS))
262#define MXC_F_RTC_OSCCTRL_32KOUT_POS 5
263#define MXC_F_RTC_OSCCTRL_32KOUT ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_32KOUT_POS))
267#ifdef __cplusplus
268}
269#endif
270
271#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_RTC_REGS_H_
__IO uint32_t sec
Definition: rtc_regs.h:77
__IO uint32_t ctrl
Definition: rtc_regs.h:81
__IO uint32_t toda
Definition: rtc_regs.h:79
__IO uint32_t oscctrl
Definition: rtc_regs.h:83
__IO uint32_t sseca
Definition: rtc_regs.h:80
__IO uint32_t ssec
Definition: rtc_regs.h:78
Definition: rtc_regs.h:76