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#define | MXC_R_RTC_SEC ((uint32_t)0x00000000UL) |
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#define | MXC_R_RTC_SSEC ((uint32_t)0x00000004UL) |
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#define | MXC_R_RTC_TODA ((uint32_t)0x00000008UL) |
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#define | MXC_R_RTC_SSECA ((uint32_t)0x0000000CUL) |
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#define | MXC_R_RTC_CTRL ((uint32_t)0x00000010UL) |
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#define | MXC_R_RTC_OSCCTRL ((uint32_t)0x00000018UL) |
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#define | MXC_F_RTC_SEC_SEC_POS 0 |
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#define | MXC_F_RTC_SEC_SEC ((uint32_t)(0xFFFFFFFFUL << MXC_F_RTC_SEC_SEC_POS)) |
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#define | MXC_F_RTC_SSEC_SSEC_POS 0 |
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#define | MXC_F_RTC_SSEC_SSEC ((uint32_t)(0xFFUL << MXC_F_RTC_SSEC_SSEC_POS)) |
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#define | MXC_F_RTC_TODA_TOD_ALARM_POS 0 |
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#define | MXC_F_RTC_TODA_TOD_ALARM ((uint32_t)(0xFFFFFUL << MXC_F_RTC_TODA_TOD_ALARM_POS)) |
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#define | MXC_F_RTC_SSECA_SSEC_ALARM_POS 0 |
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#define | MXC_F_RTC_SSECA_SSEC_ALARM ((uint32_t)(0xFFFFFFFFUL << MXC_F_RTC_SSECA_SSEC_ALARM_POS)) |
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#define | MXC_F_RTC_CTRL_ENABLE_POS 0 |
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#define | MXC_F_RTC_CTRL_ENABLE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ENABLE_POS)) |
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#define | MXC_V_RTC_CTRL_ENABLE_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_RTC_CTRL_ENABLE_DIS (MXC_V_RTC_CTRL_ENABLE_DIS << MXC_F_RTC_CTRL_ENABLE_POS) |
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#define | MXC_V_RTC_CTRL_ENABLE_EN ((uint32_t)0x1UL) |
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#define | MXC_S_RTC_CTRL_ENABLE_EN (MXC_V_RTC_CTRL_ENABLE_EN << MXC_F_RTC_CTRL_ENABLE_POS) |
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#define | MXC_F_RTC_CTRL_TOD_ALARM_EN_POS 1 |
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#define | MXC_F_RTC_CTRL_TOD_ALARM_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_TOD_ALARM_EN_POS)) |
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#define | MXC_V_RTC_CTRL_TOD_ALARM_EN_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_RTC_CTRL_TOD_ALARM_EN_DIS (MXC_V_RTC_CTRL_TOD_ALARM_EN_DIS << MXC_F_RTC_CTRL_TOD_ALARM_EN_POS) |
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#define | MXC_V_RTC_CTRL_TOD_ALARM_EN_EN ((uint32_t)0x1UL) |
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#define | MXC_S_RTC_CTRL_TOD_ALARM_EN_EN (MXC_V_RTC_CTRL_TOD_ALARM_EN_EN << MXC_F_RTC_CTRL_TOD_ALARM_EN_POS) |
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#define | MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS 2 |
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#define | MXC_F_RTC_CTRL_SSEC_ALARM_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS)) |
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#define | MXC_V_RTC_CTRL_SSEC_ALARM_EN_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_RTC_CTRL_SSEC_ALARM_EN_DIS (MXC_V_RTC_CTRL_SSEC_ALARM_EN_DIS << MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS) |
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#define | MXC_V_RTC_CTRL_SSEC_ALARM_EN_EN ((uint32_t)0x1UL) |
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#define | MXC_S_RTC_CTRL_SSEC_ALARM_EN_EN (MXC_V_RTC_CTRL_SSEC_ALARM_EN_EN << MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS) |
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#define | MXC_F_RTC_CTRL_BUSY_POS 3 |
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#define | MXC_F_RTC_CTRL_BUSY ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_BUSY_POS)) |
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#define | MXC_V_RTC_CTRL_BUSY_IDLE ((uint32_t)0x0UL) |
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#define | MXC_S_RTC_CTRL_BUSY_IDLE (MXC_V_RTC_CTRL_BUSY_IDLE << MXC_F_RTC_CTRL_BUSY_POS) |
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#define | MXC_V_RTC_CTRL_BUSY_BUSY ((uint32_t)0x1UL) |
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#define | MXC_S_RTC_CTRL_BUSY_BUSY (MXC_V_RTC_CTRL_BUSY_BUSY << MXC_F_RTC_CTRL_BUSY_POS) |
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#define | MXC_F_RTC_CTRL_READY_POS 4 |
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#define | MXC_F_RTC_CTRL_READY ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_READY_POS)) |
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#define | MXC_V_RTC_CTRL_READY_NOT_READY ((uint32_t)0x0UL) |
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#define | MXC_S_RTC_CTRL_READY_NOT_READY (MXC_V_RTC_CTRL_READY_NOT_READY << MXC_F_RTC_CTRL_READY_POS) |
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#define | MXC_V_RTC_CTRL_READY_READY ((uint32_t)0x1UL) |
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#define | MXC_S_RTC_CTRL_READY_READY (MXC_V_RTC_CTRL_READY_READY << MXC_F_RTC_CTRL_READY_POS) |
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#define | MXC_F_RTC_CTRL_READY_INT_EN_POS 5 |
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#define | MXC_F_RTC_CTRL_READY_INT_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_READY_INT_EN_POS)) |
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#define | MXC_V_RTC_CTRL_READY_INT_EN_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_RTC_CTRL_READY_INT_EN_DIS (MXC_V_RTC_CTRL_READY_INT_EN_DIS << MXC_F_RTC_CTRL_READY_INT_EN_POS) |
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#define | MXC_V_RTC_CTRL_READY_INT_EN_EN ((uint32_t)0x1UL) |
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#define | MXC_S_RTC_CTRL_READY_INT_EN_EN (MXC_V_RTC_CTRL_READY_INT_EN_EN << MXC_F_RTC_CTRL_READY_INT_EN_POS) |
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#define | MXC_F_RTC_CTRL_TOD_ALARM_FL_POS 6 |
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#define | MXC_F_RTC_CTRL_TOD_ALARM_FL ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_TOD_ALARM_FL_POS)) |
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#define | MXC_V_RTC_CTRL_TOD_ALARM_FL_INACTIVE ((uint32_t)0x0UL) |
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#define | MXC_S_RTC_CTRL_TOD_ALARM_FL_INACTIVE (MXC_V_RTC_CTRL_TOD_ALARM_FL_INACTIVE << MXC_F_RTC_CTRL_TOD_ALARM_FL_POS) |
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#define | MXC_V_RTC_CTRL_TOD_ALARM_FL_PENDING ((uint32_t)0x1UL) |
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#define | MXC_S_RTC_CTRL_TOD_ALARM_FL_PENDING (MXC_V_RTC_CTRL_TOD_ALARM_FL_PENDING << MXC_F_RTC_CTRL_TOD_ALARM_FL_POS) |
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#define | MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS 7 |
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#define | MXC_F_RTC_CTRL_SSEC_ALARM_FL ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS)) |
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#define | MXC_V_RTC_CTRL_SSEC_ALARM_FL_INACTIVE ((uint32_t)0x0UL) |
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#define | MXC_S_RTC_CTRL_SSEC_ALARM_FL_INACTIVE (MXC_V_RTC_CTRL_SSEC_ALARM_FL_INACTIVE << MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS) |
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#define | MXC_V_RTC_CTRL_SSEC_ALARM_FL_PENDING ((uint32_t)0x1UL) |
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#define | MXC_S_RTC_CTRL_SSEC_ALARM_FL_PENDING (MXC_V_RTC_CTRL_SSEC_ALARM_FL_PENDING << MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS) |
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#define | MXC_F_RTC_CTRL_SQWOUT_EN_POS 8 |
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#define | MXC_F_RTC_CTRL_SQWOUT_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SQWOUT_EN_POS)) |
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#define | MXC_V_RTC_CTRL_SQWOUT_EN_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_RTC_CTRL_SQWOUT_EN_DIS (MXC_V_RTC_CTRL_SQWOUT_EN_DIS << MXC_F_RTC_CTRL_SQWOUT_EN_POS) |
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#define | MXC_V_RTC_CTRL_SQWOUT_EN_EN ((uint32_t)0x1UL) |
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#define | MXC_S_RTC_CTRL_SQWOUT_EN_EN (MXC_V_RTC_CTRL_SQWOUT_EN_EN << MXC_F_RTC_CTRL_SQWOUT_EN_POS) |
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#define | MXC_F_RTC_CTRL_FREQ_SEL_POS 9 |
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#define | MXC_F_RTC_CTRL_FREQ_SEL ((uint32_t)(0x3UL << MXC_F_RTC_CTRL_FREQ_SEL_POS)) |
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#define | MXC_V_RTC_CTRL_FREQ_SEL_FREQ1HZ ((uint32_t)0x0UL) |
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#define | MXC_S_RTC_CTRL_FREQ_SEL_FREQ1HZ (MXC_V_RTC_CTRL_FREQ_SEL_FREQ1HZ << MXC_F_RTC_CTRL_FREQ_SEL_POS) |
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#define | MXC_V_RTC_CTRL_FREQ_SEL_FREQ512HZ ((uint32_t)0x1UL) |
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#define | MXC_S_RTC_CTRL_FREQ_SEL_FREQ512HZ (MXC_V_RTC_CTRL_FREQ_SEL_FREQ512HZ << MXC_F_RTC_CTRL_FREQ_SEL_POS) |
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#define | MXC_V_RTC_CTRL_FREQ_SEL_FREQ4KHZ ((uint32_t)0x2UL) |
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#define | MXC_S_RTC_CTRL_FREQ_SEL_FREQ4KHZ (MXC_V_RTC_CTRL_FREQ_SEL_FREQ4KHZ << MXC_F_RTC_CTRL_FREQ_SEL_POS) |
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#define | MXC_F_RTC_CTRL_ACRE_POS 14 |
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#define | MXC_F_RTC_CTRL_ACRE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ACRE_POS)) |
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#define | MXC_V_RTC_CTRL_ACRE_SYNC ((uint32_t)0x0UL) |
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#define | MXC_S_RTC_CTRL_ACRE_SYNC (MXC_V_RTC_CTRL_ACRE_SYNC << MXC_F_RTC_CTRL_ACRE_POS) |
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#define | MXC_V_RTC_CTRL_ACRE_ASYNC ((uint32_t)0x1UL) |
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#define | MXC_S_RTC_CTRL_ACRE_ASYNC (MXC_V_RTC_CTRL_ACRE_ASYNC << MXC_F_RTC_CTRL_ACRE_POS) |
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#define | MXC_F_RTC_CTRL_WRITE_EN_POS 15 |
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#define | MXC_F_RTC_CTRL_WRITE_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_WRITE_EN_POS)) |
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#define | MXC_V_RTC_CTRL_WRITE_EN_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_RTC_CTRL_WRITE_EN_DIS (MXC_V_RTC_CTRL_WRITE_EN_DIS << MXC_F_RTC_CTRL_WRITE_EN_POS) |
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#define | MXC_V_RTC_CTRL_WRITE_EN_EN ((uint32_t)0x1UL) |
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#define | MXC_S_RTC_CTRL_WRITE_EN_EN (MXC_V_RTC_CTRL_WRITE_EN_EN << MXC_F_RTC_CTRL_WRITE_EN_POS) |
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#define | MXC_F_RTC_OSCCTRL_FILTER_EN_POS 0 |
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#define | MXC_F_RTC_OSCCTRL_FILTER_EN ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_FILTER_EN_POS)) |
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#define | MXC_F_RTC_OSCCTRL_IBIAS_SEL_POS 1 |
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#define | MXC_F_RTC_OSCCTRL_IBIAS_SEL ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_IBIAS_SEL_POS)) |
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#define | MXC_F_RTC_OSCCTRL_HYST_EN_POS 2 |
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#define | MXC_F_RTC_OSCCTRL_HYST_EN ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_HYST_EN_POS)) |
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#define | MXC_F_RTC_OSCCTRL_IBIAS_EN_POS 3 |
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#define | MXC_F_RTC_OSCCTRL_IBIAS_EN ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_IBIAS_EN_POS)) |
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#define | MXC_F_RTC_OSCCTRL_BYPASS_POS 4 |
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#define | MXC_F_RTC_OSCCTRL_BYPASS ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_BYPASS_POS)) |
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#define | MXC_F_RTC_OSCCTRL_32KOUT_POS 5 |
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#define | MXC_F_RTC_OSCCTRL_32KOUT ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_32KOUT_POS)) |
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