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#define | MXC_R_SPIXFC_CFG ((uint32_t)0x00000000UL) |
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#define | MXC_R_SPIXFC_SS_POL ((uint32_t)0x00000004UL) |
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#define | MXC_R_SPIXFC_GEN_CTRL ((uint32_t)0x00000008UL) |
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#define | MXC_R_SPIXFC_FIFO_CTRL ((uint32_t)0x0000000CUL) |
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#define | MXC_R_SPIXFC_SP_CTRL ((uint32_t)0x00000010UL) |
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#define | MXC_R_SPIXFC_INT_FL ((uint32_t)0x00000014UL) |
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#define | MXC_R_SPIXFC_INT_EN ((uint32_t)0x00000018UL) |
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#define | MXC_F_SPIXFC_CFG_SSEL_POS 0 |
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#define | MXC_F_SPIXFC_CFG_SSEL ((uint32_t)(0x7UL << MXC_F_SPIXFC_CFG_SSEL_POS)) |
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#define | MXC_V_SPIXFC_CFG_SSEL_SLAVE0 ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_CFG_SSEL_SLAVE0 (MXC_V_SPIXFC_CFG_SSEL_SLAVE0 << MXC_F_SPIXFC_CFG_SSEL_POS) |
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#define | MXC_F_SPIXFC_CFG_MODE_POS 4 |
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#define | MXC_F_SPIXFC_CFG_MODE ((uint32_t)(0x3UL << MXC_F_SPIXFC_CFG_MODE_POS)) |
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#define | MXC_V_SPIXFC_CFG_MODE_MODE0 ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_CFG_MODE_MODE0 (MXC_V_SPIXFC_CFG_MODE_MODE0 << MXC_F_SPIXFC_CFG_MODE_POS) |
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#define | MXC_V_SPIXFC_CFG_MODE_MODE3 ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFC_CFG_MODE_MODE3 (MXC_V_SPIXFC_CFG_MODE_MODE3 << MXC_F_SPIXFC_CFG_MODE_POS) |
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#define | MXC_F_SPIXFC_CFG_PGSZ_POS 6 |
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#define | MXC_F_SPIXFC_CFG_PGSZ ((uint32_t)(0x3UL << MXC_F_SPIXFC_CFG_PGSZ_POS)) |
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#define | MXC_V_SPIXFC_CFG_PGSZ_4BYTES ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_CFG_PGSZ_4BYTES (MXC_V_SPIXFC_CFG_PGSZ_4BYTES << MXC_F_SPIXFC_CFG_PGSZ_POS) |
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#define | MXC_V_SPIXFC_CFG_PGSZ_8BYTES ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_CFG_PGSZ_8BYTES (MXC_V_SPIXFC_CFG_PGSZ_8BYTES << MXC_F_SPIXFC_CFG_PGSZ_POS) |
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#define | MXC_V_SPIXFC_CFG_PGSZ_16BYTES ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFC_CFG_PGSZ_16BYTES (MXC_V_SPIXFC_CFG_PGSZ_16BYTES << MXC_F_SPIXFC_CFG_PGSZ_POS) |
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#define | MXC_V_SPIXFC_CFG_PGSZ_32BYTES ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFC_CFG_PGSZ_32BYTES (MXC_V_SPIXFC_CFG_PGSZ_32BYTES << MXC_F_SPIXFC_CFG_PGSZ_POS) |
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#define | MXC_F_SPIXFC_CFG_HICLK_POS 8 |
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#define | MXC_F_SPIXFC_CFG_HICLK ((uint32_t)(0xFUL << MXC_F_SPIXFC_CFG_HICLK_POS)) |
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#define | MXC_V_SPIXFC_CFG_HICLK_16CLK ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_16CLK (MXC_V_SPIXFC_CFG_HICLK_16CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_1CLK ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_1CLK (MXC_V_SPIXFC_CFG_HICLK_1CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_2CLK ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_2CLK (MXC_V_SPIXFC_CFG_HICLK_2CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_3CLK ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_3CLK (MXC_V_SPIXFC_CFG_HICLK_3CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_4CLK ((uint32_t)0x4UL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_4CLK (MXC_V_SPIXFC_CFG_HICLK_4CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_5CLK ((uint32_t)0x5UL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_5CLK (MXC_V_SPIXFC_CFG_HICLK_5CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_6CLK ((uint32_t)0x6UL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_6CLK (MXC_V_SPIXFC_CFG_HICLK_6CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_7CLK ((uint32_t)0x7UL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_7CLK (MXC_V_SPIXFC_CFG_HICLK_7CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_8CLK ((uint32_t)0x8UL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_8CLK (MXC_V_SPIXFC_CFG_HICLK_8CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_9CLK ((uint32_t)0x9UL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_9CLK (MXC_V_SPIXFC_CFG_HICLK_9CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_10CLK ((uint32_t)0xAUL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_10CLK (MXC_V_SPIXFC_CFG_HICLK_10CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_11CLK ((uint32_t)0xBUL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_11CLK (MXC_V_SPIXFC_CFG_HICLK_11CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_12CLK ((uint32_t)0xCUL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_12CLK (MXC_V_SPIXFC_CFG_HICLK_12CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_13CLK ((uint32_t)0xDUL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_13CLK (MXC_V_SPIXFC_CFG_HICLK_13CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_14CLK ((uint32_t)0xEUL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_14CLK (MXC_V_SPIXFC_CFG_HICLK_14CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_V_SPIXFC_CFG_HICLK_15CLK ((uint32_t)0xFUL) |
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#define | MXC_S_SPIXFC_CFG_HICLK_15CLK (MXC_V_SPIXFC_CFG_HICLK_15CLK << MXC_F_SPIXFC_CFG_HICLK_POS) |
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#define | MXC_F_SPIXFC_CFG_LOCLK_POS 12 |
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#define | MXC_F_SPIXFC_CFG_LOCLK ((uint32_t)(0xFUL << MXC_F_SPIXFC_CFG_LOCLK_POS)) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_16CLK ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_16CLK (MXC_V_SPIXFC_CFG_LOCLK_16CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_1CLK ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_1CLK (MXC_V_SPIXFC_CFG_LOCLK_1CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_2CLK ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_2CLK (MXC_V_SPIXFC_CFG_LOCLK_2CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_3CLK ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_3CLK (MXC_V_SPIXFC_CFG_LOCLK_3CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_4CLK ((uint32_t)0x4UL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_4CLK (MXC_V_SPIXFC_CFG_LOCLK_4CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_5CLK ((uint32_t)0x5UL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_5CLK (MXC_V_SPIXFC_CFG_LOCLK_5CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_6CLK ((uint32_t)0x6UL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_6CLK (MXC_V_SPIXFC_CFG_LOCLK_6CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_7CLK ((uint32_t)0x7UL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_7CLK (MXC_V_SPIXFC_CFG_LOCLK_7CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_8CLK ((uint32_t)0x8UL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_8CLK (MXC_V_SPIXFC_CFG_LOCLK_8CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_9CLK ((uint32_t)0x9UL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_9CLK (MXC_V_SPIXFC_CFG_LOCLK_9CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_10CLK ((uint32_t)0xAUL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_10CLK (MXC_V_SPIXFC_CFG_LOCLK_10CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_11CLK ((uint32_t)0xBUL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_11CLK (MXC_V_SPIXFC_CFG_LOCLK_11CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_12CLK ((uint32_t)0xCUL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_12CLK (MXC_V_SPIXFC_CFG_LOCLK_12CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_13CLK ((uint32_t)0xDUL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_13CLK (MXC_V_SPIXFC_CFG_LOCLK_13CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_14CLK ((uint32_t)0xEUL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_14CLK (MXC_V_SPIXFC_CFG_LOCLK_14CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_V_SPIXFC_CFG_LOCLK_15CLK ((uint32_t)0xFUL) |
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#define | MXC_S_SPIXFC_CFG_LOCLK_15CLK (MXC_V_SPIXFC_CFG_LOCLK_15CLK << MXC_F_SPIXFC_CFG_LOCLK_POS) |
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#define | MXC_F_SPIXFC_CFG_SSACT_POS 16 |
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#define | MXC_F_SPIXFC_CFG_SSACT ((uint32_t)(0x3UL << MXC_F_SPIXFC_CFG_SSACT_POS)) |
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#define | MXC_V_SPIXFC_CFG_SSACT_0CLK ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_CFG_SSACT_0CLK (MXC_V_SPIXFC_CFG_SSACT_0CLK << MXC_F_SPIXFC_CFG_SSACT_POS) |
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#define | MXC_V_SPIXFC_CFG_SSACT_2CLK ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_CFG_SSACT_2CLK (MXC_V_SPIXFC_CFG_SSACT_2CLK << MXC_F_SPIXFC_CFG_SSACT_POS) |
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#define | MXC_V_SPIXFC_CFG_SSACT_4CLK ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFC_CFG_SSACT_4CLK (MXC_V_SPIXFC_CFG_SSACT_4CLK << MXC_F_SPIXFC_CFG_SSACT_POS) |
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#define | MXC_V_SPIXFC_CFG_SSACT_8CLK ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFC_CFG_SSACT_8CLK (MXC_V_SPIXFC_CFG_SSACT_8CLK << MXC_F_SPIXFC_CFG_SSACT_POS) |
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#define | MXC_F_SPIXFC_CFG_INACT_POS 18 |
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#define | MXC_F_SPIXFC_CFG_INACT ((uint32_t)(0x3UL << MXC_F_SPIXFC_CFG_INACT_POS)) |
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#define | MXC_V_SPIXFC_CFG_INACT_4CLK ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_CFG_INACT_4CLK (MXC_V_SPIXFC_CFG_INACT_4CLK << MXC_F_SPIXFC_CFG_INACT_POS) |
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#define | MXC_V_SPIXFC_CFG_INACT_6CLK ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_CFG_INACT_6CLK (MXC_V_SPIXFC_CFG_INACT_6CLK << MXC_F_SPIXFC_CFG_INACT_POS) |
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#define | MXC_V_SPIXFC_CFG_INACT_8CLK ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFC_CFG_INACT_8CLK (MXC_V_SPIXFC_CFG_INACT_8CLK << MXC_F_SPIXFC_CFG_INACT_POS) |
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#define | MXC_V_SPIXFC_CFG_INACT_12CLK ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFC_CFG_INACT_12CLK (MXC_V_SPIXFC_CFG_INACT_12CLK << MXC_F_SPIXFC_CFG_INACT_POS) |
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#define | MXC_F_SPIXFC_CFG_IOSMPL_POS 20 |
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#define | MXC_F_SPIXFC_CFG_IOSMPL ((uint32_t)(0xFUL << MXC_F_SPIXFC_CFG_IOSMPL_POS)) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_NODLY ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_NODLY (MXC_V_SPIXFC_CFG_IOSMPL_NODLY << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_1CLK ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_1CLK (MXC_V_SPIXFC_CFG_IOSMPL_1CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_2CLK ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_2CLK (MXC_V_SPIXFC_CFG_IOSMPL_2CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_3CLK ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_3CLK (MXC_V_SPIXFC_CFG_IOSMPL_3CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_4CLK ((uint32_t)0x4UL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_4CLK (MXC_V_SPIXFC_CFG_IOSMPL_4CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_5CLK ((uint32_t)0x5UL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_5CLK (MXC_V_SPIXFC_CFG_IOSMPL_5CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_6CLK ((uint32_t)0x6UL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_6CLK (MXC_V_SPIXFC_CFG_IOSMPL_6CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_7CLK ((uint32_t)0x7UL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_7CLK (MXC_V_SPIXFC_CFG_IOSMPL_7CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_8CLK ((uint32_t)0x8UL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_8CLK (MXC_V_SPIXFC_CFG_IOSMPL_8CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_9CLK ((uint32_t)0x9UL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_9CLK (MXC_V_SPIXFC_CFG_IOSMPL_9CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_10CLK ((uint32_t)0xAUL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_10CLK (MXC_V_SPIXFC_CFG_IOSMPL_10CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_11CLK ((uint32_t)0xBUL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_11CLK (MXC_V_SPIXFC_CFG_IOSMPL_11CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_12CLK ((uint32_t)0xCUL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_12CLK (MXC_V_SPIXFC_CFG_IOSMPL_12CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_13CLK ((uint32_t)0xDUL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_13CLK (MXC_V_SPIXFC_CFG_IOSMPL_13CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_14CLK ((uint32_t)0xEUL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_14CLK (MXC_V_SPIXFC_CFG_IOSMPL_14CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_V_SPIXFC_CFG_IOSMPL_15CLK ((uint32_t)0xFUL) |
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#define | MXC_S_SPIXFC_CFG_IOSMPL_15CLK (MXC_V_SPIXFC_CFG_IOSMPL_15CLK << MXC_F_SPIXFC_CFG_IOSMPL_POS) |
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#define | MXC_F_SPIXFC_SS_POL_SSPOL_0_POS 0 |
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#define | MXC_F_SPIXFC_SS_POL_SSPOL_0 ((uint32_t)(0x1UL << MXC_F_SPIXFC_SS_POL_SSPOL_0_POS)) |
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#define | MXC_V_SPIXFC_SS_POL_SSPOL_0_ACTIVELO ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_SS_POL_SSPOL_0_ACTIVELO (MXC_V_SPIXFC_SS_POL_SSPOL_0_ACTIVELO << MXC_F_SPIXFC_SS_POL_SSPOL_0_POS) |
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#define | MXC_V_SPIXFC_SS_POL_SSPOL_0_ACTIVEHI ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_SS_POL_SSPOL_0_ACTIVEHI (MXC_V_SPIXFC_SS_POL_SSPOL_0_ACTIVEHI << MXC_F_SPIXFC_SS_POL_SSPOL_0_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_ENABLE_POS 0 |
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#define | MXC_F_SPIXFC_GEN_CTRL_ENABLE ((uint32_t)(0x1UL << MXC_F_SPIXFC_GEN_CTRL_ENABLE_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_ENABLE_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_ENABLE_DIS (MXC_V_SPIXFC_GEN_CTRL_ENABLE_DIS << MXC_F_SPIXFC_GEN_CTRL_ENABLE_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_ENABLE_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_ENABLE_EN (MXC_V_SPIXFC_GEN_CTRL_ENABLE_EN << MXC_F_SPIXFC_GEN_CTRL_ENABLE_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_TFIFOEN_POS 1 |
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#define | MXC_F_SPIXFC_GEN_CTRL_TFIFOEN ((uint32_t)(0x1UL << MXC_F_SPIXFC_GEN_CTRL_TFIFOEN_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_TFIFOEN_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_TFIFOEN_DIS (MXC_V_SPIXFC_GEN_CTRL_TFIFOEN_DIS << MXC_F_SPIXFC_GEN_CTRL_TFIFOEN_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_TFIFOEN_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_TFIFOEN_EN (MXC_V_SPIXFC_GEN_CTRL_TFIFOEN_EN << MXC_F_SPIXFC_GEN_CTRL_TFIFOEN_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_RFIFOEN_POS 2 |
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#define | MXC_F_SPIXFC_GEN_CTRL_RFIFOEN ((uint32_t)(0x1UL << MXC_F_SPIXFC_GEN_CTRL_RFIFOEN_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_RFIFOEN_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_RFIFOEN_DIS (MXC_V_SPIXFC_GEN_CTRL_RFIFOEN_DIS << MXC_F_SPIXFC_GEN_CTRL_RFIFOEN_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_RFIFOEN_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_RFIFOEN_EN (MXC_V_SPIXFC_GEN_CTRL_RFIFOEN_EN << MXC_F_SPIXFC_GEN_CTRL_RFIFOEN_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_BBMODE_POS 3 |
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#define | MXC_F_SPIXFC_GEN_CTRL_BBMODE ((uint32_t)(0x1UL << MXC_F_SPIXFC_GEN_CTRL_BBMODE_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_BBMODE_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_BBMODE_DIS (MXC_V_SPIXFC_GEN_CTRL_BBMODE_DIS << MXC_F_SPIXFC_GEN_CTRL_BBMODE_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_BBMODE_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_BBMODE_EN (MXC_V_SPIXFC_GEN_CTRL_BBMODE_EN << MXC_F_SPIXFC_GEN_CTRL_BBMODE_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_SSDR_POS 4 |
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#define | MXC_F_SPIXFC_GEN_CTRL_SSDR ((uint32_t)(0x1UL << MXC_F_SPIXFC_GEN_CTRL_SSDR_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SSDR_OUTPUT0 ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SSDR_OUTPUT0 (MXC_V_SPIXFC_GEN_CTRL_SSDR_OUTPUT0 << MXC_F_SPIXFC_GEN_CTRL_SSDR_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SSDR_OUTPUT1 ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SSDR_OUTPUT1 (MXC_V_SPIXFC_GEN_CTRL_SSDR_OUTPUT1 << MXC_F_SPIXFC_GEN_CTRL_SSDR_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_SCKDR_POS 6 |
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#define | MXC_F_SPIXFC_GEN_CTRL_SCKDR ((uint32_t)(0x1UL << MXC_F_SPIXFC_GEN_CTRL_SCKDR_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SCKDR_SCK0 ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SCKDR_SCK0 (MXC_V_SPIXFC_GEN_CTRL_SCKDR_SCK0 << MXC_F_SPIXFC_GEN_CTRL_SCKDR_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SCKDR_SCK1 ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SCKDR_SCK1 (MXC_V_SPIXFC_GEN_CTRL_SCKDR_SCK1 << MXC_F_SPIXFC_GEN_CTRL_SCKDR_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_SDATAIN_POS 8 |
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#define | MXC_F_SPIXFC_GEN_CTRL_SDATAIN ((uint32_t)(0xFUL << MXC_F_SPIXFC_GEN_CTRL_SDATAIN_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SDATAIN_SDIO0 ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SDATAIN_SDIO0 (MXC_V_SPIXFC_GEN_CTRL_SDATAIN_SDIO0 << MXC_F_SPIXFC_GEN_CTRL_SDATAIN_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SDATAIN_SDIO1 ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SDATAIN_SDIO1 (MXC_V_SPIXFC_GEN_CTRL_SDATAIN_SDIO1 << MXC_F_SPIXFC_GEN_CTRL_SDATAIN_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SDATAIN_SDIO2 ((uint32_t)0x4UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SDATAIN_SDIO2 (MXC_V_SPIXFC_GEN_CTRL_SDATAIN_SDIO2 << MXC_F_SPIXFC_GEN_CTRL_SDATAIN_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SDATAIN_SDIO3 ((uint32_t)0x8UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SDATAIN_SDIO3 (MXC_V_SPIXFC_GEN_CTRL_SDATAIN_SDIO3 << MXC_F_SPIXFC_GEN_CTRL_SDATAIN_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_BBDAT_POS 12 |
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#define | MXC_F_SPIXFC_GEN_CTRL_BBDAT ((uint32_t)(0xFUL << MXC_F_SPIXFC_GEN_CTRL_BBDAT_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_BBDAT_SDIO0 ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_BBDAT_SDIO0 (MXC_V_SPIXFC_GEN_CTRL_BBDAT_SDIO0 << MXC_F_SPIXFC_GEN_CTRL_BBDAT_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_BBDAT_SDIO1 ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_BBDAT_SDIO1 (MXC_V_SPIXFC_GEN_CTRL_BBDAT_SDIO1 << MXC_F_SPIXFC_GEN_CTRL_BBDAT_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_BBDAT_SDIO2 ((uint32_t)0x4UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_BBDAT_SDIO2 (MXC_V_SPIXFC_GEN_CTRL_BBDAT_SDIO2 << MXC_F_SPIXFC_GEN_CTRL_BBDAT_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_BBDAT_SDIO3 ((uint32_t)0x8UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_BBDAT_SDIO3 (MXC_V_SPIXFC_GEN_CTRL_BBDAT_SDIO3 << MXC_F_SPIXFC_GEN_CTRL_BBDAT_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_BBDATOEN_POS 16 |
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#define | MXC_F_SPIXFC_GEN_CTRL_BBDATOEN ((uint32_t)(0xFUL << MXC_F_SPIXFC_GEN_CTRL_BBDATOEN_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_BBDATOEN_SDIO0 ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_BBDATOEN_SDIO0 (MXC_V_SPIXFC_GEN_CTRL_BBDATOEN_SDIO0 << MXC_F_SPIXFC_GEN_CTRL_BBDATOEN_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_BBDATOEN_SDIO1 ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_BBDATOEN_SDIO1 (MXC_V_SPIXFC_GEN_CTRL_BBDATOEN_SDIO1 << MXC_F_SPIXFC_GEN_CTRL_BBDATOEN_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_BBDATOEN_SDIO2 ((uint32_t)0x4UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_BBDATOEN_SDIO2 (MXC_V_SPIXFC_GEN_CTRL_BBDATOEN_SDIO2 << MXC_F_SPIXFC_GEN_CTRL_BBDATOEN_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_BBDATOEN_SDIO3 ((uint32_t)0x8UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_BBDATOEN_SDIO3 (MXC_V_SPIXFC_GEN_CTRL_BBDATOEN_SDIO3 << MXC_F_SPIXFC_GEN_CTRL_BBDATOEN_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_SIMPLE_POS 20 |
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#define | MXC_F_SPIXFC_GEN_CTRL_SIMPLE ((uint32_t)(0x1UL << MXC_F_SPIXFC_GEN_CTRL_SIMPLE_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SIMPLE_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SIMPLE_DIS (MXC_V_SPIXFC_GEN_CTRL_SIMPLE_DIS << MXC_F_SPIXFC_GEN_CTRL_SIMPLE_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SIMPLE_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SIMPLE_EN (MXC_V_SPIXFC_GEN_CTRL_SIMPLE_EN << MXC_F_SPIXFC_GEN_CTRL_SIMPLE_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_SIMPLERX_POS 21 |
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#define | MXC_F_SPIXFC_GEN_CTRL_SIMPLERX ((uint32_t)(0x1UL << MXC_F_SPIXFC_GEN_CTRL_SIMPLERX_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SIMPLERX_INITSPI ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SIMPLERX_INITSPI (MXC_V_SPIXFC_GEN_CTRL_SIMPLERX_INITSPI << MXC_F_SPIXFC_GEN_CTRL_SIMPLERX_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_SMPLSS_POS 22 |
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#define | MXC_F_SPIXFC_GEN_CTRL_SMPLSS ((uint32_t)(0x1UL << MXC_F_SPIXFC_GEN_CTRL_SMPLSS_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SMPLSS_DEASSERTSS ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SMPLSS_DEASSERTSS (MXC_V_SPIXFC_GEN_CTRL_SMPLSS_DEASSERTSS << MXC_F_SPIXFC_GEN_CTRL_SMPLSS_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_SCKFB_POS 24 |
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#define | MXC_F_SPIXFC_GEN_CTRL_SCKFB ((uint32_t)(0x1UL << MXC_F_SPIXFC_GEN_CTRL_SCKFB_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SCKFB_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SCKFB_DIS (MXC_V_SPIXFC_GEN_CTRL_SCKFB_DIS << MXC_F_SPIXFC_GEN_CTRL_SCKFB_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SCKFB_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SCKFB_EN (MXC_V_SPIXFC_GEN_CTRL_SCKFB_EN << MXC_F_SPIXFC_GEN_CTRL_SCKFB_POS) |
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#define | MXC_F_SPIXFC_GEN_CTRL_SCKFBINV_POS 25 |
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#define | MXC_F_SPIXFC_GEN_CTRL_SCKFBINV ((uint32_t)(0x1UL << MXC_F_SPIXFC_GEN_CTRL_SCKFBINV_POS)) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SCKFBINV_NORMAL ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SCKFBINV_NORMAL (MXC_V_SPIXFC_GEN_CTRL_SCKFBINV_NORMAL << MXC_F_SPIXFC_GEN_CTRL_SCKFBINV_POS) |
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#define | MXC_V_SPIXFC_GEN_CTRL_SCKFBINV_INVERT ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_GEN_CTRL_SCKFBINV_INVERT (MXC_V_SPIXFC_GEN_CTRL_SCKFBINV_INVERT << MXC_F_SPIXFC_GEN_CTRL_SCKFBINV_POS) |
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#define | MXC_F_SPIXFC_FIFO_CTRL_TFIFOLVL_POS 0 |
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#define | MXC_F_SPIXFC_FIFO_CTRL_TFIFOLVL ((uint32_t)(0xFUL << MXC_F_SPIXFC_FIFO_CTRL_TFIFOLVL_POS)) |
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#define | MXC_F_SPIXFC_FIFO_CTRL_TFIFOCNT_POS 8 |
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#define | MXC_F_SPIXFC_FIFO_CTRL_TFIFOCNT ((uint32_t)(0x1FUL << MXC_F_SPIXFC_FIFO_CTRL_TFIFOCNT_POS)) |
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#define | MXC_F_SPIXFC_FIFO_CTRL_RFIFOLVL_POS 16 |
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#define | MXC_F_SPIXFC_FIFO_CTRL_RFIFOLVL ((uint32_t)(0x1FUL << MXC_F_SPIXFC_FIFO_CTRL_RFIFOLVL_POS)) |
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#define | MXC_F_SPIXFC_FIFO_CTRL_RFIFOCNT_POS 24 |
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#define | MXC_F_SPIXFC_FIFO_CTRL_RFIFOCNT ((uint32_t)(0x3FUL << MXC_F_SPIXFC_FIFO_CTRL_RFIFOCNT_POS)) |
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#define | MXC_F_SPIXFC_SP_CTRL_SAMPL_POS 0 |
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#define | MXC_F_SPIXFC_SP_CTRL_SAMPL ((uint32_t)(0x1UL << MXC_F_SPIXFC_SP_CTRL_SAMPL_POS)) |
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#define | MXC_V_SPIXFC_SP_CTRL_SAMPL_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_SP_CTRL_SAMPL_DIS (MXC_V_SPIXFC_SP_CTRL_SAMPL_DIS << MXC_F_SPIXFC_SP_CTRL_SAMPL_POS) |
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#define | MXC_V_SPIXFC_SP_CTRL_SAMPL_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_SP_CTRL_SAMPL_EN (MXC_V_SPIXFC_SP_CTRL_SAMPL_EN << MXC_F_SPIXFC_SP_CTRL_SAMPL_POS) |
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#define | MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_POS 4 |
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#define | MXC_F_SPIXFC_SP_CTRL_SDIO_OUT ((uint32_t)(0xFUL << MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_POS)) |
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#define | MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_SDIO0 ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_SP_CTRL_SDIO_OUT_SDIO0 (MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_SDIO0 << MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_POS) |
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#define | MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_SDIO1 ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFC_SP_CTRL_SDIO_OUT_SDIO1 (MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_SDIO1 << MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_POS) |
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#define | MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_SDIO2 ((uint32_t)0x4UL) |
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#define | MXC_S_SPIXFC_SP_CTRL_SDIO_OUT_SDIO2 (MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_SDIO2 << MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_POS) |
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#define | MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_SDIO3 ((uint32_t)0x8UL) |
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#define | MXC_S_SPIXFC_SP_CTRL_SDIO_OUT_SDIO3 (MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_SDIO3 << MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_POS) |
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#define | MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN_POS 8 |
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#define | MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN ((uint32_t)(0xFUL << MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN_POS)) |
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#define | MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_EN_SDIO0 ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_SP_CTRL_SDIO_OUT_EN_SDIO0 (MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_EN_SDIO0 << MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN_POS) |
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#define | MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_EN_SDIO1 ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFC_SP_CTRL_SDIO_OUT_EN_SDIO1 (MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_EN_SDIO1 << MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN_POS) |
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#define | MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_EN_SDIO2 ((uint32_t)0x4UL) |
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#define | MXC_S_SPIXFC_SP_CTRL_SDIO_OUT_EN_SDIO2 (MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_EN_SDIO2 << MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN_POS) |
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#define | MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_EN_SDIO3 ((uint32_t)0x8UL) |
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#define | MXC_S_SPIXFC_SP_CTRL_SDIO_OUT_EN_SDIO3 (MXC_V_SPIXFC_SP_CTRL_SDIO_OUT_EN_SDIO3 << MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN_POS) |
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#define | MXC_F_SPIXFC_SP_CTRL_SCKINH3_POS 16 |
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#define | MXC_F_SPIXFC_SP_CTRL_SCKINH3 ((uint32_t)(0x1UL << MXC_F_SPIXFC_SP_CTRL_SCKINH3_POS)) |
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#define | MXC_V_SPIXFC_SP_CTRL_SCKINH3_EN ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_SP_CTRL_SCKINH3_EN (MXC_V_SPIXFC_SP_CTRL_SCKINH3_EN << MXC_F_SPIXFC_SP_CTRL_SCKINH3_POS) |
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#define | MXC_V_SPIXFC_SP_CTRL_SCKINH3_DIS ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_SP_CTRL_SCKINH3_DIS (MXC_V_SPIXFC_SP_CTRL_SCKINH3_DIS << MXC_F_SPIXFC_SP_CTRL_SCKINH3_POS) |
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#define | MXC_F_SPIXFC_INT_FL_TSTALL_POS 0 |
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#define | MXC_F_SPIXFC_INT_FL_TSTALL ((uint32_t)(0x1UL << MXC_F_SPIXFC_INT_FL_TSTALL_POS)) |
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#define | MXC_V_SPIXFC_INT_FL_TSTALL_CLEAR ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_INT_FL_TSTALL_CLEAR (MXC_V_SPIXFC_INT_FL_TSTALL_CLEAR << MXC_F_SPIXFC_INT_FL_TSTALL_POS) |
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#define | MXC_F_SPIXFC_INT_FL_RSTALL_POS 1 |
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#define | MXC_F_SPIXFC_INT_FL_RSTALL ((uint32_t)(0x1UL << MXC_F_SPIXFC_INT_FL_RSTALL_POS)) |
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#define | MXC_V_SPIXFC_INT_FL_RSTALL_CLEAR ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_INT_FL_RSTALL_CLEAR (MXC_V_SPIXFC_INT_FL_RSTALL_CLEAR << MXC_F_SPIXFC_INT_FL_RSTALL_POS) |
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#define | MXC_F_SPIXFC_INT_FL_TRDY_POS 2 |
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#define | MXC_F_SPIXFC_INT_FL_TRDY ((uint32_t)(0x1UL << MXC_F_SPIXFC_INT_FL_TRDY_POS)) |
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#define | MXC_V_SPIXFC_INT_FL_TRDY_CLEAR ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_INT_FL_TRDY_CLEAR (MXC_V_SPIXFC_INT_FL_TRDY_CLEAR << MXC_F_SPIXFC_INT_FL_TRDY_POS) |
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#define | MXC_F_SPIXFC_INT_FL_RDONE_POS 3 |
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#define | MXC_F_SPIXFC_INT_FL_RDONE ((uint32_t)(0x1UL << MXC_F_SPIXFC_INT_FL_RDONE_POS)) |
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#define | MXC_V_SPIXFC_INT_FL_RDONE_CLEAR ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_INT_FL_RDONE_CLEAR (MXC_V_SPIXFC_INT_FL_RDONE_CLEAR << MXC_F_SPIXFC_INT_FL_RDONE_POS) |
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#define | MXC_F_SPIXFC_INT_FL_TFIFOAE_POS 4 |
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#define | MXC_F_SPIXFC_INT_FL_TFIFOAE ((uint32_t)(0x1UL << MXC_F_SPIXFC_INT_FL_TFIFOAE_POS)) |
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#define | MXC_V_SPIXFC_INT_FL_TFIFOAE_CLEAR ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_INT_FL_TFIFOAE_CLEAR (MXC_V_SPIXFC_INT_FL_TFIFOAE_CLEAR << MXC_F_SPIXFC_INT_FL_TFIFOAE_POS) |
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#define | MXC_F_SPIXFC_INT_FL_RFIFOAF_POS 5 |
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#define | MXC_F_SPIXFC_INT_FL_RFIFOAF ((uint32_t)(0x1UL << MXC_F_SPIXFC_INT_FL_RFIFOAF_POS)) |
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#define | MXC_V_SPIXFC_INT_FL_RFIFOAF_CLEAR ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_INT_FL_RFIFOAF_CLEAR (MXC_V_SPIXFC_INT_FL_RFIFOAF_CLEAR << MXC_F_SPIXFC_INT_FL_RFIFOAF_POS) |
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#define | MXC_F_SPIXFC_INT_EN_TSTALLIE_POS 0 |
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#define | MXC_F_SPIXFC_INT_EN_TSTALLIE ((uint32_t)(0x1UL << MXC_F_SPIXFC_INT_EN_TSTALLIE_POS)) |
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#define | MXC_V_SPIXFC_INT_EN_TSTALLIE_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_INT_EN_TSTALLIE_DIS (MXC_V_SPIXFC_INT_EN_TSTALLIE_DIS << MXC_F_SPIXFC_INT_EN_TSTALLIE_POS) |
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#define | MXC_V_SPIXFC_INT_EN_TSTALLIE_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_INT_EN_TSTALLIE_EN (MXC_V_SPIXFC_INT_EN_TSTALLIE_EN << MXC_F_SPIXFC_INT_EN_TSTALLIE_POS) |
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#define | MXC_F_SPIXFC_INT_EN_RSTALLIE_POS 1 |
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#define | MXC_F_SPIXFC_INT_EN_RSTALLIE ((uint32_t)(0x1UL << MXC_F_SPIXFC_INT_EN_RSTALLIE_POS)) |
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#define | MXC_V_SPIXFC_INT_EN_RSTALLIE_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_INT_EN_RSTALLIE_DIS (MXC_V_SPIXFC_INT_EN_RSTALLIE_DIS << MXC_F_SPIXFC_INT_EN_RSTALLIE_POS) |
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#define | MXC_V_SPIXFC_INT_EN_RSTALLIE_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_INT_EN_RSTALLIE_EN (MXC_V_SPIXFC_INT_EN_RSTALLIE_EN << MXC_F_SPIXFC_INT_EN_RSTALLIE_POS) |
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#define | MXC_F_SPIXFC_INT_EN_TRDYIE_POS 2 |
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#define | MXC_F_SPIXFC_INT_EN_TRDYIE ((uint32_t)(0x1UL << MXC_F_SPIXFC_INT_EN_TRDYIE_POS)) |
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#define | MXC_V_SPIXFC_INT_EN_TRDYIE_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_INT_EN_TRDYIE_DIS (MXC_V_SPIXFC_INT_EN_TRDYIE_DIS << MXC_F_SPIXFC_INT_EN_TRDYIE_POS) |
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#define | MXC_V_SPIXFC_INT_EN_TRDYIE_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_INT_EN_TRDYIE_EN (MXC_V_SPIXFC_INT_EN_TRDYIE_EN << MXC_F_SPIXFC_INT_EN_TRDYIE_POS) |
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#define | MXC_F_SPIXFC_INT_EN_RDONEIE_POS 3 |
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#define | MXC_F_SPIXFC_INT_EN_RDONEIE ((uint32_t)(0x1UL << MXC_F_SPIXFC_INT_EN_RDONEIE_POS)) |
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#define | MXC_V_SPIXFC_INT_EN_RDONEIE_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_INT_EN_RDONEIE_DIS (MXC_V_SPIXFC_INT_EN_RDONEIE_DIS << MXC_F_SPIXFC_INT_EN_RDONEIE_POS) |
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#define | MXC_V_SPIXFC_INT_EN_RDONEIE_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_INT_EN_RDONEIE_EN (MXC_V_SPIXFC_INT_EN_RDONEIE_EN << MXC_F_SPIXFC_INT_EN_RDONEIE_POS) |
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#define | MXC_F_SPIXFC_INT_EN_TFIFOAEIE_POS 4 |
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#define | MXC_F_SPIXFC_INT_EN_TFIFOAEIE ((uint32_t)(0x1UL << MXC_F_SPIXFC_INT_EN_TFIFOAEIE_POS)) |
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#define | MXC_V_SPIXFC_INT_EN_TFIFOAEIE_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_INT_EN_TFIFOAEIE_DIS (MXC_V_SPIXFC_INT_EN_TFIFOAEIE_DIS << MXC_F_SPIXFC_INT_EN_TFIFOAEIE_POS) |
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#define | MXC_V_SPIXFC_INT_EN_TFIFOAEIE_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_INT_EN_TFIFOAEIE_EN (MXC_V_SPIXFC_INT_EN_TFIFOAEIE_EN << MXC_F_SPIXFC_INT_EN_TFIFOAEIE_POS) |
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#define | MXC_F_SPIXFC_INT_EN_RFIFOAFIE_POS 5 |
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#define | MXC_F_SPIXFC_INT_EN_RFIFOAFIE ((uint32_t)(0x1UL << MXC_F_SPIXFC_INT_EN_RFIFOAFIE_POS)) |
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#define | MXC_V_SPIXFC_INT_EN_RFIFOAFIE_DIS ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFC_INT_EN_RFIFOAFIE_DIS (MXC_V_SPIXFC_INT_EN_RFIFOAFIE_DIS << MXC_F_SPIXFC_INT_EN_RFIFOAFIE_POS) |
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#define | MXC_V_SPIXFC_INT_EN_RFIFOAFIE_EN ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFC_INT_EN_RFIFOAFIE_EN (MXC_V_SPIXFC_INT_EN_RFIFOAFIE_EN << MXC_F_SPIXFC_INT_EN_RFIFOAFIE_POS) |
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