Documentation/MAX32650/tpu__regs_8h_source.html

/******************************************************************************

 *

 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by

 * Analog Devices, Inc.),

 * Copyright (C) 2023-2024 Analog Devices, Inc.

 *

 * Licensed under the Apache License, Version 2.0 (the "License");

 * you may not use this file except in compliance with the License.

 * You may obtain a copy of the License at

 *

 *     http://www.apache.org/licenses/LICENSE-2.0

 *

 * Unless required by applicable law or agreed to in writing, software

 * distributed under the License is distributed on an "AS IS" BASIS,

 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

 * See the License for the specific language governing permissions and

 * limitations under the License.

 *

 ******************************************************************************/


#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_TPU_REGS_H_

#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_TPU_REGS_H_


/* **** Includes **** */

#include <stdint.h>


#ifdef __cplusplus

extern "C" {

#endif


#if defined (__ICCARM__)

  #pragma system_include

#endif


#if defined (__CC_ARM)

  #pragma anon_unions

#endif

/*

    If types are not defined elsewhere (CMSIS) define them here

*/

#ifndef __IO

#define __IO volatile

#endif

#ifndef __I

#define __I  volatile const

#endif

#ifndef __O

#define __O  volatile

#endif

#ifndef __R

#define __R  volatile const

#endif


/* **** Definitions **** */


typedef struct {

    __IO uint32_t crypto_ctrl;

    __IO uint32_t cipher_ctrl;

    __IO uint32_t hash_ctrl;

    __IO uint32_t crc_ctrl;

    __IO uint32_t dma_src;

    __IO uint32_t dma_dest;

    __IO uint32_t dma_cnt;

    __IO uint32_t maa_ctrl;

    __O  uint32_t crypto_din[4];

    __I  uint32_t crypto_dout[4];

    __IO uint32_t crc_poly;

    __IO uint32_t crc_val;

    __I  uint32_t crc_prng;

    __IO uint32_t ham_ecc;

    __IO uint32_t cipher_init[4];

    __O  uint32_t cipher_key[8];

    __IO uint32_t hash_digest[16];

    __IO uint32_t hash_msg_sz[4];

    __IO uint32_t maa_maws;

} mxc_tpu_regs_t;


/* Register offsets for module TPU */

#define MXC_R_TPU_CRYPTO_CTRL              ((uint32_t)0x00000000UL)

#define MXC_R_TPU_CIPHER_CTRL              ((uint32_t)0x00000004UL)

#define MXC_R_TPU_HASH_CTRL                ((uint32_t)0x00000008UL)

#define MXC_R_TPU_CRC_CTRL                 ((uint32_t)0x0000000CUL)

#define MXC_R_TPU_DMA_SRC                  ((uint32_t)0x00000010UL)

#define MXC_R_TPU_DMA_DEST                 ((uint32_t)0x00000014UL)

#define MXC_R_TPU_DMA_CNT                  ((uint32_t)0x00000018UL)

#define MXC_R_TPU_MAA_CTRL                 ((uint32_t)0x0000001CUL)

#define MXC_R_TPU_CRYPTO_DIN               ((uint32_t)0x00000020UL)

#define MXC_R_TPU_CRYPTO_DOUT              ((uint32_t)0x00000030UL)

#define MXC_R_TPU_CRC_POLY                 ((uint32_t)0x00000040UL)

#define MXC_R_TPU_CRC_VAL                  ((uint32_t)0x00000044UL)

#define MXC_R_TPU_CRC_PRNG                 ((uint32_t)0x00000048UL)

#define MXC_R_TPU_HAM_ECC                  ((uint32_t)0x0000004CUL)

#define MXC_R_TPU_CIPHER_INIT              ((uint32_t)0x00000050UL)

#define MXC_R_TPU_CIPHER_KEY               ((uint32_t)0x00000060UL)

#define MXC_R_TPU_HASH_DIGEST              ((uint32_t)0x00000080UL)

#define MXC_R_TPU_HASH_MSG_SZ              ((uint32_t)0x000000C0UL)

#define MXC_R_TPU_MAA_MAWS                 ((uint32_t)0x000000D0UL)

#define MXC_F_TPU_CRYPTO_CTRL_RST_POS                  0

#define MXC_F_TPU_CRYPTO_CTRL_RST                      ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_RST_POS))

#define MXC_V_TPU_CRYPTO_CTRL_RST_RESET                ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_RST_RESET                (MXC_V_TPU_CRYPTO_CTRL_RST_RESET << MXC_F_TPU_CRYPTO_CTRL_RST_POS)

#define MXC_V_TPU_CRYPTO_CTRL_RST_RESET_DONE           ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_RST_RESET_DONE           (MXC_V_TPU_CRYPTO_CTRL_RST_RESET_DONE << MXC_F_TPU_CRYPTO_CTRL_RST_POS)

#define MXC_V_TPU_CRYPTO_CTRL_RST_BUSY                 ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_RST_BUSY                 (MXC_V_TPU_CRYPTO_CTRL_RST_BUSY << MXC_F_TPU_CRYPTO_CTRL_RST_POS)

#define MXC_F_TPU_CRYPTO_CTRL_INT_POS                  1

#define MXC_F_TPU_CRYPTO_CTRL_INT                      ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_INT_POS))

#define MXC_V_TPU_CRYPTO_CTRL_INT_DIS                  ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_INT_DIS                  (MXC_V_TPU_CRYPTO_CTRL_INT_DIS << MXC_F_TPU_CRYPTO_CTRL_INT_POS)

#define MXC_V_TPU_CRYPTO_CTRL_INT_EN                   ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_INT_EN                   (MXC_V_TPU_CRYPTO_CTRL_INT_EN << MXC_F_TPU_CRYPTO_CTRL_INT_POS)

#define MXC_F_TPU_CRYPTO_CTRL_SRC_POS                  2

#define MXC_F_TPU_CRYPTO_CTRL_SRC                      ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_SRC_POS))

#define MXC_V_TPU_CRYPTO_CTRL_SRC_INPUTFIFO            ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_SRC_INPUTFIFO            (MXC_V_TPU_CRYPTO_CTRL_SRC_INPUTFIFO << MXC_F_TPU_CRYPTO_CTRL_SRC_POS)

#define MXC_V_TPU_CRYPTO_CTRL_SRC_OUTPUTFIFO           ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_SRC_OUTPUTFIFO           (MXC_V_TPU_CRYPTO_CTRL_SRC_OUTPUTFIFO << MXC_F_TPU_CRYPTO_CTRL_SRC_POS)

#define MXC_F_TPU_CRYPTO_CTRL_BSO_POS                  4

#define MXC_F_TPU_CRYPTO_CTRL_BSO                      ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_BSO_POS))

#define MXC_V_TPU_CRYPTO_CTRL_BSO_DIS                  ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_BSO_DIS                  (MXC_V_TPU_CRYPTO_CTRL_BSO_DIS << MXC_F_TPU_CRYPTO_CTRL_BSO_POS)

#define MXC_V_TPU_CRYPTO_CTRL_BSO_EN                   ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_BSO_EN                   (MXC_V_TPU_CRYPTO_CTRL_BSO_EN << MXC_F_TPU_CRYPTO_CTRL_BSO_POS)

#define MXC_F_TPU_CRYPTO_CTRL_BSI_POS                  5

#define MXC_F_TPU_CRYPTO_CTRL_BSI                      ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_BSI_POS))

#define MXC_V_TPU_CRYPTO_CTRL_BSI_DIS                  ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_BSI_DIS                  (MXC_V_TPU_CRYPTO_CTRL_BSI_DIS << MXC_F_TPU_CRYPTO_CTRL_BSI_POS)

#define MXC_V_TPU_CRYPTO_CTRL_BSI_EN                   ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_BSI_EN                   (MXC_V_TPU_CRYPTO_CTRL_BSI_EN << MXC_F_TPU_CRYPTO_CTRL_BSI_POS)

#define MXC_F_TPU_CRYPTO_CTRL_WAIT_EN_POS              6

#define MXC_F_TPU_CRYPTO_CTRL_WAIT_EN                  ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_WAIT_EN_POS))

#define MXC_V_TPU_CRYPTO_CTRL_WAIT_EN_DIS              ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_WAIT_EN_DIS              (MXC_V_TPU_CRYPTO_CTRL_WAIT_EN_DIS << MXC_F_TPU_CRYPTO_CTRL_WAIT_EN_POS)

#define MXC_V_TPU_CRYPTO_CTRL_WAIT_EN_EN               ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_WAIT_EN_EN               (MXC_V_TPU_CRYPTO_CTRL_WAIT_EN_EN << MXC_F_TPU_CRYPTO_CTRL_WAIT_EN_POS)

#define MXC_F_TPU_CRYPTO_CTRL_WAIT_POL_POS             7

#define MXC_F_TPU_CRYPTO_CTRL_WAIT_POL                 ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_WAIT_POL_POS))

#define MXC_V_TPU_CRYPTO_CTRL_WAIT_POL_ACTIVELO        ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_WAIT_POL_ACTIVELO        (MXC_V_TPU_CRYPTO_CTRL_WAIT_POL_ACTIVELO << MXC_F_TPU_CRYPTO_CTRL_WAIT_POL_POS)

#define MXC_V_TPU_CRYPTO_CTRL_WAIT_POL_ACTIVEHI        ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_WAIT_POL_ACTIVEHI        (MXC_V_TPU_CRYPTO_CTRL_WAIT_POL_ACTIVEHI << MXC_F_TPU_CRYPTO_CTRL_WAIT_POL_POS)

#define MXC_F_TPU_CRYPTO_CTRL_WRSRC_POS                8

#define MXC_F_TPU_CRYPTO_CTRL_WRSRC                    ((uint32_t)(0x3UL << MXC_F_TPU_CRYPTO_CTRL_WRSRC_POS))

#define MXC_V_TPU_CRYPTO_CTRL_WRSRC_NONE               ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_WRSRC_NONE               (MXC_V_TPU_CRYPTO_CTRL_WRSRC_NONE << MXC_F_TPU_CRYPTO_CTRL_WRSRC_POS)

#define MXC_V_TPU_CRYPTO_CTRL_WRSRC_CIPHEROUTPUT       ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_WRSRC_CIPHEROUTPUT       (MXC_V_TPU_CRYPTO_CTRL_WRSRC_CIPHEROUTPUT << MXC_F_TPU_CRYPTO_CTRL_WRSRC_POS)

#define MXC_V_TPU_CRYPTO_CTRL_WRSRC_READFIFO           ((uint32_t)0x2UL)

#define MXC_S_TPU_CRYPTO_CTRL_WRSRC_READFIFO           (MXC_V_TPU_CRYPTO_CTRL_WRSRC_READFIFO << MXC_F_TPU_CRYPTO_CTRL_WRSRC_POS)

#define MXC_F_TPU_CRYPTO_CTRL_RDSRC_POS                10

#define MXC_F_TPU_CRYPTO_CTRL_RDSRC                    ((uint32_t)(0x3UL << MXC_F_TPU_CRYPTO_CTRL_RDSRC_POS))

#define MXC_V_TPU_CRYPTO_CTRL_RDSRC_DMADISABLED        ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_RDSRC_DMADISABLED        (MXC_V_TPU_CRYPTO_CTRL_RDSRC_DMADISABLED << MXC_F_TPU_CRYPTO_CTRL_RDSRC_POS)

#define MXC_V_TPU_CRYPTO_CTRL_RDSRC_DMAORAPB           ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_RDSRC_DMAORAPB           (MXC_V_TPU_CRYPTO_CTRL_RDSRC_DMAORAPB << MXC_F_TPU_CRYPTO_CTRL_RDSRC_POS)

#define MXC_V_TPU_CRYPTO_CTRL_RDSRC_RNG                ((uint32_t)0x2UL)

#define MXC_S_TPU_CRYPTO_CTRL_RDSRC_RNG                (MXC_V_TPU_CRYPTO_CTRL_RDSRC_RNG << MXC_F_TPU_CRYPTO_CTRL_RDSRC_POS)

#define MXC_F_TPU_CRYPTO_CTRL_FLAG_MODE_POS            14

#define MXC_F_TPU_CRYPTO_CTRL_FLAG_MODE                ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_FLAG_MODE_POS))

#define MXC_V_TPU_CRYPTO_CTRL_FLAG_MODE_UNRES_WR       ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_FLAG_MODE_UNRES_WR       (MXC_V_TPU_CRYPTO_CTRL_FLAG_MODE_UNRES_WR << MXC_F_TPU_CRYPTO_CTRL_FLAG_MODE_POS)

#define MXC_V_TPU_CRYPTO_CTRL_FLAG_MODE_RES_WR         ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_FLAG_MODE_RES_WR         (MXC_V_TPU_CRYPTO_CTRL_FLAG_MODE_RES_WR << MXC_F_TPU_CRYPTO_CTRL_FLAG_MODE_POS)

#define MXC_F_TPU_CRYPTO_CTRL_DMADNEMSK_POS            15

#define MXC_F_TPU_CRYPTO_CTRL_DMADNEMSK                ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_DMADNEMSK_POS))

#define MXC_V_TPU_CRYPTO_CTRL_DMADNEMSK_NOT_USED       ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_DMADNEMSK_NOT_USED       (MXC_V_TPU_CRYPTO_CTRL_DMADNEMSK_NOT_USED << MXC_F_TPU_CRYPTO_CTRL_DMADNEMSK_POS)

#define MXC_V_TPU_CRYPTO_CTRL_DMADNEMSK_USED           ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_DMADNEMSK_USED           (MXC_V_TPU_CRYPTO_CTRL_DMADNEMSK_USED << MXC_F_TPU_CRYPTO_CTRL_DMADNEMSK_POS)

#define MXC_F_TPU_CRYPTO_CTRL_DMA_DONE_POS             24

#define MXC_F_TPU_CRYPTO_CTRL_DMA_DONE                 ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_DMA_DONE_POS))

#define MXC_V_TPU_CRYPTO_CTRL_DMA_DONE_NOTDONE         ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_DMA_DONE_NOTDONE         (MXC_V_TPU_CRYPTO_CTRL_DMA_DONE_NOTDONE << MXC_F_TPU_CRYPTO_CTRL_DMA_DONE_POS)

#define MXC_V_TPU_CRYPTO_CTRL_DMA_DONE_DONE            ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_DMA_DONE_DONE            (MXC_V_TPU_CRYPTO_CTRL_DMA_DONE_DONE << MXC_F_TPU_CRYPTO_CTRL_DMA_DONE_POS)

#define MXC_F_TPU_CRYPTO_CTRL_GLS_DONE_POS             25

#define MXC_F_TPU_CRYPTO_CTRL_GLS_DONE                 ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_GLS_DONE_POS))

#define MXC_V_TPU_CRYPTO_CTRL_GLS_DONE_NOTDONE         ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_GLS_DONE_NOTDONE         (MXC_V_TPU_CRYPTO_CTRL_GLS_DONE_NOTDONE << MXC_F_TPU_CRYPTO_CTRL_GLS_DONE_POS)

#define MXC_V_TPU_CRYPTO_CTRL_GLS_DONE_DONE            ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_GLS_DONE_DONE            (MXC_V_TPU_CRYPTO_CTRL_GLS_DONE_DONE << MXC_F_TPU_CRYPTO_CTRL_GLS_DONE_POS)

#define MXC_F_TPU_CRYPTO_CTRL_HSH_DONE_POS             26

#define MXC_F_TPU_CRYPTO_CTRL_HSH_DONE                 ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_HSH_DONE_POS))

#define MXC_V_TPU_CRYPTO_CTRL_HSH_DONE_NOTDONE         ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_HSH_DONE_NOTDONE         (MXC_V_TPU_CRYPTO_CTRL_HSH_DONE_NOTDONE << MXC_F_TPU_CRYPTO_CTRL_HSH_DONE_POS)

#define MXC_V_TPU_CRYPTO_CTRL_HSH_DONE_DONE            ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_HSH_DONE_DONE            (MXC_V_TPU_CRYPTO_CTRL_HSH_DONE_DONE << MXC_F_TPU_CRYPTO_CTRL_HSH_DONE_POS)

#define MXC_F_TPU_CRYPTO_CTRL_CPH_DONE_POS             27

#define MXC_F_TPU_CRYPTO_CTRL_CPH_DONE                 ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_CPH_DONE_POS))

#define MXC_V_TPU_CRYPTO_CTRL_CPH_DONE_NOTDONE         ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_CPH_DONE_NOTDONE         (MXC_V_TPU_CRYPTO_CTRL_CPH_DONE_NOTDONE << MXC_F_TPU_CRYPTO_CTRL_CPH_DONE_POS)

#define MXC_V_TPU_CRYPTO_CTRL_CPH_DONE_DONE            ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_CPH_DONE_DONE            (MXC_V_TPU_CRYPTO_CTRL_CPH_DONE_DONE << MXC_F_TPU_CRYPTO_CTRL_CPH_DONE_POS)

#define MXC_F_TPU_CRYPTO_CTRL_MAA_DONE_POS             28

#define MXC_F_TPU_CRYPTO_CTRL_MAA_DONE                 ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_MAA_DONE_POS))

#define MXC_V_TPU_CRYPTO_CTRL_MAA_DONE_NOTDONE         ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_MAA_DONE_NOTDONE         (MXC_V_TPU_CRYPTO_CTRL_MAA_DONE_NOTDONE << MXC_F_TPU_CRYPTO_CTRL_MAA_DONE_POS)

#define MXC_V_TPU_CRYPTO_CTRL_MAA_DONE_DONE            ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_MAA_DONE_DONE            (MXC_V_TPU_CRYPTO_CTRL_MAA_DONE_DONE << MXC_F_TPU_CRYPTO_CTRL_MAA_DONE_POS)

#define MXC_F_TPU_CRYPTO_CTRL_ERR_POS                  29

#define MXC_F_TPU_CRYPTO_CTRL_ERR                      ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_ERR_POS))

#define MXC_V_TPU_CRYPTO_CTRL_ERR_NOERROR              ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_ERR_NOERROR              (MXC_V_TPU_CRYPTO_CTRL_ERR_NOERROR << MXC_F_TPU_CRYPTO_CTRL_ERR_POS)

#define MXC_V_TPU_CRYPTO_CTRL_ERR_ERROR                ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_ERR_ERROR                (MXC_V_TPU_CRYPTO_CTRL_ERR_ERROR << MXC_F_TPU_CRYPTO_CTRL_ERR_POS)

#define MXC_F_TPU_CRYPTO_CTRL_RDY_POS                  30

#define MXC_F_TPU_CRYPTO_CTRL_RDY                      ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_RDY_POS))

#define MXC_V_TPU_CRYPTO_CTRL_RDY_BUSY                 ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_RDY_BUSY                 (MXC_V_TPU_CRYPTO_CTRL_RDY_BUSY << MXC_F_TPU_CRYPTO_CTRL_RDY_POS)

#define MXC_V_TPU_CRYPTO_CTRL_RDY_READY                ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_RDY_READY                (MXC_V_TPU_CRYPTO_CTRL_RDY_READY << MXC_F_TPU_CRYPTO_CTRL_RDY_POS)

#define MXC_F_TPU_CRYPTO_CTRL_DONE_POS                 31

#define MXC_F_TPU_CRYPTO_CTRL_DONE                     ((uint32_t)(0x1UL << MXC_F_TPU_CRYPTO_CTRL_DONE_POS))

#define MXC_V_TPU_CRYPTO_CTRL_DONE_NOTDONE             ((uint32_t)0x0UL)

#define MXC_S_TPU_CRYPTO_CTRL_DONE_NOTDONE             (MXC_V_TPU_CRYPTO_CTRL_DONE_NOTDONE << MXC_F_TPU_CRYPTO_CTRL_DONE_POS)

#define MXC_V_TPU_CRYPTO_CTRL_DONE_DONE                ((uint32_t)0x1UL)

#define MXC_S_TPU_CRYPTO_CTRL_DONE_DONE                (MXC_V_TPU_CRYPTO_CTRL_DONE_DONE << MXC_F_TPU_CRYPTO_CTRL_DONE_POS)

#define MXC_F_TPU_CIPHER_CTRL_ENC_POS                  0

#define MXC_F_TPU_CIPHER_CTRL_ENC                      ((uint32_t)(0x1UL << MXC_F_TPU_CIPHER_CTRL_ENC_POS))

#define MXC_V_TPU_CIPHER_CTRL_ENC_ENCRYPT              ((uint32_t)0x0UL)

#define MXC_S_TPU_CIPHER_CTRL_ENC_ENCRYPT              (MXC_V_TPU_CIPHER_CTRL_ENC_ENCRYPT << MXC_F_TPU_CIPHER_CTRL_ENC_POS)

#define MXC_V_TPU_CIPHER_CTRL_ENC_DECRYPT              ((uint32_t)0x1UL)

#define MXC_S_TPU_CIPHER_CTRL_ENC_DECRYPT              (MXC_V_TPU_CIPHER_CTRL_ENC_DECRYPT << MXC_F_TPU_CIPHER_CTRL_ENC_POS)

#define MXC_F_TPU_CIPHER_CTRL_KEY_POS                  1

#define MXC_F_TPU_CIPHER_CTRL_KEY                      ((uint32_t)(0x1UL << MXC_F_TPU_CIPHER_CTRL_KEY_POS))

#define MXC_V_TPU_CIPHER_CTRL_KEY_COMPLETE             ((uint32_t)0x0UL)

#define MXC_S_TPU_CIPHER_CTRL_KEY_COMPLETE             (MXC_V_TPU_CIPHER_CTRL_KEY_COMPLETE << MXC_F_TPU_CIPHER_CTRL_KEY_POS)

#define MXC_V_TPU_CIPHER_CTRL_KEY_START                ((uint32_t)0x1UL)

#define MXC_S_TPU_CIPHER_CTRL_KEY_START                (MXC_V_TPU_CIPHER_CTRL_KEY_START << MXC_F_TPU_CIPHER_CTRL_KEY_POS)

#define MXC_F_TPU_CIPHER_CTRL_SRC_POS                  2

#define MXC_F_TPU_CIPHER_CTRL_SRC                      ((uint32_t)(0x3UL << MXC_F_TPU_CIPHER_CTRL_SRC_POS))

#define MXC_V_TPU_CIPHER_CTRL_SRC_CIPHERKEY            ((uint32_t)0x0UL)

#define MXC_S_TPU_CIPHER_CTRL_SRC_CIPHERKEY            (MXC_V_TPU_CIPHER_CTRL_SRC_CIPHERKEY << MXC_F_TPU_CIPHER_CTRL_SRC_POS)

#define MXC_V_TPU_CIPHER_CTRL_SRC_REGFILE              ((uint32_t)0x2UL)

#define MXC_S_TPU_CIPHER_CTRL_SRC_REGFILE              (MXC_V_TPU_CIPHER_CTRL_SRC_REGFILE << MXC_F_TPU_CIPHER_CTRL_SRC_POS)

#define MXC_V_TPU_CIPHER_CTRL_SRC_QSPIKEY_REGFILE      ((uint32_t)0x3UL)

#define MXC_S_TPU_CIPHER_CTRL_SRC_QSPIKEY_REGFILE      (MXC_V_TPU_CIPHER_CTRL_SRC_QSPIKEY_REGFILE << MXC_F_TPU_CIPHER_CTRL_SRC_POS)

#define MXC_F_TPU_CIPHER_CTRL_CIPHER_POS               4

#define MXC_F_TPU_CIPHER_CTRL_CIPHER                   ((uint32_t)(0x7UL << MXC_F_TPU_CIPHER_CTRL_CIPHER_POS))

#define MXC_V_TPU_CIPHER_CTRL_CIPHER_DIS               ((uint32_t)0x0UL)

#define MXC_S_TPU_CIPHER_CTRL_CIPHER_DIS               (MXC_V_TPU_CIPHER_CTRL_CIPHER_DIS << MXC_F_TPU_CIPHER_CTRL_CIPHER_POS)

#define MXC_V_TPU_CIPHER_CTRL_CIPHER_AES128            ((uint32_t)0x1UL)

#define MXC_S_TPU_CIPHER_CTRL_CIPHER_AES128            (MXC_V_TPU_CIPHER_CTRL_CIPHER_AES128 << MXC_F_TPU_CIPHER_CTRL_CIPHER_POS)

#define MXC_V_TPU_CIPHER_CTRL_CIPHER_AES192            ((uint32_t)0x2UL)

#define MXC_S_TPU_CIPHER_CTRL_CIPHER_AES192            (MXC_V_TPU_CIPHER_CTRL_CIPHER_AES192 << MXC_F_TPU_CIPHER_CTRL_CIPHER_POS)

#define MXC_V_TPU_CIPHER_CTRL_CIPHER_AES256            ((uint32_t)0x3UL)

#define MXC_S_TPU_CIPHER_CTRL_CIPHER_AES256            (MXC_V_TPU_CIPHER_CTRL_CIPHER_AES256 << MXC_F_TPU_CIPHER_CTRL_CIPHER_POS)

#define MXC_V_TPU_CIPHER_CTRL_CIPHER_DES               ((uint32_t)0x4UL)

#define MXC_S_TPU_CIPHER_CTRL_CIPHER_DES               (MXC_V_TPU_CIPHER_CTRL_CIPHER_DES << MXC_F_TPU_CIPHER_CTRL_CIPHER_POS)

#define MXC_V_TPU_CIPHER_CTRL_CIPHER_TDEA              ((uint32_t)0x5UL)

#define MXC_S_TPU_CIPHER_CTRL_CIPHER_TDEA              (MXC_V_TPU_CIPHER_CTRL_CIPHER_TDEA << MXC_F_TPU_CIPHER_CTRL_CIPHER_POS)

#define MXC_F_TPU_CIPHER_CTRL_MODE_POS                 8

#define MXC_F_TPU_CIPHER_CTRL_MODE                     ((uint32_t)(0x7UL << MXC_F_TPU_CIPHER_CTRL_MODE_POS))

#define MXC_V_TPU_CIPHER_CTRL_MODE_ECB                 ((uint32_t)0x0UL)

#define MXC_S_TPU_CIPHER_CTRL_MODE_ECB                 (MXC_V_TPU_CIPHER_CTRL_MODE_ECB << MXC_F_TPU_CIPHER_CTRL_MODE_POS)

#define MXC_V_TPU_CIPHER_CTRL_MODE_CBC                 ((uint32_t)0x1UL)

#define MXC_S_TPU_CIPHER_CTRL_MODE_CBC                 (MXC_V_TPU_CIPHER_CTRL_MODE_CBC << MXC_F_TPU_CIPHER_CTRL_MODE_POS)

#define MXC_V_TPU_CIPHER_CTRL_MODE_CFB                 ((uint32_t)0x2UL)

#define MXC_S_TPU_CIPHER_CTRL_MODE_CFB                 (MXC_V_TPU_CIPHER_CTRL_MODE_CFB << MXC_F_TPU_CIPHER_CTRL_MODE_POS)

#define MXC_V_TPU_CIPHER_CTRL_MODE_OFB                 ((uint32_t)0x3UL)

#define MXC_S_TPU_CIPHER_CTRL_MODE_OFB                 (MXC_V_TPU_CIPHER_CTRL_MODE_OFB << MXC_F_TPU_CIPHER_CTRL_MODE_POS)

#define MXC_V_TPU_CIPHER_CTRL_MODE_CTR                 ((uint32_t)0x4UL)

#define MXC_S_TPU_CIPHER_CTRL_MODE_CTR                 (MXC_V_TPU_CIPHER_CTRL_MODE_CTR << MXC_F_TPU_CIPHER_CTRL_MODE_POS)

#define MXC_F_TPU_HASH_CTRL_INIT_POS                   0

#define MXC_F_TPU_HASH_CTRL_INIT                       ((uint32_t)(0x1UL << MXC_F_TPU_HASH_CTRL_INIT_POS))

#define MXC_V_TPU_HASH_CTRL_INIT_NOP                   ((uint32_t)0x0UL)

#define MXC_S_TPU_HASH_CTRL_INIT_NOP                   (MXC_V_TPU_HASH_CTRL_INIT_NOP << MXC_F_TPU_HASH_CTRL_INIT_POS)

#define MXC_V_TPU_HASH_CTRL_INIT_START                 ((uint32_t)0x1UL)

#define MXC_S_TPU_HASH_CTRL_INIT_START                 (MXC_V_TPU_HASH_CTRL_INIT_START << MXC_F_TPU_HASH_CTRL_INIT_POS)

#define MXC_F_TPU_HASH_CTRL_XOR_POS                    1

#define MXC_F_TPU_HASH_CTRL_XOR                        ((uint32_t)(0x1UL << MXC_F_TPU_HASH_CTRL_XOR_POS))

#define MXC_V_TPU_HASH_CTRL_XOR_DIS                    ((uint32_t)0x0UL)

#define MXC_S_TPU_HASH_CTRL_XOR_DIS                    (MXC_V_TPU_HASH_CTRL_XOR_DIS << MXC_F_TPU_HASH_CTRL_XOR_POS)

#define MXC_V_TPU_HASH_CTRL_XOR_EN                     ((uint32_t)0x1UL)

#define MXC_S_TPU_HASH_CTRL_XOR_EN                     (MXC_V_TPU_HASH_CTRL_XOR_EN << MXC_F_TPU_HASH_CTRL_XOR_POS)

#define MXC_F_TPU_HASH_CTRL_HASH_POS                   2

#define MXC_F_TPU_HASH_CTRL_HASH                       ((uint32_t)(0x7UL << MXC_F_TPU_HASH_CTRL_HASH_POS))

#define MXC_V_TPU_HASH_CTRL_HASH_DIS                   ((uint32_t)0x0UL)

#define MXC_S_TPU_HASH_CTRL_HASH_DIS                   (MXC_V_TPU_HASH_CTRL_HASH_DIS << MXC_F_TPU_HASH_CTRL_HASH_POS)

#define MXC_V_TPU_HASH_CTRL_HASH_SHA1                  ((uint32_t)0x1UL)

#define MXC_S_TPU_HASH_CTRL_HASH_SHA1                  (MXC_V_TPU_HASH_CTRL_HASH_SHA1 << MXC_F_TPU_HASH_CTRL_HASH_POS)

#define MXC_V_TPU_HASH_CTRL_HASH_SHA224                ((uint32_t)0x2UL)

#define MXC_S_TPU_HASH_CTRL_HASH_SHA224                (MXC_V_TPU_HASH_CTRL_HASH_SHA224 << MXC_F_TPU_HASH_CTRL_HASH_POS)

#define MXC_V_TPU_HASH_CTRL_HASH_SHA256                ((uint32_t)0x3UL)

#define MXC_S_TPU_HASH_CTRL_HASH_SHA256                (MXC_V_TPU_HASH_CTRL_HASH_SHA256 << MXC_F_TPU_HASH_CTRL_HASH_POS)

#define MXC_V_TPU_HASH_CTRL_HASH_SHA384                ((uint32_t)0x4UL)

#define MXC_S_TPU_HASH_CTRL_HASH_SHA384                (MXC_V_TPU_HASH_CTRL_HASH_SHA384 << MXC_F_TPU_HASH_CTRL_HASH_POS)

#define MXC_V_TPU_HASH_CTRL_HASH_SHA512                ((uint32_t)0x5UL)

#define MXC_S_TPU_HASH_CTRL_HASH_SHA512                (MXC_V_TPU_HASH_CTRL_HASH_SHA512 << MXC_F_TPU_HASH_CTRL_HASH_POS)

#define MXC_F_TPU_HASH_CTRL_LAST_POS                   5

#define MXC_F_TPU_HASH_CTRL_LAST                       ((uint32_t)(0x1UL << MXC_F_TPU_HASH_CTRL_LAST_POS))

#define MXC_V_TPU_HASH_CTRL_LAST_NOEFFECT              ((uint32_t)0x0UL)

#define MXC_S_TPU_HASH_CTRL_LAST_NOEFFECT              (MXC_V_TPU_HASH_CTRL_LAST_NOEFFECT << MXC_F_TPU_HASH_CTRL_LAST_POS)

#define MXC_V_TPU_HASH_CTRL_LAST_LASTMSGDATA           ((uint32_t)0x1UL)

#define MXC_S_TPU_HASH_CTRL_LAST_LASTMSGDATA           (MXC_V_TPU_HASH_CTRL_LAST_LASTMSGDATA << MXC_F_TPU_HASH_CTRL_LAST_POS)

#define MXC_F_TPU_CRC_CTRL_CRC_EN_POS                  0

#define MXC_F_TPU_CRC_CTRL_CRC_EN                      ((uint32_t)(0x1UL << MXC_F_TPU_CRC_CTRL_CRC_EN_POS))

#define MXC_V_TPU_CRC_CTRL_CRC_EN_DIS                  ((uint32_t)0x0UL)

#define MXC_S_TPU_CRC_CTRL_CRC_EN_DIS                  (MXC_V_TPU_CRC_CTRL_CRC_EN_DIS << MXC_F_TPU_CRC_CTRL_CRC_EN_POS)

#define MXC_V_TPU_CRC_CTRL_CRC_EN_EN                   ((uint32_t)0x1UL)

#define MXC_S_TPU_CRC_CTRL_CRC_EN_EN                   (MXC_V_TPU_CRC_CTRL_CRC_EN_EN << MXC_F_TPU_CRC_CTRL_CRC_EN_POS)

#define MXC_F_TPU_CRC_CTRL_MSB_POS                     1

#define MXC_F_TPU_CRC_CTRL_MSB                         ((uint32_t)(0x1UL << MXC_F_TPU_CRC_CTRL_MSB_POS))

#define MXC_V_TPU_CRC_CTRL_MSB_LSBFIRST                ((uint32_t)0x0UL)

#define MXC_S_TPU_CRC_CTRL_MSB_LSBFIRST                (MXC_V_TPU_CRC_CTRL_MSB_LSBFIRST << MXC_F_TPU_CRC_CTRL_MSB_POS)

#define MXC_V_TPU_CRC_CTRL_MSB_MSBFIRST                ((uint32_t)0x1UL)

#define MXC_S_TPU_CRC_CTRL_MSB_MSBFIRST                (MXC_V_TPU_CRC_CTRL_MSB_MSBFIRST << MXC_F_TPU_CRC_CTRL_MSB_POS)

#define MXC_F_TPU_CRC_CTRL_PRNG_POS                    2

#define MXC_F_TPU_CRC_CTRL_PRNG                        ((uint32_t)(0x1UL << MXC_F_TPU_CRC_CTRL_PRNG_POS))

#define MXC_V_TPU_CRC_CTRL_PRNG_DIS                    ((uint32_t)0x0UL)

#define MXC_S_TPU_CRC_CTRL_PRNG_DIS                    (MXC_V_TPU_CRC_CTRL_PRNG_DIS << MXC_F_TPU_CRC_CTRL_PRNG_POS)

#define MXC_V_TPU_CRC_CTRL_PRNG_EN                     ((uint32_t)0x1UL)

#define MXC_S_TPU_CRC_CTRL_PRNG_EN                     (MXC_V_TPU_CRC_CTRL_PRNG_EN << MXC_F_TPU_CRC_CTRL_PRNG_POS)

#define MXC_F_TPU_CRC_CTRL_ENT_POS                     3

#define MXC_F_TPU_CRC_CTRL_ENT                         ((uint32_t)(0x1UL << MXC_F_TPU_CRC_CTRL_ENT_POS))

#define MXC_V_TPU_CRC_CTRL_ENT_DIS                     ((uint32_t)0x0UL)

#define MXC_S_TPU_CRC_CTRL_ENT_DIS                     (MXC_V_TPU_CRC_CTRL_ENT_DIS << MXC_F_TPU_CRC_CTRL_ENT_POS)

#define MXC_V_TPU_CRC_CTRL_ENT_EN                      ((uint32_t)0x1UL)

#define MXC_S_TPU_CRC_CTRL_ENT_EN                      (MXC_V_TPU_CRC_CTRL_ENT_EN << MXC_F_TPU_CRC_CTRL_ENT_POS)

#define MXC_F_TPU_CRC_CTRL_HAM_POS                     4

#define MXC_F_TPU_CRC_CTRL_HAM                         ((uint32_t)(0x1UL << MXC_F_TPU_CRC_CTRL_HAM_POS))

#define MXC_V_TPU_CRC_CTRL_HAM_DIS                     ((uint32_t)0x0UL)

#define MXC_S_TPU_CRC_CTRL_HAM_DIS                     (MXC_V_TPU_CRC_CTRL_HAM_DIS << MXC_F_TPU_CRC_CTRL_HAM_POS)

#define MXC_V_TPU_CRC_CTRL_HAM_EN                      ((uint32_t)0x1UL)

#define MXC_S_TPU_CRC_CTRL_HAM_EN                      (MXC_V_TPU_CRC_CTRL_HAM_EN << MXC_F_TPU_CRC_CTRL_HAM_POS)

#define MXC_F_TPU_CRC_CTRL_HRST_POS                    5

#define MXC_F_TPU_CRC_CTRL_HRST                        ((uint32_t)(0x1UL << MXC_F_TPU_CRC_CTRL_HRST_POS))

#define MXC_V_TPU_CRC_CTRL_HRST_RESET                  ((uint32_t)0x1UL)

#define MXC_S_TPU_CRC_CTRL_HRST_RESET                  (MXC_V_TPU_CRC_CTRL_HRST_RESET << MXC_F_TPU_CRC_CTRL_HRST_POS)

#define MXC_F_TPU_DMA_SRC_ADDR_POS                     0

#define MXC_F_TPU_DMA_SRC_ADDR                         ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_DMA_SRC_ADDR_POS))

#define MXC_F_TPU_DMA_DEST_ADDR_POS                    0

#define MXC_F_TPU_DMA_DEST_ADDR                        ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_DMA_DEST_ADDR_POS))

#define MXC_F_TPU_DMA_CNT_COUNT_POS                    0

#define MXC_F_TPU_DMA_CNT_COUNT                        ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_DMA_CNT_COUNT_POS))

#define MXC_F_TPU_MAA_CTRL_STC_POS                     0

#define MXC_F_TPU_MAA_CTRL_STC                         ((uint32_t)(0x1UL << MXC_F_TPU_MAA_CTRL_STC_POS))

#define MXC_V_TPU_MAA_CTRL_STC_NOP                     ((uint32_t)0x0UL)

#define MXC_S_TPU_MAA_CTRL_STC_NOP                     (MXC_V_TPU_MAA_CTRL_STC_NOP << MXC_F_TPU_MAA_CTRL_STC_POS)

#define MXC_V_TPU_MAA_CTRL_STC_START                   ((uint32_t)0x1UL)

#define MXC_S_TPU_MAA_CTRL_STC_START                   (MXC_V_TPU_MAA_CTRL_STC_START << MXC_F_TPU_MAA_CTRL_STC_POS)

#define MXC_F_TPU_MAA_CTRL_CLC_POS                     1

#define MXC_F_TPU_MAA_CTRL_CLC                         ((uint32_t)(0x7UL << MXC_F_TPU_MAA_CTRL_CLC_POS))

#define MXC_V_TPU_MAA_CTRL_CLC_EXP                     ((uint32_t)0x0UL)

#define MXC_S_TPU_MAA_CTRL_CLC_EXP                     (MXC_V_TPU_MAA_CTRL_CLC_EXP << MXC_F_TPU_MAA_CTRL_CLC_POS)

#define MXC_V_TPU_MAA_CTRL_CLC_SQ                      ((uint32_t)0x1UL)

#define MXC_S_TPU_MAA_CTRL_CLC_SQ                      (MXC_V_TPU_MAA_CTRL_CLC_SQ << MXC_F_TPU_MAA_CTRL_CLC_POS)

#define MXC_V_TPU_MAA_CTRL_CLC_MULT                    ((uint32_t)0x2UL)

#define MXC_S_TPU_MAA_CTRL_CLC_MULT                    (MXC_V_TPU_MAA_CTRL_CLC_MULT << MXC_F_TPU_MAA_CTRL_CLC_POS)

#define MXC_V_TPU_MAA_CTRL_CLC_SQ_MULT                 ((uint32_t)0x3UL)

#define MXC_S_TPU_MAA_CTRL_CLC_SQ_MULT                 (MXC_V_TPU_MAA_CTRL_CLC_SQ_MULT << MXC_F_TPU_MAA_CTRL_CLC_POS)

#define MXC_V_TPU_MAA_CTRL_CLC_ADD                     ((uint32_t)0x4UL)

#define MXC_S_TPU_MAA_CTRL_CLC_ADD                     (MXC_V_TPU_MAA_CTRL_CLC_ADD << MXC_F_TPU_MAA_CTRL_CLC_POS)

#define MXC_V_TPU_MAA_CTRL_CLC_SUB                     ((uint32_t)0x5UL)

#define MXC_S_TPU_MAA_CTRL_CLC_SUB                     (MXC_V_TPU_MAA_CTRL_CLC_SUB << MXC_F_TPU_MAA_CTRL_CLC_POS)

#define MXC_F_TPU_MAA_CTRL_OCALC_POS                   4

#define MXC_F_TPU_MAA_CTRL_OCALC                       ((uint32_t)(0x1UL << MXC_F_TPU_MAA_CTRL_OCALC_POS))

#define MXC_V_TPU_MAA_CTRL_OCALC_NONE                  ((uint32_t)0x0UL)

#define MXC_S_TPU_MAA_CTRL_OCALC_NONE                  (MXC_V_TPU_MAA_CTRL_OCALC_NONE << MXC_F_TPU_MAA_CTRL_OCALC_POS)

#define MXC_V_TPU_MAA_CTRL_OCALC_OPTIMIZE              ((uint32_t)0x1UL)

#define MXC_S_TPU_MAA_CTRL_OCALC_OPTIMIZE              (MXC_V_TPU_MAA_CTRL_OCALC_OPTIMIZE << MXC_F_TPU_MAA_CTRL_OCALC_POS)

#define MXC_F_TPU_MAA_CTRL_MAAER_POS                   7

#define MXC_F_TPU_MAA_CTRL_MAAER                       ((uint32_t)(0x1UL << MXC_F_TPU_MAA_CTRL_MAAER_POS))

#define MXC_V_TPU_MAA_CTRL_MAAER_NOERROR               ((uint32_t)0x0UL)

#define MXC_S_TPU_MAA_CTRL_MAAER_NOERROR               (MXC_V_TPU_MAA_CTRL_MAAER_NOERROR << MXC_F_TPU_MAA_CTRL_MAAER_POS)

#define MXC_V_TPU_MAA_CTRL_MAAER_ERROR                 ((uint32_t)0x1UL)

#define MXC_S_TPU_MAA_CTRL_MAAER_ERROR                 (MXC_V_TPU_MAA_CTRL_MAAER_ERROR << MXC_F_TPU_MAA_CTRL_MAAER_POS)

#define MXC_F_TPU_MAA_CTRL_AMS_POS                     8

#define MXC_F_TPU_MAA_CTRL_AMS                         ((uint32_t)(0x3UL << MXC_F_TPU_MAA_CTRL_AMS_POS))

#define MXC_F_TPU_MAA_CTRL_BMS_POS                     10

#define MXC_F_TPU_MAA_CTRL_BMS                         ((uint32_t)(0x3UL << MXC_F_TPU_MAA_CTRL_BMS_POS))

#define MXC_F_TPU_MAA_CTRL_EMS_POS                     12

#define MXC_F_TPU_MAA_CTRL_EMS                         ((uint32_t)(0x3UL << MXC_F_TPU_MAA_CTRL_EMS_POS))

#define MXC_F_TPU_MAA_CTRL_MMS_POS                     14

#define MXC_F_TPU_MAA_CTRL_MMS                         ((uint32_t)(0x3UL << MXC_F_TPU_MAA_CTRL_MMS_POS))

#define MXC_F_TPU_MAA_CTRL_AMA_POS                     16

#define MXC_F_TPU_MAA_CTRL_AMA                         ((uint32_t)(0xFUL << MXC_F_TPU_MAA_CTRL_AMA_POS))

#define MXC_F_TPU_MAA_CTRL_BMA_POS                     20

#define MXC_F_TPU_MAA_CTRL_BMA                         ((uint32_t)(0xFUL << MXC_F_TPU_MAA_CTRL_BMA_POS))

#define MXC_F_TPU_MAA_CTRL_RMA_POS                     24

#define MXC_F_TPU_MAA_CTRL_RMA                         ((uint32_t)(0xFUL << MXC_F_TPU_MAA_CTRL_RMA_POS))

#define MXC_F_TPU_MAA_CTRL_TMA_POS                     28

#define MXC_F_TPU_MAA_CTRL_TMA                         ((uint32_t)(0xFUL << MXC_F_TPU_MAA_CTRL_TMA_POS))

#define MXC_F_TPU_CRYPTO_DIN_DATA_POS                  0

#define MXC_F_TPU_CRYPTO_DIN_DATA                      ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_CRYPTO_DIN_DATA_POS))

#define MXC_F_TPU_CRYPTO_DOUT_DATA_POS                 0

#define MXC_F_TPU_CRYPTO_DOUT_DATA                     ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_CRYPTO_DOUT_DATA_POS))

#define MXC_F_TPU_CRC_POLY_POLY_POS                    0

#define MXC_F_TPU_CRC_POLY_POLY                        ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_CRC_POLY_POLY_POS))

#define MXC_F_TPU_CRC_VAL_VAL_POS                      0

#define MXC_F_TPU_CRC_VAL_VAL                          ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_CRC_VAL_VAL_POS))

#define MXC_F_TPU_CRC_PRNG_PRNG_POS                    0

#define MXC_F_TPU_CRC_PRNG_PRNG                        ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_CRC_PRNG_PRNG_POS))

#define MXC_F_TPU_HAM_ECC_ECC_POS                      0

#define MXC_F_TPU_HAM_ECC_ECC                          ((uint32_t)(0xFFFFUL << MXC_F_TPU_HAM_ECC_ECC_POS))

#define MXC_F_TPU_HAM_ECC_PAR_POS                      16

#define MXC_F_TPU_HAM_ECC_PAR                          ((uint32_t)(0x1UL << MXC_F_TPU_HAM_ECC_PAR_POS))

#define MXC_V_TPU_HAM_ECC_PAR_EVEN                     ((uint32_t)0x0UL)

#define MXC_S_TPU_HAM_ECC_PAR_EVEN                     (MXC_V_TPU_HAM_ECC_PAR_EVEN << MXC_F_TPU_HAM_ECC_PAR_POS)

#define MXC_V_TPU_HAM_ECC_PAR_ODD                      ((uint32_t)0x1UL)

#define MXC_S_TPU_HAM_ECC_PAR_ODD                      (MXC_V_TPU_HAM_ECC_PAR_ODD << MXC_F_TPU_HAM_ECC_PAR_POS)

#define MXC_F_TPU_CIPHER_INIT_IVEC_POS                 0

#define MXC_F_TPU_CIPHER_INIT_IVEC                     ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_CIPHER_INIT_IVEC_POS))

#define MXC_F_TPU_CIPHER_KEY_KEY_POS                   0

#define MXC_F_TPU_CIPHER_KEY_KEY                       ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_CIPHER_KEY_KEY_POS))

#define MXC_F_TPU_HASH_DIGEST_HASH_POS                 0

#define MXC_F_TPU_HASH_DIGEST_HASH                     ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_HASH_DIGEST_HASH_POS))

#define MXC_F_TPU_HASH_MSG_SZ_MSGSZ_POS                0

#define MXC_F_TPU_HASH_MSG_SZ_MSGSZ                    ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_HASH_MSG_SZ_MSGSZ_POS))

#define MXC_F_TPU_MAA_MAWS_MSGSZ_POS                   0

#define MXC_F_TPU_MAA_MAWS_MSGSZ                       ((uint32_t)(0xFFFUL << MXC_F_TPU_MAA_MAWS_MSGSZ_POS))

#ifdef __cplusplus

}

#endif


#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_TPU_REGS_H_

mxc_tpu_regs_t::maa_maws
__IO uint32_t maa_maws
Definition: tpu_regs.h:95

mxc_tpu_regs_t::crc_ctrl
__IO uint32_t crc_ctrl
Definition: tpu_regs.h:80

mxc_tpu_regs_t::crc_poly
__IO uint32_t crc_poly
Definition: tpu_regs.h:87

mxc_tpu_regs_t::crc_val
__IO uint32_t crc_val
Definition: tpu_regs.h:88

mxc_tpu_regs_t::dma_dest
__IO uint32_t dma_dest
Definition: tpu_regs.h:82

mxc_tpu_regs_t::dma_cnt
__IO uint32_t dma_cnt
Definition: tpu_regs.h:83

mxc_tpu_regs_t::crypto_ctrl
__IO uint32_t crypto_ctrl
Definition: tpu_regs.h:77

mxc_tpu_regs_t::dma_src
__IO uint32_t dma_src
Definition: tpu_regs.h:81

mxc_tpu_regs_t::crc_prng
__I uint32_t crc_prng
Definition: tpu_regs.h:89

mxc_tpu_regs_t::hash_ctrl
__IO uint32_t hash_ctrl
Definition: tpu_regs.h:79

mxc_tpu_regs_t::cipher_ctrl
__IO uint32_t cipher_ctrl
Definition: tpu_regs.h:78

mxc_tpu_regs_t::ham_ecc
__IO uint32_t ham_ecc
Definition: tpu_regs.h:90

mxc_tpu_regs_t::maa_ctrl
__IO uint32_t maa_ctrl
Definition: tpu_regs.h:84

mxc_tpu_regs_t
Definition: tpu_regs.h:76