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MAX32650 Peripheral Driver API
Peripheral Driver API for the MAX32650
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Files | |
| file | tpu_regs.h |
Data Structures | |
| struct | mxc_tpu_regs_t |
Registers, Bit Masks and Bit Positions for the TPU Peripheral Module.
The Trust Protection Unit used to assist the computationally intensive operations of several common cryptographic algorithms.
| struct mxc_tpu_regs_t |
Structure type to access the TPU Registers.
Data Fields | |
| __IO uint32_t | crypto_ctrl |
| __IO uint32_t | cipher_ctrl |
| __IO uint32_t | hash_ctrl |
| __IO uint32_t | crc_ctrl |
| __IO uint32_t | dma_src |
| __IO uint32_t | dma_dest |
| __IO uint32_t | dma_cnt |
| __IO uint32_t | maa_ctrl |
| __O uint32_t | crypto_din [4] |
| __I uint32_t | crypto_dout [4] |
| __IO uint32_t | crc_poly |
| __IO uint32_t | crc_val |
| __I uint32_t | crc_prng |
| __IO uint32_t | ham_ecc |
| __IO uint32_t | cipher_init [4] |
| __O uint32_t | cipher_key [8] |
| __IO uint32_t | hash_digest [16] |
| __IO uint32_t | hash_msg_sz [4] |
| __IO uint32_t | maa_maws |
| __IO uint32_t cipher_ctrl |
0x04: TPU CIPHER_CTRL Register
| __IO uint32_t cipher_init[4] |
0x50: TPU CIPHER_INIT Register
| __O uint32_t cipher_key[8] |
0x60: TPU CIPHER_KEY Register
| __IO uint32_t crc_ctrl |
0x0C: TPU CRC_CTRL Register
| __IO uint32_t crc_poly |
0x40: TPU CRC_POLY Register
| __I uint32_t crc_prng |
0x48: TPU CRC_PRNG Register
| __IO uint32_t crc_val |
0x44: TPU CRC_VAL Register
| __IO uint32_t crypto_ctrl |
0x00: TPU CRYPTO_CTRL Register
| __O uint32_t crypto_din[4] |
0x20: TPU CRYPTO_DIN Register
| __I uint32_t crypto_dout[4] |
0x30: TPU CRYPTO_DOUT Register
| __IO uint32_t dma_cnt |
0x18: TPU DMA_CNT Register
| __IO uint32_t dma_dest |
0x14: TPU DMA_DEST Register
| __IO uint32_t dma_src |
0x10: TPU DMA_SRC Register
| __IO uint32_t ham_ecc |
0x4C: TPU HAM_ECC Register
| __IO uint32_t hash_ctrl |
0x08: TPU HASH_CTRL Register
| __IO uint32_t hash_digest[16] |
0x80: TPU HASH_DIGEST Register
| __IO uint32_t hash_msg_sz[4] |
0xC0: TPU HASH_MSG_SZ Register
| __IO uint32_t maa_ctrl |
0x1C: TPU MAA_CTRL Register
| __IO uint32_t maa_maws |
0xD0: TPU MAA_MAWS Register