rtc_regs.h

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/******************************************************************************
 *
 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
 * Analog Devices, Inc.),
 * Copyright (C) 2023-2024 Analog Devices, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 ******************************************************************************/
 
#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32660_INCLUDE_RTC_REGS_H_
#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32660_INCLUDE_RTC_REGS_H_
 
/* **** Includes **** */
#include <stdint.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined (__ICCARM__)
  #pragma system_include
#endif
 
#if defined (__CC_ARM)
  #pragma anon_unions
#endif
/*
    If types are not defined elsewhere (CMSIS) define them here
*/
#ifndef __IO
#define __IO volatile
#endif
#ifndef __I
#define __I  volatile const
#endif
#ifndef __O
#define __O  volatile
#endif
#ifndef __R
#define __R  volatile const
#endif
 
/* **** Definitions **** */
 
typedef struct {
    __IO uint32_t sec;                  
    __IO uint32_t ssec;                 
    __IO uint32_t ras;                  
    __IO uint32_t rssa;                 
    __IO uint32_t ctrl;                 
    __IO uint32_t trim;                 
    __IO uint32_t oscctrl;              
} mxc_rtc_regs_t;
 
/* Register offsets for module RTC */
#define MXC_R_RTC_SEC                      ((uint32_t)0x00000000UL) 
#define MXC_R_RTC_SSEC                     ((uint32_t)0x00000004UL) 
#define MXC_R_RTC_RAS                      ((uint32_t)0x00000008UL) 
#define MXC_R_RTC_RSSA                     ((uint32_t)0x0000000CUL) 
#define MXC_R_RTC_CTRL                     ((uint32_t)0x00000010UL) 
#define MXC_R_RTC_TRIM                     ((uint32_t)0x00000014UL) 
#define MXC_R_RTC_OSCCTRL                  ((uint32_t)0x00000018UL) 
#define MXC_F_RTC_SEC_SEC_POS                          0 
#define MXC_F_RTC_SEC_SEC                              ((uint32_t)(0xFFFFFFFFUL << MXC_F_RTC_SEC_SEC_POS)) 
#define MXC_F_RTC_SSEC_RTSS_POS                        0 
#define MXC_F_RTC_SSEC_RTSS                            ((uint32_t)(0xFFUL << MXC_F_RTC_SSEC_RTSS_POS)) 
#define MXC_F_RTC_RAS_RAS_POS                          0 
#define MXC_F_RTC_RAS_RAS                              ((uint32_t)(0xFFFFFUL << MXC_F_RTC_RAS_RAS_POS)) 
#define MXC_F_RTC_RSSA_RSSA_POS                        0 
#define MXC_F_RTC_RSSA_RSSA                            ((uint32_t)(0xFFFFFFFFUL << MXC_F_RTC_RSSA_RSSA_POS)) 
#define MXC_F_RTC_CTRL_RTCE_POS                        0 
#define MXC_F_RTC_CTRL_RTCE                            ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_RTCE_POS)) 
#define MXC_F_RTC_CTRL_ADE_POS                         1 
#define MXC_F_RTC_CTRL_ADE                             ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ADE_POS)) 
#define MXC_F_RTC_CTRL_ASE_POS                         2 
#define MXC_F_RTC_CTRL_ASE                             ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ASE_POS)) 
#define MXC_F_RTC_CTRL_BUSY_POS                        3 
#define MXC_F_RTC_CTRL_BUSY                            ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_BUSY_POS)) 
#define MXC_F_RTC_CTRL_RDY_POS                         4 
#define MXC_F_RTC_CTRL_RDY                             ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_RDY_POS)) 
#define MXC_F_RTC_CTRL_RDYE_POS                        5 
#define MXC_F_RTC_CTRL_RDYE                            ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_RDYE_POS)) 
#define MXC_F_RTC_CTRL_ALDF_POS                        6 
#define MXC_F_RTC_CTRL_ALDF                            ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ALDF_POS)) 
#define MXC_F_RTC_CTRL_ALSF_POS                        7 
#define MXC_F_RTC_CTRL_ALSF                            ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ALSF_POS)) 
#define MXC_F_RTC_CTRL_SQE_POS                         8 
#define MXC_F_RTC_CTRL_SQE                             ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SQE_POS)) 
#define MXC_F_RTC_CTRL_FT_POS                          9 
#define MXC_F_RTC_CTRL_FT                              ((uint32_t)(0x3UL << MXC_F_RTC_CTRL_FT_POS)) 
#define MXC_V_RTC_CTRL_FT_FREQ1HZ                      ((uint32_t)0x0UL) 
#define MXC_S_RTC_CTRL_FT_FREQ1HZ                      (MXC_V_RTC_CTRL_FT_FREQ1HZ << MXC_F_RTC_CTRL_FT_POS) 
#define MXC_V_RTC_CTRL_FT_FREQ512HZ                    ((uint32_t)0x1UL) 
#define MXC_S_RTC_CTRL_FT_FREQ512HZ                    (MXC_V_RTC_CTRL_FT_FREQ512HZ << MXC_F_RTC_CTRL_FT_POS) 
#define MXC_V_RTC_CTRL_FT_FREQ4KHZ                     ((uint32_t)0x2UL) 
#define MXC_S_RTC_CTRL_FT_FREQ4KHZ                     (MXC_V_RTC_CTRL_FT_FREQ4KHZ << MXC_F_RTC_CTRL_FT_POS) 
#define MXC_V_RTC_CTRL_FT_CLKDIV8                      ((uint32_t)0x3UL) 
#define MXC_S_RTC_CTRL_FT_CLKDIV8                      (MXC_V_RTC_CTRL_FT_CLKDIV8 << MXC_F_RTC_CTRL_FT_POS) 
#define MXC_F_RTC_CTRL_X32KMD_POS                      11 
#define MXC_F_RTC_CTRL_X32KMD                          ((uint32_t)(0x3UL << MXC_F_RTC_CTRL_X32KMD_POS)) 
#define MXC_V_RTC_CTRL_X32KMD_NOISEIMMUNEMODE          ((uint32_t)0x0UL) 
#define MXC_S_RTC_CTRL_X32KMD_NOISEIMMUNEMODE          (MXC_V_RTC_CTRL_X32KMD_NOISEIMMUNEMODE << MXC_F_RTC_CTRL_X32KMD_POS) 
#define MXC_V_RTC_CTRL_X32KMD_QUIETMODE                ((uint32_t)0x1UL) 
#define MXC_S_RTC_CTRL_X32KMD_QUIETMODE                (MXC_V_RTC_CTRL_X32KMD_QUIETMODE << MXC_F_RTC_CTRL_X32KMD_POS) 
#define MXC_V_RTC_CTRL_X32KMD_QUIETINSTOPWITHWARMUP    ((uint32_t)0x2UL) 
#define MXC_S_RTC_CTRL_X32KMD_QUIETINSTOPWITHWARMUP    (MXC_V_RTC_CTRL_X32KMD_QUIETINSTOPWITHWARMUP << MXC_F_RTC_CTRL_X32KMD_POS) 
#define MXC_V_RTC_CTRL_X32KMD_QUIETINSTOPNOWARMUP      ((uint32_t)0x3UL) 
#define MXC_S_RTC_CTRL_X32KMD_QUIETINSTOPNOWARMUP      (MXC_V_RTC_CTRL_X32KMD_QUIETINSTOPNOWARMUP << MXC_F_RTC_CTRL_X32KMD_POS) 
#define MXC_F_RTC_CTRL_WE_POS                          15 
#define MXC_F_RTC_CTRL_WE                              ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_WE_POS)) 
#define MXC_F_RTC_TRIM_TRIM_POS                        0 
#define MXC_F_RTC_TRIM_TRIM                            ((uint32_t)(0xFFUL << MXC_F_RTC_TRIM_TRIM_POS)) 
#define MXC_F_RTC_TRIM_VBATTMR_POS                     8 
#define MXC_F_RTC_TRIM_VBATTMR                         ((uint32_t)(0xFFFFFFUL << MXC_F_RTC_TRIM_VBATTMR_POS)) 
#define MXC_F_RTC_OSCCTRL_FLITER_EN_POS                0 
#define MXC_F_RTC_OSCCTRL_FLITER_EN                    ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_FLITER_EN_POS)) 
#define MXC_F_RTC_OSCCTRL_IBIAS_SEL_POS                1 
#define MXC_F_RTC_OSCCTRL_IBIAS_SEL                    ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_IBIAS_SEL_POS)) 
#define MXC_F_RTC_OSCCTRL_HYST_EN_POS                  2 
#define MXC_F_RTC_OSCCTRL_HYST_EN                      ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_HYST_EN_POS)) 
#define MXC_F_RTC_OSCCTRL_IBIAS_EN_POS                 3 
#define MXC_F_RTC_OSCCTRL_IBIAS_EN                     ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_IBIAS_EN_POS)) 
#define MXC_F_RTC_OSCCTRL_BYPASS_POS                   4 
#define MXC_F_RTC_OSCCTRL_BYPASS                       ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_BYPASS_POS)) 
#define MXC_F_RTC_OSCCTRL_OUT32K_POS                   5 
#define MXC_F_RTC_OSCCTRL_OUT32K                       ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_OUT32K_POS)) 
#ifdef __cplusplus
}
#endif
 
#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32660_INCLUDE_RTC_REGS_H_