Macros
#define	MXC_R_SDMA_IP ((uint32_t)0x00000000UL)

#define	MXC_R_SDMA_SP ((uint32_t)0x00000004UL)

#define	MXC_R_SDMA_DP0 ((uint32_t)0x00000008UL)

#define	MXC_R_SDMA_DP1 ((uint32_t)0x0000000CUL)

#define	MXC_R_SDMA_BP ((uint32_t)0x00000010UL)

#define	MXC_R_SDMA_OFFS ((uint32_t)0x00000014UL)

#define	MXC_R_SDMA_LC0 ((uint32_t)0x00000018UL)

#define	MXC_R_SDMA_LC1 ((uint32_t)0x0000001CUL)

#define	MXC_R_SDMA_A0 ((uint32_t)0x00000020UL)

#define	MXC_R_SDMA_A1 ((uint32_t)0x00000024UL)

#define	MXC_R_SDMA_A2 ((uint32_t)0x00000028UL)

#define	MXC_R_SDMA_A3 ((uint32_t)0x0000002CUL)

#define	MXC_R_SDMA_WDCN ((uint32_t)0x00000030UL)

#define	MXC_R_SDMA_INT_MUX_CTRL0 ((uint32_t)0x00000080UL)

#define	MXC_R_SDMA_INT_MUX_CTRL1 ((uint32_t)0x00000084UL)

#define	MXC_R_SDMA_INT_MUX_CTRL2 ((uint32_t)0x00000088UL)

#define	MXC_R_SDMA_INT_MUX_CTRL3 ((uint32_t)0x0000008CUL)

#define	MXC_R_SDMA_IP_ADDR ((uint32_t)0x00000090UL)

#define	MXC_R_SDMA_CTRL ((uint32_t)0x00000094UL)

#define	MXC_R_SDMA_INT_IN_CTRL ((uint32_t)0x000000A0UL)

#define	MXC_R_SDMA_INT_IN_FLAG ((uint32_t)0x000000A4UL)

#define	MXC_R_SDMA_INT_IN_IE ((uint32_t)0x000000A8UL)

#define	MXC_R_SDMA_IRQ_FLAG ((uint32_t)0x000000B0UL)

#define	MXC_R_SDMA_IRQ_IE ((uint32_t)0x000000B4UL)

Detailed Description

SDMA Peripheral Register Offsets from the SDMA Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_SDMA_A0

#define MXC_R_SDMA_A0 ((uint32_t)0x00000020UL)

Offset from SDMA Base Address: 0x0020

◆ MXC_R_SDMA_A1

#define MXC_R_SDMA_A1 ((uint32_t)0x00000024UL)

Offset from SDMA Base Address: 0x0024

◆ MXC_R_SDMA_A2

#define MXC_R_SDMA_A2 ((uint32_t)0x00000028UL)

Offset from SDMA Base Address: 0x0028

◆ MXC_R_SDMA_A3

#define MXC_R_SDMA_A3 ((uint32_t)0x0000002CUL)

Offset from SDMA Base Address: 0x002C

◆ MXC_R_SDMA_BP

#define MXC_R_SDMA_BP ((uint32_t)0x00000010UL)

Offset from SDMA Base Address: 0x0010

◆ MXC_R_SDMA_CTRL

#define MXC_R_SDMA_CTRL ((uint32_t)0x00000094UL)

Offset from SDMA Base Address: 0x0094

◆ MXC_R_SDMA_DP0

#define MXC_R_SDMA_DP0 ((uint32_t)0x00000008UL)

Offset from SDMA Base Address: 0x0008

◆ MXC_R_SDMA_DP1

#define MXC_R_SDMA_DP1 ((uint32_t)0x0000000CUL)

Offset from SDMA Base Address: 0x000C

◆ MXC_R_SDMA_INT_IN_CTRL

#define MXC_R_SDMA_INT_IN_CTRL ((uint32_t)0x000000A0UL)

Offset from SDMA Base Address: 0x00A0

◆ MXC_R_SDMA_INT_IN_FLAG

#define MXC_R_SDMA_INT_IN_FLAG ((uint32_t)0x000000A4UL)

Offset from SDMA Base Address: 0x00A4

◆ MXC_R_SDMA_INT_IN_IE

#define MXC_R_SDMA_INT_IN_IE ((uint32_t)0x000000A8UL)

Offset from SDMA Base Address: 0x00A8

◆ MXC_R_SDMA_INT_MUX_CTRL0

#define MXC_R_SDMA_INT_MUX_CTRL0 ((uint32_t)0x00000080UL)

Offset from SDMA Base Address: 0x0080

◆ MXC_R_SDMA_INT_MUX_CTRL1

#define MXC_R_SDMA_INT_MUX_CTRL1 ((uint32_t)0x00000084UL)

Offset from SDMA Base Address: 0x0084

◆ MXC_R_SDMA_INT_MUX_CTRL2

#define MXC_R_SDMA_INT_MUX_CTRL2 ((uint32_t)0x00000088UL)

Offset from SDMA Base Address: 0x0088

◆ MXC_R_SDMA_INT_MUX_CTRL3

#define MXC_R_SDMA_INT_MUX_CTRL3 ((uint32_t)0x0000008CUL)

Offset from SDMA Base Address: 0x008C

◆ MXC_R_SDMA_IP

#define MXC_R_SDMA_IP ((uint32_t)0x00000000UL)

Offset from SDMA Base Address: 0x0000

◆ MXC_R_SDMA_IP_ADDR

#define MXC_R_SDMA_IP_ADDR ((uint32_t)0x00000090UL)

Offset from SDMA Base Address: 0x0090

◆ MXC_R_SDMA_IRQ_FLAG

#define MXC_R_SDMA_IRQ_FLAG ((uint32_t)0x000000B0UL)

Offset from SDMA Base Address: 0x00B0

◆ MXC_R_SDMA_IRQ_IE

#define MXC_R_SDMA_IRQ_IE ((uint32_t)0x000000B4UL)

Offset from SDMA Base Address: 0x00B4

◆ MXC_R_SDMA_LC0

#define MXC_R_SDMA_LC0 ((uint32_t)0x00000018UL)

Offset from SDMA Base Address: 0x0018

◆ MXC_R_SDMA_LC1

#define MXC_R_SDMA_LC1 ((uint32_t)0x0000001CUL)

Offset from SDMA Base Address: 0x001C

◆ MXC_R_SDMA_OFFS

#define MXC_R_SDMA_OFFS ((uint32_t)0x00000014UL)

Offset from SDMA Base Address: 0x0014

◆ MXC_R_SDMA_SP

#define MXC_R_SDMA_SP ((uint32_t)0x00000004UL)

Offset from SDMA Base Address: 0x0004

◆ MXC_R_SDMA_WDCN

#define MXC_R_SDMA_WDCN ((uint32_t)0x00000030UL)

Offset from SDMA Base Address: 0x0030

Macros