MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
uart_regs.h
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1
8/******************************************************************************
9 *
10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
11 * Analog Devices, Inc.),
12 * Copyright (C) 2023-2024 Analog Devices, Inc.
13 *
14 * Licensed under the Apache License, Version 2.0 (the "License");
15 * you may not use this file except in compliance with the License.
16 * You may obtain a copy of the License at
17 *
18 * http://www.apache.org/licenses/LICENSE-2.0
19 *
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an "AS IS" BASIS,
22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
25 *
26 ******************************************************************************/
27
28#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_UART_REGS_H_
29#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_UART_REGS_H_
30
31/* **** Includes **** */
32#include <stdint.h>
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
38#if defined (__ICCARM__)
39 #pragma system_include
40#endif
41
42#if defined (__CC_ARM)
43 #pragma anon_unions
44#endif
46/*
47 If types are not defined elsewhere (CMSIS) define them here
48*/
49#ifndef __IO
50#define __IO volatile
51#endif
52#ifndef __I
53#define __I volatile const
54#endif
55#ifndef __O
56#define __O volatile
57#endif
58#ifndef __R
59#define __R volatile const
60#endif
62
63/* **** Definitions **** */
64
76typedef struct {
77 __IO uint32_t ctrl;
78 __IO uint32_t thresh_ctrl;
79 __I uint32_t status;
80 __IO uint32_t int_en;
81 __IO uint32_t int_fl;
82 __IO uint32_t baud0;
83 __IO uint32_t baud1;
84 __IO uint32_t fifo;
85 __IO uint32_t dma;
86 __IO uint32_t tx_fifo;
88
89/* Register offsets for module UART */
96#define MXC_R_UART_CTRL ((uint32_t)0x00000000UL)
97#define MXC_R_UART_THRESH_CTRL ((uint32_t)0x00000004UL)
98#define MXC_R_UART_STATUS ((uint32_t)0x00000008UL)
99#define MXC_R_UART_INT_EN ((uint32_t)0x0000000CUL)
100#define MXC_R_UART_INT_FL ((uint32_t)0x00000010UL)
101#define MXC_R_UART_BAUD0 ((uint32_t)0x00000014UL)
102#define MXC_R_UART_BAUD1 ((uint32_t)0x00000018UL)
103#define MXC_R_UART_FIFO ((uint32_t)0x0000001CUL)
104#define MXC_R_UART_DMA ((uint32_t)0x00000020UL)
105#define MXC_R_UART_TX_FIFO ((uint32_t)0x00000024UL)
114#define MXC_F_UART_CTRL_ENABLE_POS 0
115#define MXC_F_UART_CTRL_ENABLE ((uint32_t)(0x1UL << MXC_F_UART_CTRL_ENABLE_POS))
117#define MXC_F_UART_CTRL_PARITY_EN_POS 1
118#define MXC_F_UART_CTRL_PARITY_EN ((uint32_t)(0x1UL << MXC_F_UART_CTRL_PARITY_EN_POS))
120#define MXC_F_UART_CTRL_PARITY_POS 2
121#define MXC_F_UART_CTRL_PARITY ((uint32_t)(0x3UL << MXC_F_UART_CTRL_PARITY_POS))
122#define MXC_V_UART_CTRL_PARITY_EVEN ((uint32_t)0x0UL)
123#define MXC_S_UART_CTRL_PARITY_EVEN (MXC_V_UART_CTRL_PARITY_EVEN << MXC_F_UART_CTRL_PARITY_POS)
124#define MXC_V_UART_CTRL_PARITY_ODD ((uint32_t)0x1UL)
125#define MXC_S_UART_CTRL_PARITY_ODD (MXC_V_UART_CTRL_PARITY_ODD << MXC_F_UART_CTRL_PARITY_POS)
126#define MXC_V_UART_CTRL_PARITY_MARK ((uint32_t)0x2UL)
127#define MXC_S_UART_CTRL_PARITY_MARK (MXC_V_UART_CTRL_PARITY_MARK << MXC_F_UART_CTRL_PARITY_POS)
128#define MXC_V_UART_CTRL_PARITY_SPACE ((uint32_t)0x3UL)
129#define MXC_S_UART_CTRL_PARITY_SPACE (MXC_V_UART_CTRL_PARITY_SPACE << MXC_F_UART_CTRL_PARITY_POS)
131#define MXC_F_UART_CTRL_PARMD_POS 4
132#define MXC_F_UART_CTRL_PARMD ((uint32_t)(0x1UL << MXC_F_UART_CTRL_PARMD_POS))
134#define MXC_F_UART_CTRL_TX_FLUSH_POS 5
135#define MXC_F_UART_CTRL_TX_FLUSH ((uint32_t)(0x1UL << MXC_F_UART_CTRL_TX_FLUSH_POS))
137#define MXC_F_UART_CTRL_RX_FLUSH_POS 6
138#define MXC_F_UART_CTRL_RX_FLUSH ((uint32_t)(0x1UL << MXC_F_UART_CTRL_RX_FLUSH_POS))
140#define MXC_F_UART_CTRL_BITACC_POS 7
141#define MXC_F_UART_CTRL_BITACC ((uint32_t)(0x1UL << MXC_F_UART_CTRL_BITACC_POS))
143#define MXC_F_UART_CTRL_CHAR_SIZE_POS 8
144#define MXC_F_UART_CTRL_CHAR_SIZE ((uint32_t)(0x3UL << MXC_F_UART_CTRL_CHAR_SIZE_POS))
145#define MXC_V_UART_CTRL_CHAR_SIZE_5 ((uint32_t)0x0UL)
146#define MXC_S_UART_CTRL_CHAR_SIZE_5 (MXC_V_UART_CTRL_CHAR_SIZE_5 << MXC_F_UART_CTRL_CHAR_SIZE_POS)
147#define MXC_V_UART_CTRL_CHAR_SIZE_6 ((uint32_t)0x1UL)
148#define MXC_S_UART_CTRL_CHAR_SIZE_6 (MXC_V_UART_CTRL_CHAR_SIZE_6 << MXC_F_UART_CTRL_CHAR_SIZE_POS)
149#define MXC_V_UART_CTRL_CHAR_SIZE_7 ((uint32_t)0x2UL)
150#define MXC_S_UART_CTRL_CHAR_SIZE_7 (MXC_V_UART_CTRL_CHAR_SIZE_7 << MXC_F_UART_CTRL_CHAR_SIZE_POS)
151#define MXC_V_UART_CTRL_CHAR_SIZE_8 ((uint32_t)0x3UL)
152#define MXC_S_UART_CTRL_CHAR_SIZE_8 (MXC_V_UART_CTRL_CHAR_SIZE_8 << MXC_F_UART_CTRL_CHAR_SIZE_POS)
154#define MXC_F_UART_CTRL_STOPBITS_POS 10
155#define MXC_F_UART_CTRL_STOPBITS ((uint32_t)(0x1UL << MXC_F_UART_CTRL_STOPBITS_POS))
157#define MXC_F_UART_CTRL_FLOW_CTRL_POS 11
158#define MXC_F_UART_CTRL_FLOW_CTRL ((uint32_t)(0x1UL << MXC_F_UART_CTRL_FLOW_CTRL_POS))
160#define MXC_F_UART_CTRL_FLOW_POL_POS 12
161#define MXC_F_UART_CTRL_FLOW_POL ((uint32_t)(0x1UL << MXC_F_UART_CTRL_FLOW_POL_POS))
163#define MXC_F_UART_CTRL_NULL_MODEM_POS 13
164#define MXC_F_UART_CTRL_NULL_MODEM ((uint32_t)(0x1UL << MXC_F_UART_CTRL_NULL_MODEM_POS))
166#define MXC_F_UART_CTRL_BREAK_POS 14
167#define MXC_F_UART_CTRL_BREAK ((uint32_t)(0x1UL << MXC_F_UART_CTRL_BREAK_POS))
169#define MXC_F_UART_CTRL_CLKSEL_POS 15
170#define MXC_F_UART_CTRL_CLKSEL ((uint32_t)(0x1UL << MXC_F_UART_CTRL_CLKSEL_POS))
172#define MXC_F_UART_CTRL_RX_TO_POS 16
173#define MXC_F_UART_CTRL_RX_TO ((uint32_t)(0xFFUL << MXC_F_UART_CTRL_RX_TO_POS))
183#define MXC_F_UART_THRESH_CTRL_RX_FIFO_THRESH_POS 0
184#define MXC_F_UART_THRESH_CTRL_RX_FIFO_THRESH ((uint32_t)(0x3FUL << MXC_F_UART_THRESH_CTRL_RX_FIFO_THRESH_POS))
186#define MXC_F_UART_THRESH_CTRL_TX_FIFO_THRESH_POS 8
187#define MXC_F_UART_THRESH_CTRL_TX_FIFO_THRESH ((uint32_t)(0x3FUL << MXC_F_UART_THRESH_CTRL_TX_FIFO_THRESH_POS))
189#define MXC_F_UART_THRESH_CTRL_RTS_FIFO_THRESH_POS 16
190#define MXC_F_UART_THRESH_CTRL_RTS_FIFO_THRESH ((uint32_t)(0x3FUL << MXC_F_UART_THRESH_CTRL_RTS_FIFO_THRESH_POS))
200#define MXC_F_UART_STATUS_TX_BUSY_POS 0
201#define MXC_F_UART_STATUS_TX_BUSY ((uint32_t)(0x1UL << MXC_F_UART_STATUS_TX_BUSY_POS))
203#define MXC_F_UART_STATUS_RX_BUSY_POS 1
204#define MXC_F_UART_STATUS_RX_BUSY ((uint32_t)(0x1UL << MXC_F_UART_STATUS_RX_BUSY_POS))
206#define MXC_F_UART_STATUS_PARITY_POS 2
207#define MXC_F_UART_STATUS_PARITY ((uint32_t)(0x1UL << MXC_F_UART_STATUS_PARITY_POS))
209#define MXC_F_UART_STATUS_BREAK_POS 3
210#define MXC_F_UART_STATUS_BREAK ((uint32_t)(0x1UL << MXC_F_UART_STATUS_BREAK_POS))
212#define MXC_F_UART_STATUS_RX_EMPTY_POS 4
213#define MXC_F_UART_STATUS_RX_EMPTY ((uint32_t)(0x1UL << MXC_F_UART_STATUS_RX_EMPTY_POS))
215#define MXC_F_UART_STATUS_RX_FULL_POS 5
216#define MXC_F_UART_STATUS_RX_FULL ((uint32_t)(0x1UL << MXC_F_UART_STATUS_RX_FULL_POS))
218#define MXC_F_UART_STATUS_TX_EMPTY_POS 6
219#define MXC_F_UART_STATUS_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_UART_STATUS_TX_EMPTY_POS))
221#define MXC_F_UART_STATUS_TX_FULL_POS 7
222#define MXC_F_UART_STATUS_TX_FULL ((uint32_t)(0x1UL << MXC_F_UART_STATUS_TX_FULL_POS))
224#define MXC_F_UART_STATUS_RX_NUM_POS 8
225#define MXC_F_UART_STATUS_RX_NUM ((uint32_t)(0x3FUL << MXC_F_UART_STATUS_RX_NUM_POS))
227#define MXC_F_UART_STATUS_TX_FIFO_CNT_POS 16
228#define MXC_F_UART_STATUS_TX_FIFO_CNT ((uint32_t)(0x3FUL << MXC_F_UART_STATUS_TX_FIFO_CNT_POS))
230#define MXC_F_UART_STATUS_RX_TO_POS 24
231#define MXC_F_UART_STATUS_RX_TO ((uint32_t)(0x1UL << MXC_F_UART_STATUS_RX_TO_POS))
241#define MXC_F_UART_INT_EN_RX_FRAME_ERROR_POS 0
242#define MXC_F_UART_INT_EN_RX_FRAME_ERROR ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_FRAME_ERROR_POS))
244#define MXC_F_UART_INT_EN_RX_PARITY_ERROR_POS 1
245#define MXC_F_UART_INT_EN_RX_PARITY_ERROR ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_PARITY_ERROR_POS))
247#define MXC_F_UART_INT_EN_CTS_CHANGE_POS 2
248#define MXC_F_UART_INT_EN_CTS_CHANGE ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_CTS_CHANGE_POS))
250#define MXC_F_UART_INT_EN_RX_OVERRUN_POS 3
251#define MXC_F_UART_INT_EN_RX_OVERRUN ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_OVERRUN_POS))
253#define MXC_F_UART_INT_EN_RX_FIFO_THRESH_POS 4
254#define MXC_F_UART_INT_EN_RX_FIFO_THRESH ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_FIFO_THRESH_POS))
256#define MXC_F_UART_INT_EN_TX_FIFO_ALMOST_EMPTY_POS 5
257#define MXC_F_UART_INT_EN_TX_FIFO_ALMOST_EMPTY ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_TX_FIFO_ALMOST_EMPTY_POS))
259#define MXC_F_UART_INT_EN_TX_FIFO_THRESH_POS 6
260#define MXC_F_UART_INT_EN_TX_FIFO_THRESH ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_TX_FIFO_THRESH_POS))
262#define MXC_F_UART_INT_EN_BREAK_POS 7
263#define MXC_F_UART_INT_EN_BREAK ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_BREAK_POS))
265#define MXC_F_UART_INT_EN_RX_TIMEOUT_POS 8
266#define MXC_F_UART_INT_EN_RX_TIMEOUT ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_TIMEOUT_POS))
268#define MXC_F_UART_INT_EN_LAST_BREAK_POS 9
269#define MXC_F_UART_INT_EN_LAST_BREAK ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_LAST_BREAK_POS))
279#define MXC_F_UART_INT_FL_RX_FRAME_ERROR_POS 0
280#define MXC_F_UART_INT_FL_RX_FRAME_ERROR ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_RX_FRAME_ERROR_POS))
282#define MXC_F_UART_INT_FL_RX_PARITY_ERROR_POS 1
283#define MXC_F_UART_INT_FL_RX_PARITY_ERROR ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_RX_PARITY_ERROR_POS))
285#define MXC_F_UART_INT_FL_CTS_CHANGE_POS 2
286#define MXC_F_UART_INT_FL_CTS_CHANGE ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_CTS_CHANGE_POS))
288#define MXC_F_UART_INT_FL_RX_OVERRUN_POS 3
289#define MXC_F_UART_INT_FL_RX_OVERRUN ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_RX_OVERRUN_POS))
291#define MXC_F_UART_INT_FL_RX_FIFO_THRESH_POS 4
292#define MXC_F_UART_INT_FL_RX_FIFO_THRESH ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_RX_FIFO_THRESH_POS))
294#define MXC_F_UART_INT_FL_TX_FIFO_ALMOST_EMPTY_POS 5
295#define MXC_F_UART_INT_FL_TX_FIFO_ALMOST_EMPTY ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_TX_FIFO_ALMOST_EMPTY_POS))
297#define MXC_F_UART_INT_FL_TX_FIFO_THRESH_POS 6
298#define MXC_F_UART_INT_FL_TX_FIFO_THRESH ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_TX_FIFO_THRESH_POS))
300#define MXC_F_UART_INT_FL_BREAK_POS 7
301#define MXC_F_UART_INT_FL_BREAK ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_BREAK_POS))
303#define MXC_F_UART_INT_FL_RX_TIMEOUT_POS 8
304#define MXC_F_UART_INT_FL_RX_TIMEOUT ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_RX_TIMEOUT_POS))
306#define MXC_F_UART_INT_FL_LAST_BREAK_POS 9
307#define MXC_F_UART_INT_FL_LAST_BREAK ((uint32_t)(0x1UL << MXC_F_UART_INT_FL_LAST_BREAK_POS))
317#define MXC_F_UART_BAUD0_IBAUD_POS 0
318#define MXC_F_UART_BAUD0_IBAUD ((uint32_t)(0xFFFUL << MXC_F_UART_BAUD0_IBAUD_POS))
320#define MXC_F_UART_BAUD0_FACTOR_POS 16
321#define MXC_F_UART_BAUD0_FACTOR ((uint32_t)(0x3UL << MXC_F_UART_BAUD0_FACTOR_POS))
322#define MXC_V_UART_BAUD0_FACTOR_128 ((uint32_t)0x0UL)
323#define MXC_S_UART_BAUD0_FACTOR_128 (MXC_V_UART_BAUD0_FACTOR_128 << MXC_F_UART_BAUD0_FACTOR_POS)
324#define MXC_V_UART_BAUD0_FACTOR_64 ((uint32_t)0x1UL)
325#define MXC_S_UART_BAUD0_FACTOR_64 (MXC_V_UART_BAUD0_FACTOR_64 << MXC_F_UART_BAUD0_FACTOR_POS)
326#define MXC_V_UART_BAUD0_FACTOR_32 ((uint32_t)0x2UL)
327#define MXC_S_UART_BAUD0_FACTOR_32 (MXC_V_UART_BAUD0_FACTOR_32 << MXC_F_UART_BAUD0_FACTOR_POS)
328#define MXC_V_UART_BAUD0_FACTOR_16 ((uint32_t)0x3UL)
329#define MXC_S_UART_BAUD0_FACTOR_16 (MXC_V_UART_BAUD0_FACTOR_16 << MXC_F_UART_BAUD0_FACTOR_POS)
339#define MXC_F_UART_BAUD1_DBAUD_POS 0
340#define MXC_F_UART_BAUD1_DBAUD ((uint32_t)(0xFFFUL << MXC_F_UART_BAUD1_DBAUD_POS))
350#define MXC_F_UART_FIFO_FIFO_POS 0
351#define MXC_F_UART_FIFO_FIFO ((uint32_t)(0xFFUL << MXC_F_UART_FIFO_FIFO_POS))
361#define MXC_F_UART_DMA_TXDMA_EN_POS 0
362#define MXC_F_UART_DMA_TXDMA_EN ((uint32_t)(0x1UL << MXC_F_UART_DMA_TXDMA_EN_POS))
364#define MXC_F_UART_DMA_RXDMA_EN_POS 1
365#define MXC_F_UART_DMA_RXDMA_EN ((uint32_t)(0x1UL << MXC_F_UART_DMA_RXDMA_EN_POS))
367#define MXC_F_UART_DMA_RXDMA_START_POS 3
368#define MXC_F_UART_DMA_RXDMA_START ((uint32_t)(0x1UL << MXC_F_UART_DMA_RXDMA_START_POS))
370#define MXC_F_UART_DMA_RXDMA_AUTO_TO_POS 5
371#define MXC_F_UART_DMA_RXDMA_AUTO_TO ((uint32_t)(0x1UL << MXC_F_UART_DMA_RXDMA_AUTO_TO_POS))
373#define MXC_F_UART_DMA_TXDMA_LEVEL_POS 8
374#define MXC_F_UART_DMA_TXDMA_LEVEL ((uint32_t)(0x3FUL << MXC_F_UART_DMA_TXDMA_LEVEL_POS))
376#define MXC_F_UART_DMA_RXDMA_LEVEL_POS 16
377#define MXC_F_UART_DMA_RXDMA_LEVEL ((uint32_t)(0x3FUL << MXC_F_UART_DMA_RXDMA_LEVEL_POS))
387#define MXC_F_UART_TX_FIFO_DATA_POS 0
388#define MXC_F_UART_TX_FIFO_DATA ((uint32_t)(0x7FUL << MXC_F_UART_TX_FIFO_DATA_POS))
392#ifdef __cplusplus
393}
394#endif
395
396#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_UART_REGS_H_
__IO uint32_t int_fl
Definition: uart_regs.h:81
__IO uint32_t tx_fifo
Definition: uart_regs.h:86
__IO uint32_t int_en
Definition: uart_regs.h:80
__I uint32_t status
Definition: uart_regs.h:79
__IO uint32_t baud0
Definition: uart_regs.h:82
__IO uint32_t ctrl
Definition: uart_regs.h:77
__IO uint32_t dma
Definition: uart_regs.h:85
__IO uint32_t baud1
Definition: uart_regs.h:83
__IO uint32_t fifo
Definition: uart_regs.h:84
__IO uint32_t thresh_ctrl
Definition: uart_regs.h:78
Definition: uart_regs.h:76