MAX32672 Peripheral Driver API
Peripheral Driver API for the MAX32672
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Data Structures | Macros
ctb_regs.h File Reference
CTB » CTB_Registers
#include <stdint.h>

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Data Structures

struct  mxc_ctb_regs_t
 

Macros

#define MXC_R_CTB_CTRL   ((uint32_t)0x00000000UL)
 
#define MXC_R_CTB_CIPHER_CTRL   ((uint32_t)0x00000004UL)
 
#define MXC_R_CTB_HASH_CTRL   ((uint32_t)0x00000008UL)
 
#define MXC_R_CTB_CRC_CTRL   ((uint32_t)0x0000000CUL)
 
#define MXC_R_CTB_DMA_SRC   ((uint32_t)0x00000010UL)
 
#define MXC_R_CTB_DMA_DEST   ((uint32_t)0x00000014UL)
 
#define MXC_R_CTB_DMA_CNT   ((uint32_t)0x00000018UL)
 
#define MXC_R_CTB_DIN   ((uint32_t)0x00000020UL)
 
#define MXC_R_CTB_DOUT   ((uint32_t)0x00000030UL)
 
#define MXC_R_CTB_CRC_POLY   ((uint32_t)0x00000040UL)
 
#define MXC_R_CTB_CRC_VAL   ((uint32_t)0x00000044UL)
 
#define MXC_R_CTB_HAM_ECC   ((uint32_t)0x0000004CUL)
 
#define MXC_R_CTB_CIPHER_INIT   ((uint32_t)0x00000050UL)
 
#define MXC_R_CTB_CIPHER_KEY   ((uint32_t)0x00000060UL)
 
#define MXC_R_CTB_HASH_DIGEST   ((uint32_t)0x00000080UL)
 
#define MXC_R_CTB_HASH_MSG_SZ   ((uint32_t)0x000000C0UL)
 
#define MXC_R_CTB_AAD_LENGTH   ((uint32_t)0x000000D0UL)
 
#define MXC_R_CTB_PLD_LENGTH   ((uint32_t)0x000000D8UL)
 
#define MXC_R_CTB_TAGMIC   ((uint32_t)0x000000E0UL)
 
#define MXC_R_CTB_SCA_CTRL0   ((uint32_t)0x00000100UL)
 
#define MXC_R_CTB_SCA_CTRL1   ((uint32_t)0x00000104UL)
 
#define MXC_R_CTB_SCA_STAT   ((uint32_t)0x00000108UL)
 
#define MXC_R_CTB_SCA_PPX_ADDR   ((uint32_t)0x0000010CUL)
 
#define MXC_R_CTB_SCA_PPY_ADDR   ((uint32_t)0x00000110UL)
 
#define MXC_R_CTB_SCA_PPZ_ADDR   ((uint32_t)0x00000114UL)
 
#define MXC_R_CTB_SCA_PQX_ADDR   ((uint32_t)0x00000118UL)
 
#define MXC_R_CTB_SCA_PQY_ADDR   ((uint32_t)0x0000011CUL)
 
#define MXC_R_CTB_SCA_PQZ_ADDR   ((uint32_t)0x00000120UL)
 
#define MXC_R_CTB_SCA_RDSA_ADDR   ((uint32_t)0x00000124UL)
 
#define MXC_R_CTB_SCA_RES_ADDR   ((uint32_t)0x00000128UL)
 
#define MXC_R_CTB_SCA_OP_BUFF_ADDR   ((uint32_t)0x0000012CUL)
 
#define MXC_R_CTB_SCA_MODDATA   ((uint32_t)0x00000130UL)
 
#define MXC_R_CTB_SCA_NRNG   ((uint32_t)0x00000134UL)
 
#define MXC_F_CTB_CTRL_RST_POS   0
 
#define MXC_F_CTB_CTRL_RST   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_RST_POS))
 
#define MXC_F_CTB_CTRL_INTR_POS   1
 
#define MXC_F_CTB_CTRL_INTR   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_INTR_POS))
 
#define MXC_F_CTB_CTRL_SRC_POS   2
 
#define MXC_F_CTB_CTRL_SRC   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_SRC_POS))
 
#define MXC_F_CTB_CTRL_BSO_POS   4
 
#define MXC_F_CTB_CTRL_BSO   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_BSO_POS))
 
#define MXC_F_CTB_CTRL_BSI_POS   5
 
#define MXC_F_CTB_CTRL_BSI   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_BSI_POS))
 
#define MXC_F_CTB_CTRL_WAIT_EN_POS   6
 
#define MXC_F_CTB_CTRL_WAIT_EN   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_WAIT_EN_POS))
 
#define MXC_F_CTB_CTRL_WAIT_POL_POS   7
 
#define MXC_F_CTB_CTRL_WAIT_POL   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_WAIT_POL_POS))
 
#define MXC_F_CTB_CTRL_WRSRC_POS   8
 
#define MXC_F_CTB_CTRL_WRSRC   ((uint32_t)(0x3UL << MXC_F_CTB_CTRL_WRSRC_POS))
 
#define MXC_V_CTB_CTRL_WRSRC_NONE   ((uint32_t)0x0UL)
 
#define MXC_S_CTB_CTRL_WRSRC_NONE   (MXC_V_CTB_CTRL_WRSRC_NONE << MXC_F_CTB_CTRL_WRSRC_POS)
 
#define MXC_V_CTB_CTRL_WRSRC_CIPHEROUTPUT   ((uint32_t)0x1UL)
 
#define MXC_S_CTB_CTRL_WRSRC_CIPHEROUTPUT   (MXC_V_CTB_CTRL_WRSRC_CIPHEROUTPUT << MXC_F_CTB_CTRL_WRSRC_POS)
 
#define MXC_V_CTB_CTRL_WRSRC_READFIFO   ((uint32_t)0x2UL)
 
#define MXC_S_CTB_CTRL_WRSRC_READFIFO   (MXC_V_CTB_CTRL_WRSRC_READFIFO << MXC_F_CTB_CTRL_WRSRC_POS)
 
#define MXC_F_CTB_CTRL_RDSRC_POS   10
 
#define MXC_F_CTB_CTRL_RDSRC   ((uint32_t)(0x3UL << MXC_F_CTB_CTRL_RDSRC_POS))
 
#define MXC_V_CTB_CTRL_RDSRC_DMADISABLED   ((uint32_t)0x0UL)
 
#define MXC_S_CTB_CTRL_RDSRC_DMADISABLED   (MXC_V_CTB_CTRL_RDSRC_DMADISABLED << MXC_F_CTB_CTRL_RDSRC_POS)
 
#define MXC_V_CTB_CTRL_RDSRC_DMAORAPB   ((uint32_t)0x1UL)
 
#define MXC_S_CTB_CTRL_RDSRC_DMAORAPB   (MXC_V_CTB_CTRL_RDSRC_DMAORAPB << MXC_F_CTB_CTRL_RDSRC_POS)
 
#define MXC_V_CTB_CTRL_RDSRC_RNG   ((uint32_t)0x2UL)
 
#define MXC_S_CTB_CTRL_RDSRC_RNG   (MXC_V_CTB_CTRL_RDSRC_RNG << MXC_F_CTB_CTRL_RDSRC_POS)
 
#define MXC_F_CTB_CTRL_FLAG_MODE_POS   14
 
#define MXC_F_CTB_CTRL_FLAG_MODE   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_FLAG_MODE_POS))
 
#define MXC_F_CTB_CTRL_DMADNEMSK_POS   15
 
#define MXC_F_CTB_CTRL_DMADNEMSK   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_DMADNEMSK_POS))
 
#define MXC_F_CTB_CTRL_DMA_DONE_POS   24
 
#define MXC_F_CTB_CTRL_DMA_DONE   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_DMA_DONE_POS))
 
#define MXC_F_CTB_CTRL_GLS_DONE_POS   25
 
#define MXC_F_CTB_CTRL_GLS_DONE   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_GLS_DONE_POS))
 
#define MXC_F_CTB_CTRL_HSH_DONE_POS   26
 
#define MXC_F_CTB_CTRL_HSH_DONE   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_HSH_DONE_POS))
 
#define MXC_F_CTB_CTRL_CPH_DONE_POS   27
 
#define MXC_F_CTB_CTRL_CPH_DONE   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_CPH_DONE_POS))
 
#define MXC_F_CTB_CTRL_ERR_POS   29
 
#define MXC_F_CTB_CTRL_ERR   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_ERR_POS))
 
#define MXC_F_CTB_CTRL_RDY_POS   30
 
#define MXC_F_CTB_CTRL_RDY   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_RDY_POS))
 
#define MXC_F_CTB_CTRL_DONE_POS   31
 
#define MXC_F_CTB_CTRL_DONE   ((uint32_t)(0x1UL << MXC_F_CTB_CTRL_DONE_POS))
 
#define MXC_F_CTB_CIPHER_CTRL_ENC_POS   0
 
#define MXC_F_CTB_CIPHER_CTRL_ENC   ((uint32_t)(0x1UL << MXC_F_CTB_CIPHER_CTRL_ENC_POS))
 
#define MXC_F_CTB_CIPHER_CTRL_KEY_POS   1
 
#define MXC_F_CTB_CIPHER_CTRL_KEY   ((uint32_t)(0x1UL << MXC_F_CTB_CIPHER_CTRL_KEY_POS))
 
#define MXC_F_CTB_CIPHER_CTRL_SRC_POS   2
 
#define MXC_F_CTB_CIPHER_CTRL_SRC   ((uint32_t)(0x3UL << MXC_F_CTB_CIPHER_CTRL_SRC_POS))
 
#define MXC_V_CTB_CIPHER_CTRL_SRC_CIPHERKEY   ((uint32_t)0x0UL)
 
#define MXC_S_CTB_CIPHER_CTRL_SRC_CIPHERKEY   (MXC_V_CTB_CIPHER_CTRL_SRC_CIPHERKEY << MXC_F_CTB_CIPHER_CTRL_SRC_POS)
 
#define MXC_V_CTB_CIPHER_CTRL_SRC_REGFILE   ((uint32_t)0x2UL)
 
#define MXC_S_CTB_CIPHER_CTRL_SRC_REGFILE   (MXC_V_CTB_CIPHER_CTRL_SRC_REGFILE << MXC_F_CTB_CIPHER_CTRL_SRC_POS)
 
#define MXC_V_CTB_CIPHER_CTRL_SRC_QSPIKEY_REGFILE   ((uint32_t)0x3UL)
 
#define MXC_S_CTB_CIPHER_CTRL_SRC_QSPIKEY_REGFILE   (MXC_V_CTB_CIPHER_CTRL_SRC_QSPIKEY_REGFILE << MXC_F_CTB_CIPHER_CTRL_SRC_POS)
 
#define MXC_F_CTB_CIPHER_CTRL_CIPHER_POS   4
 
#define MXC_F_CTB_CIPHER_CTRL_CIPHER   ((uint32_t)(0x7UL << MXC_F_CTB_CIPHER_CTRL_CIPHER_POS))
 
#define MXC_V_CTB_CIPHER_CTRL_CIPHER_DIS   ((uint32_t)0x0UL)
 
#define MXC_S_CTB_CIPHER_CTRL_CIPHER_DIS   (MXC_V_CTB_CIPHER_CTRL_CIPHER_DIS << MXC_F_CTB_CIPHER_CTRL_CIPHER_POS)
 
#define MXC_V_CTB_CIPHER_CTRL_CIPHER_AES128   ((uint32_t)0x1UL)
 
#define MXC_S_CTB_CIPHER_CTRL_CIPHER_AES128   (MXC_V_CTB_CIPHER_CTRL_CIPHER_AES128 << MXC_F_CTB_CIPHER_CTRL_CIPHER_POS)
 
#define MXC_V_CTB_CIPHER_CTRL_CIPHER_AES192   ((uint32_t)0x2UL)
 
#define MXC_S_CTB_CIPHER_CTRL_CIPHER_AES192   (MXC_V_CTB_CIPHER_CTRL_CIPHER_AES192 << MXC_F_CTB_CIPHER_CTRL_CIPHER_POS)
 
#define MXC_V_CTB_CIPHER_CTRL_CIPHER_AES256   ((uint32_t)0x3UL)
 
#define MXC_S_CTB_CIPHER_CTRL_CIPHER_AES256   (MXC_V_CTB_CIPHER_CTRL_CIPHER_AES256 << MXC_F_CTB_CIPHER_CTRL_CIPHER_POS)
 
#define MXC_V_CTB_CIPHER_CTRL_CIPHER_DES   ((uint32_t)0x4UL)
 
#define MXC_S_CTB_CIPHER_CTRL_CIPHER_DES   (MXC_V_CTB_CIPHER_CTRL_CIPHER_DES << MXC_F_CTB_CIPHER_CTRL_CIPHER_POS)
 
#define MXC_V_CTB_CIPHER_CTRL_CIPHER_TDES   ((uint32_t)0x5UL)
 
#define MXC_S_CTB_CIPHER_CTRL_CIPHER_TDES   (MXC_V_CTB_CIPHER_CTRL_CIPHER_TDES << MXC_F_CTB_CIPHER_CTRL_CIPHER_POS)
 
#define MXC_F_CTB_CIPHER_CTRL_MODE_POS   8
 
#define MXC_F_CTB_CIPHER_CTRL_MODE   ((uint32_t)(0x7UL << MXC_F_CTB_CIPHER_CTRL_MODE_POS))
 
#define MXC_V_CTB_CIPHER_CTRL_MODE_ECB   ((uint32_t)0x0UL)
 
#define MXC_S_CTB_CIPHER_CTRL_MODE_ECB   (MXC_V_CTB_CIPHER_CTRL_MODE_ECB << MXC_F_CTB_CIPHER_CTRL_MODE_POS)
 
#define MXC_V_CTB_CIPHER_CTRL_MODE_CBC   ((uint32_t)0x1UL)
 
#define MXC_S_CTB_CIPHER_CTRL_MODE_CBC   (MXC_V_CTB_CIPHER_CTRL_MODE_CBC << MXC_F_CTB_CIPHER_CTRL_MODE_POS)
 
#define MXC_V_CTB_CIPHER_CTRL_MODE_CFB   ((uint32_t)0x2UL)
 
#define MXC_S_CTB_CIPHER_CTRL_MODE_CFB   (MXC_V_CTB_CIPHER_CTRL_MODE_CFB << MXC_F_CTB_CIPHER_CTRL_MODE_POS)
 
#define MXC_V_CTB_CIPHER_CTRL_MODE_OFB   ((uint32_t)0x3UL)
 
#define MXC_S_CTB_CIPHER_CTRL_MODE_OFB   (MXC_V_CTB_CIPHER_CTRL_MODE_OFB << MXC_F_CTB_CIPHER_CTRL_MODE_POS)
 
#define MXC_V_CTB_CIPHER_CTRL_MODE_CTR   ((uint32_t)0x4UL)
 
#define MXC_S_CTB_CIPHER_CTRL_MODE_CTR   (MXC_V_CTB_CIPHER_CTRL_MODE_CTR << MXC_F_CTB_CIPHER_CTRL_MODE_POS)
 
#define MXC_F_CTB_CIPHER_CTRL_HVC_POS   11
 
#define MXC_F_CTB_CIPHER_CTRL_HVC   ((uint32_t)(0x1UL << MXC_F_CTB_CIPHER_CTRL_HVC_POS))
 
#define MXC_F_CTB_CIPHER_CTRL_DTYPE_POS   12
 
#define MXC_F_CTB_CIPHER_CTRL_DTYPE   ((uint32_t)(0x1UL << MXC_F_CTB_CIPHER_CTRL_DTYPE_POS))
 
#define MXC_F_CTB_CIPHER_CTRL_CCMM_POS   13
 
#define MXC_F_CTB_CIPHER_CTRL_CCMM   ((uint32_t)(0x7UL << MXC_F_CTB_CIPHER_CTRL_CCMM_POS))
 
#define MXC_F_CTB_CIPHER_CTRL_CCML_POS   16
 
#define MXC_F_CTB_CIPHER_CTRL_CCML   ((uint32_t)(0x7UL << MXC_F_CTB_CIPHER_CTRL_CCML_POS))
 
#define MXC_F_CTB_HASH_CTRL_INIT_POS   0
 
#define MXC_F_CTB_HASH_CTRL_INIT   ((uint32_t)(0x1UL << MXC_F_CTB_HASH_CTRL_INIT_POS))
 
#define MXC_F_CTB_HASH_CTRL_XOR_POS   1
 
#define MXC_F_CTB_HASH_CTRL_XOR   ((uint32_t)(0x1UL << MXC_F_CTB_HASH_CTRL_XOR_POS))
 
#define MXC_F_CTB_HASH_CTRL_HASH_POS   2
 
#define MXC_F_CTB_HASH_CTRL_HASH   ((uint32_t)(0x7UL << MXC_F_CTB_HASH_CTRL_HASH_POS))
 
#define MXC_V_CTB_HASH_CTRL_HASH_DIS   ((uint32_t)0x0UL)
 
#define MXC_S_CTB_HASH_CTRL_HASH_DIS   (MXC_V_CTB_HASH_CTRL_HASH_DIS << MXC_F_CTB_HASH_CTRL_HASH_POS)
 
#define MXC_V_CTB_HASH_CTRL_HASH_SHA1   ((uint32_t)0x1UL)
 
#define MXC_S_CTB_HASH_CTRL_HASH_SHA1   (MXC_V_CTB_HASH_CTRL_HASH_SHA1 << MXC_F_CTB_HASH_CTRL_HASH_POS)
 
#define MXC_V_CTB_HASH_CTRL_HASH_SHA224   ((uint32_t)0x2UL)
 
#define MXC_S_CTB_HASH_CTRL_HASH_SHA224   (MXC_V_CTB_HASH_CTRL_HASH_SHA224 << MXC_F_CTB_HASH_CTRL_HASH_POS)
 
#define MXC_V_CTB_HASH_CTRL_HASH_SHA256   ((uint32_t)0x3UL)
 
#define MXC_S_CTB_HASH_CTRL_HASH_SHA256   (MXC_V_CTB_HASH_CTRL_HASH_SHA256 << MXC_F_CTB_HASH_CTRL_HASH_POS)
 
#define MXC_V_CTB_HASH_CTRL_HASH_SHA384   ((uint32_t)0x4UL)
 
#define MXC_S_CTB_HASH_CTRL_HASH_SHA384   (MXC_V_CTB_HASH_CTRL_HASH_SHA384 << MXC_F_CTB_HASH_CTRL_HASH_POS)
 
#define MXC_V_CTB_HASH_CTRL_HASH_SHA512   ((uint32_t)0x5UL)
 
#define MXC_S_CTB_HASH_CTRL_HASH_SHA512   (MXC_V_CTB_HASH_CTRL_HASH_SHA512 << MXC_F_CTB_HASH_CTRL_HASH_POS)
 
#define MXC_F_CTB_HASH_CTRL_LAST_POS   5
 
#define MXC_F_CTB_HASH_CTRL_LAST   ((uint32_t)(0x1UL << MXC_F_CTB_HASH_CTRL_LAST_POS))
 
#define MXC_F_CTB_CRC_CTRL_CRC_POS   0
 
#define MXC_F_CTB_CRC_CTRL_CRC   ((uint32_t)(0x1UL << MXC_F_CTB_CRC_CTRL_CRC_POS))
 
#define MXC_F_CTB_CRC_CTRL_MSB_POS   1
 
#define MXC_F_CTB_CRC_CTRL_MSB   ((uint32_t)(0x1UL << MXC_F_CTB_CRC_CTRL_MSB_POS))
 
#define MXC_F_CTB_CRC_CTRL_PRNG_POS   2
 
#define MXC_F_CTB_CRC_CTRL_PRNG   ((uint32_t)(0x1UL << MXC_F_CTB_CRC_CTRL_PRNG_POS))
 
#define MXC_F_CTB_CRC_CTRL_ENT_POS   3
 
#define MXC_F_CTB_CRC_CTRL_ENT   ((uint32_t)(0x1UL << MXC_F_CTB_CRC_CTRL_ENT_POS))
 
#define MXC_F_CTB_CRC_CTRL_HAM_POS   4
 
#define MXC_F_CTB_CRC_CTRL_HAM   ((uint32_t)(0x1UL << MXC_F_CTB_CRC_CTRL_HAM_POS))
 
#define MXC_F_CTB_CRC_CTRL_HRST_POS   5
 
#define MXC_F_CTB_CRC_CTRL_HRST   ((uint32_t)(0x1UL << MXC_F_CTB_CRC_CTRL_HRST_POS))
 
#define MXC_F_CTB_DMA_SRC_ADDR_POS   0
 
#define MXC_F_CTB_DMA_SRC_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_DMA_SRC_ADDR_POS))
 
#define MXC_F_CTB_DMA_DEST_ADDR_POS   0
 
#define MXC_F_CTB_DMA_DEST_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_DMA_DEST_ADDR_POS))
 
#define MXC_F_CTB_DMA_CNT_ADDR_POS   0
 
#define MXC_F_CTB_DMA_CNT_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_DMA_CNT_ADDR_POS))
 
#define MXC_F_CTB_DIN_DATA_POS   0
 
#define MXC_F_CTB_DIN_DATA   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_DIN_DATA_POS))
 
#define MXC_F_CTB_DOUT_DATA_POS   0
 
#define MXC_F_CTB_DOUT_DATA   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_DOUT_DATA_POS))
 
#define MXC_F_CTB_CRC_POLY_POLY_POS   0
 
#define MXC_F_CTB_CRC_POLY_POLY   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_CRC_POLY_POLY_POS))
 
#define MXC_F_CTB_CRC_VAL_VAL_POS   0
 
#define MXC_F_CTB_CRC_VAL_VAL   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_CRC_VAL_VAL_POS))
 
#define MXC_F_CTB_HAM_ECC_ECC_POS   0
 
#define MXC_F_CTB_HAM_ECC_ECC   ((uint32_t)(0xFFFFUL << MXC_F_CTB_HAM_ECC_ECC_POS))
 
#define MXC_F_CTB_HAM_ECC_PAR_POS   16
 
#define MXC_F_CTB_HAM_ECC_PAR   ((uint32_t)(0x1UL << MXC_F_CTB_HAM_ECC_PAR_POS))
 
#define MXC_F_CTB_CIPHER_INIT_IVEC_POS   0
 
#define MXC_F_CTB_CIPHER_INIT_IVEC   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_CIPHER_INIT_IVEC_POS))
 
#define MXC_F_CTB_CIPHER_KEY_KEY_POS   0
 
#define MXC_F_CTB_CIPHER_KEY_KEY   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_CIPHER_KEY_KEY_POS))
 
#define MXC_F_CTB_HASH_DIGEST_HASH_POS   0
 
#define MXC_F_CTB_HASH_DIGEST_HASH   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_HASH_DIGEST_HASH_POS))
 
#define MXC_F_CTB_HASH_MSG_SZ_MSGSZ_POS   0
 
#define MXC_F_CTB_HASH_MSG_SZ_MSGSZ   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_HASH_MSG_SZ_MSGSZ_POS))
 
#define MXC_F_CTB_AAD_LENGTH_LENGTH_POS   0
 
#define MXC_F_CTB_AAD_LENGTH_LENGTH   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_AAD_LENGTH_LENGTH_POS))
 
#define MXC_F_CTB_PLD_LENGTH_LENGTH_POS   0
 
#define MXC_F_CTB_PLD_LENGTH_LENGTH   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_PLD_LENGTH_LENGTH_POS))
 
#define MXC_F_CTB_TAGMIC_LENGTH_POS   0
 
#define MXC_F_CTB_TAGMIC_LENGTH   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_TAGMIC_LENGTH_POS))
 
#define MXC_F_CTB_SCA_CTRL0_STC_POS   0
 
#define MXC_F_CTB_SCA_CTRL0_STC   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_CTRL0_STC_POS))
 
#define MXC_F_CTB_SCA_CTRL0_SCAIE_POS   1
 
#define MXC_F_CTB_SCA_CTRL0_SCAIE   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_CTRL0_SCAIE_POS))
 
#define MXC_F_CTB_SCA_CTRL0_ABORT_POS   2
 
#define MXC_F_CTB_SCA_CTRL0_ABORT   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_CTRL0_ABORT_POS))
 
#define MXC_F_CTB_SCA_CTRL0_ERMEM_POS   4
 
#define MXC_F_CTB_SCA_CTRL0_ERMEM   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_CTRL0_ERMEM_POS))
 
#define MXC_F_CTB_SCA_CTRL0_MANPARAM_POS   5
 
#define MXC_F_CTB_SCA_CTRL0_MANPARAM   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_CTRL0_MANPARAM_POS))
 
#define MXC_F_CTB_SCA_CTRL0_HWKEY_POS   6
 
#define MXC_F_CTB_SCA_CTRL0_HWKEY   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_CTRL0_HWKEY_POS))
 
#define MXC_F_CTB_SCA_CTRL0_OPCODE_POS   8
 
#define MXC_F_CTB_SCA_CTRL0_OPCODE   ((uint32_t)(0x1FUL << MXC_F_CTB_SCA_CTRL0_OPCODE_POS))
 
#define MXC_F_CTB_SCA_CTRL0_MODADDR_POS   16
 
#define MXC_F_CTB_SCA_CTRL0_MODADDR   ((uint32_t)(0x1FUL << MXC_F_CTB_SCA_CTRL0_MODADDR_POS))
 
#define MXC_F_CTB_SCA_CTRL0_ECCSIZE_POS   24
 
#define MXC_F_CTB_SCA_CTRL0_ECCSIZE   ((uint32_t)(0x3UL << MXC_F_CTB_SCA_CTRL0_ECCSIZE_POS))
 
#define MXC_F_CTB_SCA_CTRL1_MAN_POS   0
 
#define MXC_F_CTB_SCA_CTRL1_MAN   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_CTRL1_MAN_POS))
 
#define MXC_F_CTB_SCA_CTRL1_AUTOCARRY_POS   1
 
#define MXC_F_CTB_SCA_CTRL1_AUTOCARRY   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_CTRL1_AUTOCARRY_POS))
 
#define MXC_F_CTB_SCA_CTRL1_PLUSONE_POS   2
 
#define MXC_F_CTB_SCA_CTRL1_PLUSONE   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_CTRL1_PLUSONE_POS))
 
#define MXC_F_CTB_SCA_CTRL1_NRNG_POS   5
 
#define MXC_F_CTB_SCA_CTRL1_NRNG   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_CTRL1_NRNG_POS))
 
#define MXC_F_CTB_SCA_CTRL1_CARRYPOS_POS   8
 
#define MXC_F_CTB_SCA_CTRL1_CARRYPOS   ((uint32_t)(0x3FFUL << MXC_F_CTB_SCA_CTRL1_CARRYPOS_POS))
 
#define MXC_F_CTB_SCA_STAT_BUSY_POS   0
 
#define MXC_F_CTB_SCA_STAT_BUSY   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_STAT_BUSY_POS))
 
#define MXC_F_CTB_SCA_STAT_SCAIF_POS   1
 
#define MXC_F_CTB_SCA_STAT_SCAIF   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_STAT_SCAIF_POS))
 
#define MXC_F_CTB_SCA_STAT_PVF1_POS   2
 
#define MXC_F_CTB_SCA_STAT_PVF1   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_STAT_PVF1_POS))
 
#define MXC_F_CTB_SCA_STAT_PVF2_POS   3
 
#define MXC_F_CTB_SCA_STAT_PVF2   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_STAT_PVF2_POS))
 
#define MXC_F_CTB_SCA_STAT_FSMERR_POS   4
 
#define MXC_F_CTB_SCA_STAT_FSMERR   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_STAT_FSMERR_POS))
 
#define MXC_F_CTB_SCA_STAT_COMPERR_POS   5
 
#define MXC_F_CTB_SCA_STAT_COMPERR   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_STAT_COMPERR_POS))
 
#define MXC_F_CTB_SCA_STAT_MEMERR_POS   6
 
#define MXC_F_CTB_SCA_STAT_MEMERR   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_STAT_MEMERR_POS))
 
#define MXC_F_CTB_SCA_STAT_CARRY_POS   8
 
#define MXC_F_CTB_SCA_STAT_CARRY   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_STAT_CARRY_POS))
 
#define MXC_F_CTB_SCA_STAT_GTE2I2_POS   9
 
#define MXC_F_CTB_SCA_STAT_GTE2I2   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_STAT_GTE2I2_POS))
 
#define MXC_F_CTB_SCA_STAT_ALUNEG1_POS   10
 
#define MXC_F_CTB_SCA_STAT_ALUNEG1   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_STAT_ALUNEG1_POS))
 
#define MXC_F_CTB_SCA_STAT_ALUNEG2_POS   11
 
#define MXC_F_CTB_SCA_STAT_ALUNEG2   ((uint32_t)(0x1UL << MXC_F_CTB_SCA_STAT_ALUNEG2_POS))
 
#define MXC_F_CTB_SCA_PPX_ADDR_ADDR_POS   0
 
#define MXC_F_CTB_SCA_PPX_ADDR_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_SCA_PPX_ADDR_ADDR_POS))
 
#define MXC_F_CTB_SCA_PPY_ADDR_ADDR_POS   0
 
#define MXC_F_CTB_SCA_PPY_ADDR_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_SCA_PPY_ADDR_ADDR_POS))
 
#define MXC_F_CTB_SCA_PPZ_ADDR_ADDR_POS   0
 
#define MXC_F_CTB_SCA_PPZ_ADDR_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_SCA_PPZ_ADDR_ADDR_POS))
 
#define MXC_F_CTB_SCA_PQX_ADDR_ADDR_POS   0
 
#define MXC_F_CTB_SCA_PQX_ADDR_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_SCA_PQX_ADDR_ADDR_POS))
 
#define MXC_F_CTB_SCA_PQY_ADDR_ADDR_POS   0
 
#define MXC_F_CTB_SCA_PQY_ADDR_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_SCA_PQY_ADDR_ADDR_POS))
 
#define MXC_F_CTB_SCA_PQZ_ADDR_ADDR_POS   0
 
#define MXC_F_CTB_SCA_PQZ_ADDR_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_SCA_PQZ_ADDR_ADDR_POS))
 
#define MXC_F_CTB_SCA_RDSA_ADDR_ADDR_POS   0
 
#define MXC_F_CTB_SCA_RDSA_ADDR_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_SCA_RDSA_ADDR_ADDR_POS))
 
#define MXC_F_CTB_SCA_RES_ADDR_ADDR_POS   0
 
#define MXC_F_CTB_SCA_RES_ADDR_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_SCA_RES_ADDR_ADDR_POS))
 
#define MXC_F_CTB_SCA_OP_BUFF_ADDR_ADDR_POS   0
 
#define MXC_F_CTB_SCA_OP_BUFF_ADDR_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_SCA_OP_BUFF_ADDR_ADDR_POS))
 
#define MXC_F_CTB_SCA_MODDATA_DATA_POS   0
 
#define MXC_F_CTB_SCA_MODDATA_DATA   ((uint32_t)(0xFFFFFFFFUL << MXC_F_CTB_SCA_MODDATA_DATA_POS))
 

Detailed Description

Registers, Bit Masks and Bit Positions for the CTB Peripheral Module.

Note
This file is @generated.