26#ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32680_DMA_H_
27#define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32680_DMA_H_
31#include "mxc_device.h"
Registers, Bit Masks and Bit Positions for the DMA Peripheral Module.
#define MXC_S_DMA_CTRL_REQUEST_I2C0RX
Definition: dma_regs.h:188
#define MXC_S_DMA_CTRL_TO_CLKDIV_DIV16M
Definition: dma_regs.h:261
#define MXC_S_DMA_CTRL_REQUEST_I2SRX
Definition: dma_regs.h:204
#define MXC_S_DMA_CTRL_REQUEST_UART1TX
Definition: dma_regs.h:210
#define MXC_S_DMA_CTRL_REQUEST_I2STX
Definition: dma_regs.h:228
#define MXC_S_DMA_CTRL_REQUEST_SPI1RX
Definition: dma_regs.h:182
#define MXC_V_DMA_CTRL_PRI_LOW
Definition: dma_regs.h:174
#define MXC_S_DMA_CTRL_REQUEST_SPI0RX
Definition: dma_regs.h:198
#define MXC_V_DMA_CTRL_PRI_HIGH
Definition: dma_regs.h:168
#define MXC_S_DMA_CTRL_REQUEST_UART1RX
Definition: dma_regs.h:186
#define MXC_S_DMA_CTRL_TO_PER_TO256
Definition: dma_regs.h:248
#define MXC_S_DMA_CTRL_TO_PER_TO4
Definition: dma_regs.h:236
#define MXC_S_DMA_CTRL_REQUEST_I2C0TX
Definition: dma_regs.h:212
#define MXC_S_DMA_CTRL_REQUEST_UART2TX
Definition: dma_regs.h:220
#define MXC_V_DMA_CTRL_SRCWD_HALFWORD
Definition: dma_regs.h:267
#define MXC_V_DMA_CTRL_PRI_MEDHIGH
Definition: dma_regs.h:170
#define MXC_S_DMA_CTRL_TO_PER_TO32
Definition: dma_regs.h:242
#define MXC_S_DMA_CTRL_TO_CLKDIV_DIV64K
Definition: dma_regs.h:259
#define MXC_S_DMA_CTRL_REQUEST_MEMTOMEM
Definition: dma_regs.h:180
#define MXC_S_DMA_CTRL_REQUEST_ADC
Definition: dma_regs.h:192
#define MXC_S_DMA_CTRL_REQUEST_UART3RX
Definition: dma_regs.h:202
#define MXC_S_DMA_CTRL_REQUEST_AESTX
Definition: dma_regs.h:224
#define MXC_S_DMA_CTRL_REQUEST_AESRX
Definition: dma_regs.h:200
#define MXC_S_DMA_CTRL_REQUEST_UART3TX
Definition: dma_regs.h:226
#define MXC_S_DMA_CTRL_REQUEST_CRCTX
Definition: dma_regs.h:218
#define MXC_S_DMA_CTRL_REQUEST_I2C1TX
Definition: dma_regs.h:214
#define MXC_S_DMA_CTRL_TO_PER_TO512
Definition: dma_regs.h:250
#define MXC_V_DMA_CTRL_SRCWD_WORD
Definition: dma_regs.h:269
#define MXC_S_DMA_CTRL_REQUEST_UART2RX
Definition: dma_regs.h:196
#define MXC_S_DMA_CTRL_REQUEST_SPI0TX
Definition: dma_regs.h:222
#define MXC_V_DMA_CTRL_PRI_MEDLOW
Definition: dma_regs.h:172
#define MXC_S_DMA_CTRL_REQUEST_UART0TX
Definition: dma_regs.h:208
#define MXC_S_DMA_CTRL_TO_PER_TO64
Definition: dma_regs.h:244
#define MXC_S_DMA_CTRL_REQUEST_I2C2TX
Definition: dma_regs.h:216
#define MXC_S_DMA_CTRL_TO_PER_TO16
Definition: dma_regs.h:240
#define MXC_S_DMA_CTRL_TO_PER_TO128
Definition: dma_regs.h:246
#define MXC_S_DMA_CTRL_REQUEST_I2C2RX
Definition: dma_regs.h:194
#define MXC_S_DMA_CTRL_TO_CLKDIV_DIS
Definition: dma_regs.h:255
#define MXC_S_DMA_CTRL_TO_PER_TO8
Definition: dma_regs.h:238
#define MXC_S_DMA_CTRL_REQUEST_SPI1TX
Definition: dma_regs.h:206
#define MXC_S_DMA_CTRL_REQUEST_UART0RX
Definition: dma_regs.h:184
#define MXC_S_DMA_CTRL_TO_CLKDIV_DIV256
Definition: dma_regs.h:257
#define MXC_S_DMA_CTRL_REQUEST_I2C1RX
Definition: dma_regs.h:190
#define MXC_V_DMA_CTRL_SRCWD_BYTE
Definition: dma_regs.h:265
Definition: dma_regs.h:76
mxc_dma_timeout_t tosel
Number of prescaled clocks seen by the channel before a timeout.
Definition: dma.h:161
int srcinc_en
Whether to increment the source address during the transfer.
Definition: dma.h:136
int ch
The channel to load the configuration data into.
Definition: dma.h:132
unsigned int reqwait_en
Delay the timeout timer start until after first transfer.
Definition: dma.h:160
unsigned int burst_size
Number of bytes moved in a single burst.
Definition: dma.h:163
int dstinc_en
Whether to increment the source address during the transfer.
Definition: dma.h:137
mxc_dma_width_t srcwd
The source width (could be dependent on FIFO width)
Definition: dma.h:134
mxc_dma_priority_t prio
The DMA priority for the channel.
Definition: dma.h:159
void * dest
Pointer to the destination address, if applicable.
Definition: dma.h:147
void * source
Pointer to the source address, if applicable.
Definition: dma.h:146
mxc_dma_width_t dstwd
The destination width (could be dependent on FIFO width)
Definition: dma.h:135
mxc_dma_prescale_t pssel
Prescaler for the timeout timer.
Definition: dma.h:162
mxc_dma_reqsel_t reqsel
The request select line to be used (mem2mem, peripheral)
Definition: dma.h:133
int len
Number of bytes to transfer.
Definition: dma.h:148
int MXC_DMA_GetSrcDst(mxc_dma_srcdst_t *srcdst)
Get channel source, destination, and count for transfer.
int MXC_DMA_ConfigChannel(mxc_dma_config_t config, mxc_dma_srcdst_t srcdst)
Configure the DMA channel.
int MXC_DMA_ChannelClearFlags(int ch, int flags)
Clear channel interrupt flags.
mxc_dma_srcdst_t(* mxc_dma_trans_chain_t)(mxc_dma_srcdst_t dest)
The callback called on completion of a transfer,.
Definition: dma.h:184
int MXC_DMA_SetChannelInterruptEn(int ch, bool chdis, bool ctz)
Set channel interrupt.
int MXC_DMA_SetCallback(int ch, void(*callback)(int, int))
Set channel interrupt callback.
int MXC_DMA_ChannelGetFlags(int ch)
Read channel interrupt flags.
int MXC_DMA_Init(void)
Initialize DMA resources.
int MXC_DMA_SetSrcReload(mxc_dma_srcdst_t srcdstReload)
Set channel reload source, destination, and count for the transfer.
void MXC_DMA_DeInit(void)
De-Initialize DMA resources.
mxc_dma_ch_regs_t * MXC_DMA_GetCHRegs(int ch)
Get a pointer to the DMA channel registers.
int MXC_DMA_Start(int ch)
Start transfer.
int MXC_DMA_ReleaseChannel(int ch)
Release DMA channel.
void MXC_DMA_Handler(void)
Interrupt handler function.
int MXC_DMA_AdvConfigChannel(mxc_dma_adv_config_t advConfig)
Configure the DMA channel with more advanced parameters.
int MXC_DMA_DisableInt(int ch)
Disable channel interrupt.
int MXC_DMA_ChannelDisableInt(int ch, int flags)
Disable channel interrupt.
mxc_dma_width_t
DMA transfer data width.
Definition: dma.h:117
mxc_dma_timeout_t
Enumeration for the DMA timeout value.
Definition: dma.h:105
int MXC_DMA_DoTransfer(mxc_dma_config_t config, mxc_dma_srcdst_t firstSrcDst, mxc_dma_trans_chain_t callback)
Performs a memcpy, using DMA, optionally asynchronous.
mxc_dma_prescale_t
Enumeration for the DMA prescaler.
Definition: dma.h:97
void(* mxc_dma_complete_cb_t)(void *dest)
The callback called on completion of a DMA_MemCpy() transfer.
Definition: dma.h:171
int MXC_DMA_Stop(int ch)
Stop DMA transfer, irrespective of status (complete or in-progress)
mxc_dma_reqsel_t
DMA request select.
Definition: dma.h:58
mxc_dma_priority_t
Enumeration for the DMA Channel's priority level.
Definition: dma.h:50
int MXC_DMA_ChannelEnableInt(int ch, int flags)
Enable channel interrupt.
int MXC_DMA_GetSrcReload(mxc_dma_srcdst_t *srcdstReload)
Get channel reload source, destination, and count for transfer.
int MXC_DMA_AcquireChannel(void)
Request DMA channel.
int MXC_DMA_SetSrcDst(mxc_dma_srcdst_t srcdst)
Set channel source, destination, and count for the transfer.
int MXC_DMA_EnableInt(int ch)
Enable channel interrupt.
int MXC_DMA_MemCpy(void *dest, void *src, int len, mxc_dma_complete_cb_t callback)
Performs a memcpy, using DMA, optionally asynchronous.
@ MXC_DMA_WIDTH_HALFWORD
DMA transfer in 16-bit half-words.
Definition: dma.h:122
@ MXC_DMA_WIDTH_WORD
DMA transfer in 32-bit words.
Definition: dma.h:123
@ MXC_DMA_WIDTH_BYTE
DMA transfer in bytes.
Definition: dma.h:121
@ MXC_DMA_TIMEOUT_8_CLK
DMA timeout of 8 clocks.
Definition: dma.h:107
@ MXC_DMA_TIMEOUT_256_CLK
DMA timeout of 256 clocks.
Definition: dma.h:112
@ MXC_DMA_TIMEOUT_16_CLK
DMA timeout of 16 clocks.
Definition: dma.h:108
@ MXC_DMA_TIMEOUT_512_CLK
DMA timeout of 512 clocks.
Definition: dma.h:113
@ MXC_DMA_TIMEOUT_128_CLK
DMA timeout of 128 clocks.
Definition: dma.h:111
@ MXC_DMA_TIMEOUT_4_CLK
DMA timeout of 4 clocks.
Definition: dma.h:106
@ MXC_DMA_TIMEOUT_32_CLK
DMA timeout of 32 clocks.
Definition: dma.h:109
@ MXC_DMA_TIMEOUT_64_CLK
DMA timeout of 64 clocks.
Definition: dma.h:110
@ MXC_DMA_PRESCALE_DIV256
Divide by 256.
Definition: dma.h:99
@ MXC_DMA_PRESCALE_DIV16M
Divide by 16,777,216.
Definition: dma.h:101
@ MXC_DMA_PRESCALE_DIV64K
Divide by 65,536.
Definition: dma.h:100
@ MXC_DMA_PRESCALE_DISABLE
Prescaler disabled.
Definition: dma.h:98
@ MXC_DMA_REQUEST_SPI1RX
SPI1 Receive DMA Request Selection.
Definition: dma.h:61
@ MXC_DMA_REQUEST_UART0TX
UART0 Transmit DMA Request Selection.
Definition: dma.h:79
@ MXC_DMA_REQUEST_SPI0RX
SPI0 Receive DMA Request Selection.
Definition: dma.h:62
@ MXC_DMA_REQUEST_I2C1RX
I2C1 Receive DMA Request Selection.
Definition: dma.h:68
@ MXC_DMA_REQUEST_CRCTX
CRC Transmit DMA Request Selection */.
Definition: dma.h:87
@ MXC_DMA_REQUEST_UART0RX
UART0 Receive DMA Request Selection.
Definition: dma.h:63
@ MXC_DMA_REQUEST_AESTX
AES Transmit DMA Request Selection.
Definition: dma.h:88
@ MXC_DMA_REQUEST_SPI0TX
SPI0 Transmit DMA Request Selection.
Definition: dma.h:78
@ MXC_DMA_REQUEST_I2C0TX
I2C0 Transmit DMA Request Selection.
Definition: dma.h:83
@ MXC_DMA_REQUEST_I2C0RX
I2C0 Receive DMA Request Selection.
Definition: dma.h:67
@ MXC_DMA_REQUEST_UART2TX
UART2 Transmit DMA Request Selection.
Definition: dma.h:89
@ MXC_DMA_REQUEST_UART3TX
UART3 Transmit DMA Request Selection.
Definition: dma.h:91
@ MXC_DMA_REQUEST_I2C2RX
I2C2 Receive DMA Request Selection.
Definition: dma.h:70
@ MXC_DMA_REQUEST_UART1RX
UART1 Receive DMA Request Selection.
Definition: dma.h:65
@ MXC_DMA_REQUEST_I2C2TX
I2C2 Transmit DMA Request Selection */.
Definition: dma.h:85
@ MXC_DMA_REQUEST_UART2RX
UART2 Receive DMA Request Selection.
Definition: dma.h:72
@ MXC_DMA_REQUEST_UART3RX
UART3 Receive DMA Request Selection.
Definition: dma.h:74
@ MXC_DMA_REQUEST_AESRX
AES Receive DMA Request Selection.
Definition: dma.h:71
@ MXC_DMA_REQUEST_UART1TX
UART1 Transmit DMA Request Selection.
Definition: dma.h:81
@ MXC_DMA_REQUEST_I2SRX
I2S Receive DMA Request Selection.
Definition: dma.h:76
@ MXC_DMA_REQUEST_I2C1TX
I2C1 Transmit DMA Request Selection.
Definition: dma.h:84
@ MXC_DMA_REQUEST_MEMTOMEM
Memory to Memory DMA Request Selection.
Definition: dma.h:59
@ MXC_DMA_REQUEST_ADC
ADC Receive DMA Request Selection.
Definition: dma.h:69
@ MXC_DMA_REQUEST_SPI1TX
SPI1 Transmit DMA Request Selection.
Definition: dma.h:77
@ MXC_DMA_REQUEST_I2STX
I2S Transmit DMA Request Selection.
Definition: dma.h:93
@ MXC_DMA_PRIO_LOW
Low Priority.
Definition: dma.h:54
@ MXC_DMA_PRIO_HIGH
High Priority.
Definition: dma.h:51
@ MXC_DMA_PRIO_MEDLOW
Medium Low Priority.
Definition: dma.h:53
@ MXC_DMA_PRIO_MEDHIGH
Medium High Priority.
Definition: dma.h:52
The advanced configuration options, these are optional but could be needed in cases where multiple DM...
Definition: dma.h:157
The basic configuration information to set up a DMA channel and prepare it for transfers.
Definition: dma.h:131
The information needed to complete a DMA transfer.
Definition: dma.h:144