SEMA_Registers

Modules
	Register Offsets
	SEMA_SEMAPHORES
	SEMA_IRQ0
	SEMA_MAIL0
	SEMA_IRQ1
	SEMA_MAIL1
	SEMA_STATUS

Files
file	sema_regs.h

Data Structures
struct	mxc_sema_regs_t

Detailed Description

Registers, Bit Masks and Bit Positions for the SEMA Peripheral Module.

The Semaphore peripheral allows multiple cores in a system to cooperate when accessing shred resources. The peripheral contains eight semaphores that can be atomically set and cleared. It is left to the discretion of the software architect to decide how and when the semaphores are used and how they are allocated. Existing hardware does not have to be

modified for this type of cooperative sharing, and the use of semaphores is exclusively within the software domain.

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Data Structure Documentation

mxc_sema_regs_t

struct mxc_sema_regs_t

Structure type to access the SEMA Registers.

Data Fields
__IO uint32_t	semaphores [8]
__IO uint32_t	irq0
__IO uint32_t	mail0
__IO uint32_t	irq1
__IO uint32_t	mail1
__IO uint32_t	status

Field Documentation

irq0

__IO uint32_t irq0

0x40: SEMA IRQ0 Register

irq1

__IO uint32_t irq1

0x48: SEMA IRQ1 Register

mail0

__IO uint32_t mail0

0x44: SEMA MAIL0 Register

mail1

__IO uint32_t mail1

0x4C: SEMA MAIL1 Register

semaphores

__IO uint32_t semaphores[8]

0x00: SEMA SEMAPHORES Register

status

__IO uint32_t status

0x100: SEMA STATUS Register