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MAX32690 Peripheral Driver API
Peripheral Driver API for the MAX32690
|
Modules | |
| Register Offsets | |
| MCR_ECCEN | |
| MCR_IPO_MTRIM | |
| MCR_OUTEN | |
| MCR_CMP_CTRL | |
| MCR_CTRL | |
| MCR_GPIO4_CTRL | |
| MCR_CWD0 | |
| MCR_CWD1 | |
| MCR_ADCCFG0 | |
| MCR_ADCCFG1 | |
| MCR_ADCCFG2 | |
| MCR_LDOCTRL | |
Files | |
| file | mcr_regs.h |
Data Structures | |
| struct | mxc_mcr_regs_t |
Registers, Bit Masks and Bit Positions for the MCR Peripheral Module.
Misc Control.
| struct mxc_mcr_regs_t |
Structure type to access the MCR Registers.
Data Fields | |
| __IO uint32_t | eccen |
| __IO uint32_t | ipo_mtrim |
| __IO uint32_t | outen |
| __IO uint32_t | cmp_ctrl |
| __IO uint32_t | ctrl |
| __IO uint32_t | gpio4_ctrl |
| __IO uint32_t | cwd0 |
| __IO uint32_t | cwd1 |
| __IO uint32_t | adccfg0 |
| __IO uint32_t | adccfg1 |
| __IO uint32_t | adccfg2 |
| __IO uint32_t | ldoctrl |
| __IO uint32_t adccfg0 |
0x50: MCR ADCCFG0 Register
| __IO uint32_t adccfg1 |
0x54: MCR ADCCFG1 Register
| __IO uint32_t adccfg2 |
0x58: MCR ADCCFG2 Register
| __IO uint32_t cmp_ctrl |
0x0C: MCR CMP_CTRL Register
| __IO uint32_t ctrl |
0x10: MCR CTRL Register
| __IO uint32_t cwd0 |
0x40: MCR CWD0 Register
| __IO uint32_t cwd1 |
0x44: MCR CWD1 Register
| __IO uint32_t eccen |
0x00: MCR ECCEN Register
| __IO uint32_t gpio4_ctrl |
0x20: MCR GPIO4_CTRL Register
| __IO uint32_t ipo_mtrim |
0x04: MCR IPO_MTRIM Register
| __IO uint32_t ldoctrl |
0x60: MCR LDOCTRL Register
| __IO uint32_t outen |
0x08: MCR OUTEN Register