sdhc_regs.h File Reference

#include <stdint.h>

Go to the source code of this file.

Data Structures
struct	mxc_sdhc_regs_t

Macros
#define	MXC_R_SDHC_SDMA   ((uint32_t)0x00000000UL)
#define	MXC_R_SDHC_BLK_SIZE   ((uint32_t)0x00000004UL)
#define	MXC_R_SDHC_BLK_CNT   ((uint32_t)0x00000006UL)
#define	MXC_R_SDHC_ARG_1   ((uint32_t)0x00000008UL)
#define	MXC_R_SDHC_TRANS   ((uint32_t)0x0000000CUL)
#define	MXC_R_SDHC_CMD   ((uint32_t)0x0000000EUL)
#define	MXC_R_SDHC_RESP   ((uint32_t)0x00000010UL)
#define	MXC_R_SDHC_BUFFER   ((uint32_t)0x00000020UL)
#define	MXC_R_SDHC_PRESENT   ((uint32_t)0x00000024UL)
#define	MXC_R_SDHC_HOST_CN_1   ((uint32_t)0x00000028UL)
#define	MXC_R_SDHC_PWR   ((uint32_t)0x00000029UL)
#define	MXC_R_SDHC_BLK_GAP   ((uint32_t)0x0000002AUL)
#define	MXC_R_SDHC_WAKEUP   ((uint32_t)0x0000002BUL)
#define	MXC_R_SDHC_CLK_CN   ((uint32_t)0x0000002CUL)
#define	MXC_R_SDHC_TO   ((uint32_t)0x0000002EUL)
#define	MXC_R_SDHC_SW_RESET   ((uint32_t)0x0000002FUL)
#define	MXC_R_SDHC_INT_STAT   ((uint32_t)0x00000030UL)
#define	MXC_R_SDHC_ER_INT_STAT   ((uint32_t)0x00000032UL)
#define	MXC_R_SDHC_INT_EN   ((uint32_t)0x00000034UL)
#define	MXC_R_SDHC_ER_INT_EN   ((uint32_t)0x00000036UL)
#define	MXC_R_SDHC_INT_SIGNAL   ((uint32_t)0x00000038UL)
#define	MXC_R_SDHC_ER_INT_SIGNAL   ((uint32_t)0x0000003AUL)
#define	MXC_R_SDHC_AUTO_CMD_ER   ((uint32_t)0x0000003CUL)
#define	MXC_R_SDHC_HOST_CN_2   ((uint32_t)0x0000003EUL)
#define	MXC_R_SDHC_CFG_0   ((uint32_t)0x00000040UL)
#define	MXC_R_SDHC_CFG_1   ((uint32_t)0x00000044UL)
#define	MXC_R_SDHC_MAX_CURR_CFG   ((uint32_t)0x00000048UL)
#define	MXC_R_SDHC_FORCE_CMD   ((uint32_t)0x00000050UL)
#define	MXC_R_SDHC_FORCE_EVENT_INT_STAT   ((uint32_t)0x00000052UL)
#define	MXC_R_SDHC_ADMA_ER   ((uint32_t)0x00000054UL)
#define	MXC_R_SDHC_ADMA_ADDR_0   ((uint32_t)0x00000058UL)
#define	MXC_R_SDHC_ADMA_ADDR_1   ((uint32_t)0x0000005CUL)
#define	MXC_R_SDHC_PRESET_0   ((uint32_t)0x00000060UL)
#define	MXC_R_SDHC_PRESET_1   ((uint32_t)0x00000062UL)
#define	MXC_R_SDHC_PRESET_2   ((uint32_t)0x00000064UL)
#define	MXC_R_SDHC_PRESET_3   ((uint32_t)0x00000066UL)
#define	MXC_R_SDHC_PRESET_4   ((uint32_t)0x00000068UL)
#define	MXC_R_SDHC_PRESET_5   ((uint32_t)0x0000006AUL)
#define	MXC_R_SDHC_PRESET_6   ((uint32_t)0x0000006CUL)
#define	MXC_R_SDHC_PRESET_7   ((uint32_t)0x0000006EUL)
#define	MXC_R_SDHC_SHARED_BUS   ((uint32_t)0x000000E0UL)
#define	MXC_R_SDHC_SLOT_INT   ((uint32_t)0x000000FCUL)
#define	MXC_R_SDHC_HOST_CN_VER   ((uint32_t)0x000000FEUL)
#define	MXC_F_SDHC_SDMA_ADDR_POS   0
#define	MXC_F_SDHC_SDMA_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_SDHC_SDMA_ADDR_POS))
#define	MXC_F_SDHC_BLK_SIZE_TRANS_POS   0
#define	MXC_F_SDHC_BLK_SIZE_TRANS   ((uint16_t)(0xFFFUL << MXC_F_SDHC_BLK_SIZE_TRANS_POS))
#define	MXC_F_SDHC_BLK_SIZE_HOST_BUFF_POS   12
#define	MXC_F_SDHC_BLK_SIZE_HOST_BUFF   ((uint16_t)(0x7UL << MXC_F_SDHC_BLK_SIZE_HOST_BUFF_POS))
#define	MXC_F_SDHC_BLK_CNT_COUNT_POS   0
#define	MXC_F_SDHC_BLK_CNT_COUNT   ((uint16_t)(0xFFFFUL << MXC_F_SDHC_BLK_CNT_COUNT_POS))
#define	MXC_F_SDHC_ARG_1_CMD_POS   0
#define	MXC_F_SDHC_ARG_1_CMD   ((uint32_t)(0xFFFFFFFFUL << MXC_F_SDHC_ARG_1_CMD_POS))
#define	MXC_F_SDHC_TRANS_DMA_EN_POS   0
#define	MXC_F_SDHC_TRANS_DMA_EN   ((uint16_t)(0x1UL << MXC_F_SDHC_TRANS_DMA_EN_POS))
#define	MXC_F_SDHC_TRANS_BLK_CNT_EN_POS   1
#define	MXC_F_SDHC_TRANS_BLK_CNT_EN   ((uint16_t)(0x1UL << MXC_F_SDHC_TRANS_BLK_CNT_EN_POS))
#define	MXC_F_SDHC_TRANS_AUTO_CMD_EN_POS   2
#define	MXC_F_SDHC_TRANS_AUTO_CMD_EN   ((uint16_t)(0x3UL << MXC_F_SDHC_TRANS_AUTO_CMD_EN_POS))
#define	MXC_V_SDHC_TRANS_AUTO_CMD_EN_DISABLE   ((uint16_t)0x0UL)
#define	MXC_S_SDHC_TRANS_AUTO_CMD_EN_DISABLE   (MXC_V_SDHC_TRANS_AUTO_CMD_EN_DISABLE << MXC_F_SDHC_TRANS_AUTO_CMD_EN_POS)
#define	MXC_V_SDHC_TRANS_AUTO_CMD_EN_CMD12   ((uint16_t)0x1UL)
#define	MXC_S_SDHC_TRANS_AUTO_CMD_EN_CMD12   (MXC_V_SDHC_TRANS_AUTO_CMD_EN_CMD12 << MXC_F_SDHC_TRANS_AUTO_CMD_EN_POS)
#define	MXC_V_SDHC_TRANS_AUTO_CMD_EN_CMD23   ((uint16_t)0x2UL)
#define	MXC_S_SDHC_TRANS_AUTO_CMD_EN_CMD23   (MXC_V_SDHC_TRANS_AUTO_CMD_EN_CMD23 << MXC_F_SDHC_TRANS_AUTO_CMD_EN_POS)
#define	MXC_F_SDHC_TRANS_READ_WRITE_POS   4
#define	MXC_F_SDHC_TRANS_READ_WRITE   ((uint16_t)(0x1UL << MXC_F_SDHC_TRANS_READ_WRITE_POS))
#define	MXC_F_SDHC_TRANS_MULTI_POS   5
#define	MXC_F_SDHC_TRANS_MULTI   ((uint16_t)(0x1UL << MXC_F_SDHC_TRANS_MULTI_POS))
#define	MXC_F_SDHC_CMD_RESP_TYPE_POS   0
#define	MXC_F_SDHC_CMD_RESP_TYPE   ((uint16_t)(0x3UL << MXC_F_SDHC_CMD_RESP_TYPE_POS))
#define	MXC_F_SDHC_CMD_CRC_CHK_EN_POS   3
#define	MXC_F_SDHC_CMD_CRC_CHK_EN   ((uint16_t)(0x1UL << MXC_F_SDHC_CMD_CRC_CHK_EN_POS))
#define	MXC_F_SDHC_CMD_IDX_CHK_EN_POS   4
#define	MXC_F_SDHC_CMD_IDX_CHK_EN   ((uint16_t)(0x1UL << MXC_F_SDHC_CMD_IDX_CHK_EN_POS))
#define	MXC_F_SDHC_CMD_DATA_PRES_SEL_POS   5
#define	MXC_F_SDHC_CMD_DATA_PRES_SEL   ((uint16_t)(0x1UL << MXC_F_SDHC_CMD_DATA_PRES_SEL_POS))
#define	MXC_F_SDHC_CMD_TYPE_POS   6
#define	MXC_F_SDHC_CMD_TYPE   ((uint16_t)(0x3UL << MXC_F_SDHC_CMD_TYPE_POS))
#define	MXC_F_SDHC_CMD_IDX_POS   8
#define	MXC_F_SDHC_CMD_IDX   ((uint16_t)(0x3FUL << MXC_F_SDHC_CMD_IDX_POS))
#define	MXC_F_SDHC_RESP_CMD_RESP_POS   0
#define	MXC_F_SDHC_RESP_CMD_RESP   ((uint32_t)(0xFFFFFFFFUL << MXC_F_SDHC_RESP_CMD_RESP_POS))
#define	MXC_F_SDHC_BUFFER_DATA_POS   0
#define	MXC_F_SDHC_BUFFER_DATA   ((uint32_t)(0xFFFFFFFFUL << MXC_F_SDHC_BUFFER_DATA_POS))
#define	MXC_F_SDHC_PRESENT_CMD_POS   0
#define	MXC_F_SDHC_PRESENT_CMD   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_CMD_POS))
#define	MXC_F_SDHC_PRESENT_DAT_POS   1
#define	MXC_F_SDHC_PRESENT_DAT   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_DAT_POS))
#define	MXC_F_SDHC_PRESENT_DAT_LINE_ACTIVE_POS   2
#define	MXC_F_SDHC_PRESENT_DAT_LINE_ACTIVE   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_DAT_LINE_ACTIVE_POS))
#define	MXC_F_SDHC_PRESENT_RETUNING_POS   3
#define	MXC_F_SDHC_PRESENT_RETUNING   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_RETUNING_POS))
#define	MXC_F_SDHC_PRESENT_WRITE_TRANSFER_POS   8
#define	MXC_F_SDHC_PRESENT_WRITE_TRANSFER   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_WRITE_TRANSFER_POS))
#define	MXC_F_SDHC_PRESENT_READ_TRANSFER_POS   9
#define	MXC_F_SDHC_PRESENT_READ_TRANSFER   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_READ_TRANSFER_POS))
#define	MXC_F_SDHC_PRESENT_BUFFER_WRITE_POS   10
#define	MXC_F_SDHC_PRESENT_BUFFER_WRITE   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_BUFFER_WRITE_POS))
#define	MXC_F_SDHC_PRESENT_BUFFER_READ_POS   11
#define	MXC_F_SDHC_PRESENT_BUFFER_READ   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_BUFFER_READ_POS))
#define	MXC_F_SDHC_PRESENT_CARD_INSERTED_POS   16
#define	MXC_F_SDHC_PRESENT_CARD_INSERTED   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_CARD_INSERTED_POS))
#define	MXC_F_SDHC_PRESENT_CARD_STATE_POS   17
#define	MXC_F_SDHC_PRESENT_CARD_STATE   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_CARD_STATE_POS))
#define	MXC_F_SDHC_PRESENT_CARD_DETECT_POS   18
#define	MXC_F_SDHC_PRESENT_CARD_DETECT   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_CARD_DETECT_POS))
#define	MXC_F_SDHC_PRESENT_WP_POS   19
#define	MXC_F_SDHC_PRESENT_WP   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_WP_POS))
#define	MXC_F_SDHC_PRESENT_DAT_SIGNAL_LEVEL_POS   20
#define	MXC_F_SDHC_PRESENT_DAT_SIGNAL_LEVEL   ((uint32_t)(0xFUL << MXC_F_SDHC_PRESENT_DAT_SIGNAL_LEVEL_POS))
#define	MXC_F_SDHC_PRESENT_CMD_SIGNAL_LEVEL_POS   24
#define	MXC_F_SDHC_PRESENT_CMD_SIGNAL_LEVEL   ((uint32_t)(0x1UL << MXC_F_SDHC_PRESENT_CMD_SIGNAL_LEVEL_POS))
#define	MXC_F_SDHC_HOST_CN_1_LED_CN_POS   0
#define	MXC_F_SDHC_HOST_CN_1_LED_CN   ((uint8_t)(0x1UL << MXC_F_SDHC_HOST_CN_1_LED_CN_POS))
#define	MXC_F_SDHC_HOST_CN_1_DATA_TRANSFER_WIDTH_POS   1
#define	MXC_F_SDHC_HOST_CN_1_DATA_TRANSFER_WIDTH   ((uint8_t)(0x1UL << MXC_F_SDHC_HOST_CN_1_DATA_TRANSFER_WIDTH_POS))
#define	MXC_F_SDHC_HOST_CN_1_HS_EN_POS   2
#define	MXC_F_SDHC_HOST_CN_1_HS_EN   ((uint8_t)(0x1UL << MXC_F_SDHC_HOST_CN_1_HS_EN_POS))
#define	MXC_F_SDHC_HOST_CN_1_DMA_SELECT_POS   3
#define	MXC_F_SDHC_HOST_CN_1_DMA_SELECT   ((uint8_t)(0x3UL << MXC_F_SDHC_HOST_CN_1_DMA_SELECT_POS))
#define	MXC_F_SDHC_HOST_CN_1_EXT_DATA_TRANSFER_WIDTH_POS   5
#define	MXC_F_SDHC_HOST_CN_1_EXT_DATA_TRANSFER_WIDTH   ((uint8_t)(0x1UL << MXC_F_SDHC_HOST_CN_1_EXT_DATA_TRANSFER_WIDTH_POS))
#define	MXC_F_SDHC_HOST_CN_1_CARD_DETECT_TEST_POS   6
#define	MXC_F_SDHC_HOST_CN_1_CARD_DETECT_TEST   ((uint8_t)(0x1UL << MXC_F_SDHC_HOST_CN_1_CARD_DETECT_TEST_POS))
#define	MXC_F_SDHC_HOST_CN_1_CARD_DETECT_SIGNAL_POS   7
#define	MXC_F_SDHC_HOST_CN_1_CARD_DETECT_SIGNAL   ((uint8_t)(0x1UL << MXC_F_SDHC_HOST_CN_1_CARD_DETECT_SIGNAL_POS))
#define	MXC_F_SDHC_PWR_BUS_POWER_POS   0
#define	MXC_F_SDHC_PWR_BUS_POWER   ((uint8_t)(0x1UL << MXC_F_SDHC_PWR_BUS_POWER_POS))
#define	MXC_F_SDHC_PWR_BUS_VOLT_SEL_POS   1
#define	MXC_F_SDHC_PWR_BUS_VOLT_SEL   ((uint8_t)(0x7UL << MXC_F_SDHC_PWR_BUS_VOLT_SEL_POS))
#define	MXC_F_SDHC_BLK_GAP_STOP_POS   0
#define	MXC_F_SDHC_BLK_GAP_STOP   ((uint8_t)(0x1UL << MXC_F_SDHC_BLK_GAP_STOP_POS))
#define	MXC_F_SDHC_BLK_GAP_CONT_POS   1
#define	MXC_F_SDHC_BLK_GAP_CONT   ((uint8_t)(0x1UL << MXC_F_SDHC_BLK_GAP_CONT_POS))
#define	MXC_F_SDHC_BLK_GAP_READ_WAIT_POS   2
#define	MXC_F_SDHC_BLK_GAP_READ_WAIT   ((uint8_t)(0x1UL << MXC_F_SDHC_BLK_GAP_READ_WAIT_POS))
#define	MXC_F_SDHC_BLK_GAP_INTR_POS   3
#define	MXC_F_SDHC_BLK_GAP_INTR   ((uint8_t)(0x1UL << MXC_F_SDHC_BLK_GAP_INTR_POS))
#define	MXC_F_SDHC_WAKEUP_CARD_INT_POS   0
#define	MXC_F_SDHC_WAKEUP_CARD_INT   ((uint8_t)(0x1UL << MXC_F_SDHC_WAKEUP_CARD_INT_POS))
#define	MXC_F_SDHC_WAKEUP_CARD_INS_POS   1
#define	MXC_F_SDHC_WAKEUP_CARD_INS   ((uint8_t)(0x1UL << MXC_F_SDHC_WAKEUP_CARD_INS_POS))
#define	MXC_F_SDHC_WAKEUP_CARD_REM_POS   2
#define	MXC_F_SDHC_WAKEUP_CARD_REM   ((uint8_t)(0x1UL << MXC_F_SDHC_WAKEUP_CARD_REM_POS))
#define	MXC_F_SDHC_CLK_CN_INTERNAL_CLK_EN_POS   0
#define	MXC_F_SDHC_CLK_CN_INTERNAL_CLK_EN   ((uint16_t)(0x1UL << MXC_F_SDHC_CLK_CN_INTERNAL_CLK_EN_POS))
#define	MXC_F_SDHC_CLK_CN_INTERNAL_CLK_STABLE_POS   1
#define	MXC_F_SDHC_CLK_CN_INTERNAL_CLK_STABLE   ((uint16_t)(0x1UL << MXC_F_SDHC_CLK_CN_INTERNAL_CLK_STABLE_POS))
#define	MXC_F_SDHC_CLK_CN_SD_CLK_EN_POS   2
#define	MXC_F_SDHC_CLK_CN_SD_CLK_EN   ((uint16_t)(0x1UL << MXC_F_SDHC_CLK_CN_SD_CLK_EN_POS))
#define	MXC_F_SDHC_CLK_CN_CLK_GEN_SEL_POS   5
#define	MXC_F_SDHC_CLK_CN_CLK_GEN_SEL   ((uint16_t)(0x1UL << MXC_F_SDHC_CLK_CN_CLK_GEN_SEL_POS))
#define	MXC_F_SDHC_CLK_CN_UPPER_SDCLK_FREQ_SEL_POS   6
#define	MXC_F_SDHC_CLK_CN_UPPER_SDCLK_FREQ_SEL   ((uint16_t)(0x3UL << MXC_F_SDHC_CLK_CN_UPPER_SDCLK_FREQ_SEL_POS))
#define	MXC_F_SDHC_CLK_CN_SDCLK_FREQ_SEL_POS   8
#define	MXC_F_SDHC_CLK_CN_SDCLK_FREQ_SEL   ((uint16_t)(0xFFUL << MXC_F_SDHC_CLK_CN_SDCLK_FREQ_SEL_POS))
#define	MXC_F_SDHC_TO_DATA_COUNT_VALUE_POS   0
#define	MXC_F_SDHC_TO_DATA_COUNT_VALUE   ((uint8_t)(0x7UL << MXC_F_SDHC_TO_DATA_COUNT_VALUE_POS))
#define	MXC_F_SDHC_SW_RESET_RESET_ALL_POS   0
#define	MXC_F_SDHC_SW_RESET_RESET_ALL   ((uint8_t)(0x1UL << MXC_F_SDHC_SW_RESET_RESET_ALL_POS))
#define	MXC_F_SDHC_SW_RESET_RESET_CMD_POS   1
#define	MXC_F_SDHC_SW_RESET_RESET_CMD   ((uint8_t)(0x1UL << MXC_F_SDHC_SW_RESET_RESET_CMD_POS))
#define	MXC_F_SDHC_SW_RESET_RESET_DAT_POS   2
#define	MXC_F_SDHC_SW_RESET_RESET_DAT   ((uint8_t)(0x1UL << MXC_F_SDHC_SW_RESET_RESET_DAT_POS))
#define	MXC_F_SDHC_INT_STAT_CMD_COMP_POS   0
#define	MXC_F_SDHC_INT_STAT_CMD_COMP   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_STAT_CMD_COMP_POS))
#define	MXC_F_SDHC_INT_STAT_TRANS_COMP_POS   1
#define	MXC_F_SDHC_INT_STAT_TRANS_COMP   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_STAT_TRANS_COMP_POS))
#define	MXC_F_SDHC_INT_STAT_BLK_GAP_EVENT_POS   2
#define	MXC_F_SDHC_INT_STAT_BLK_GAP_EVENT   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_STAT_BLK_GAP_EVENT_POS))
#define	MXC_F_SDHC_INT_STAT_DMA_POS   3
#define	MXC_F_SDHC_INT_STAT_DMA   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_STAT_DMA_POS))
#define	MXC_F_SDHC_INT_STAT_BUFF_WR_READY_POS   4
#define	MXC_F_SDHC_INT_STAT_BUFF_WR_READY   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_STAT_BUFF_WR_READY_POS))
#define	MXC_F_SDHC_INT_STAT_BUFF_RD_READY_POS   5
#define	MXC_F_SDHC_INT_STAT_BUFF_RD_READY   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_STAT_BUFF_RD_READY_POS))
#define	MXC_F_SDHC_INT_STAT_CARD_INSERTION_POS   6
#define	MXC_F_SDHC_INT_STAT_CARD_INSERTION   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_STAT_CARD_INSERTION_POS))
#define	MXC_F_SDHC_INT_STAT_CARD_REMOVAL_POS   7
#define	MXC_F_SDHC_INT_STAT_CARD_REMOVAL   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_STAT_CARD_REMOVAL_POS))
#define	MXC_F_SDHC_INT_STAT_CARD_INTR_POS   8
#define	MXC_F_SDHC_INT_STAT_CARD_INTR   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_STAT_CARD_INTR_POS))
#define	MXC_F_SDHC_INT_STAT_RETUNING_POS   12
#define	MXC_F_SDHC_INT_STAT_RETUNING   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_STAT_RETUNING_POS))
#define	MXC_F_SDHC_INT_STAT_ERR_INTR_POS   15
#define	MXC_F_SDHC_INT_STAT_ERR_INTR   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_STAT_ERR_INTR_POS))
#define	MXC_F_SDHC_ER_INT_STAT_CMD_TO_POS   0
#define	MXC_F_SDHC_ER_INT_STAT_CMD_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_STAT_CMD_TO_POS))
#define	MXC_F_SDHC_ER_INT_STAT_CMD_CRC_POS   1
#define	MXC_F_SDHC_ER_INT_STAT_CMD_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_STAT_CMD_CRC_POS))
#define	MXC_F_SDHC_ER_INT_STAT_CMD_END_BIT_POS   2
#define	MXC_F_SDHC_ER_INT_STAT_CMD_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_STAT_CMD_END_BIT_POS))
#define	MXC_F_SDHC_ER_INT_STAT_CMD_IDX_POS   3
#define	MXC_F_SDHC_ER_INT_STAT_CMD_IDX   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_STAT_CMD_IDX_POS))
#define	MXC_F_SDHC_ER_INT_STAT_DATA_TO_POS   4
#define	MXC_F_SDHC_ER_INT_STAT_DATA_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_STAT_DATA_TO_POS))
#define	MXC_F_SDHC_ER_INT_STAT_DATA_CRC_POS   5
#define	MXC_F_SDHC_ER_INT_STAT_DATA_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_STAT_DATA_CRC_POS))
#define	MXC_F_SDHC_ER_INT_STAT_DATA_END_BIT_POS   6
#define	MXC_F_SDHC_ER_INT_STAT_DATA_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_STAT_DATA_END_BIT_POS))
#define	MXC_F_SDHC_ER_INT_STAT_CURRENT_LIMIT_POS   7
#define	MXC_F_SDHC_ER_INT_STAT_CURRENT_LIMIT   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_STAT_CURRENT_LIMIT_POS))
#define	MXC_F_SDHC_ER_INT_STAT_AUTO_CMD_12_POS   8
#define	MXC_F_SDHC_ER_INT_STAT_AUTO_CMD_12   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_STAT_AUTO_CMD_12_POS))
#define	MXC_F_SDHC_ER_INT_STAT_ADMA_POS   9
#define	MXC_F_SDHC_ER_INT_STAT_ADMA   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_STAT_ADMA_POS))
#define	MXC_F_SDHC_ER_INT_STAT_DMA_POS   12
#define	MXC_F_SDHC_ER_INT_STAT_DMA   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_STAT_DMA_POS))
#define	MXC_F_SDHC_INT_EN_CMD_COMP_POS   0
#define	MXC_F_SDHC_INT_EN_CMD_COMP   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_EN_CMD_COMP_POS))
#define	MXC_F_SDHC_INT_EN_TRANS_COMP_POS   1
#define	MXC_F_SDHC_INT_EN_TRANS_COMP   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_EN_TRANS_COMP_POS))
#define	MXC_F_SDHC_INT_EN_BLK_GAP_POS   2
#define	MXC_F_SDHC_INT_EN_BLK_GAP   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_EN_BLK_GAP_POS))
#define	MXC_F_SDHC_INT_EN_DMA_POS   3
#define	MXC_F_SDHC_INT_EN_DMA   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_EN_DMA_POS))
#define	MXC_F_SDHC_INT_EN_BUFFER_WR_POS   4
#define	MXC_F_SDHC_INT_EN_BUFFER_WR   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_EN_BUFFER_WR_POS))
#define	MXC_F_SDHC_INT_EN_BUFFER_RD_POS   5
#define	MXC_F_SDHC_INT_EN_BUFFER_RD   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_EN_BUFFER_RD_POS))
#define	MXC_F_SDHC_INT_EN_CARD_INSERT_POS   6
#define	MXC_F_SDHC_INT_EN_CARD_INSERT   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_EN_CARD_INSERT_POS))
#define	MXC_F_SDHC_INT_EN_CARD_REMOVAL_POS   7
#define	MXC_F_SDHC_INT_EN_CARD_REMOVAL   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_EN_CARD_REMOVAL_POS))
#define	MXC_F_SDHC_INT_EN_CARD_INT_POS   8
#define	MXC_F_SDHC_INT_EN_CARD_INT   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_EN_CARD_INT_POS))
#define	MXC_F_SDHC_INT_EN_RETUNING_POS   12
#define	MXC_F_SDHC_INT_EN_RETUNING   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_EN_RETUNING_POS))
#define	MXC_F_SDHC_ER_INT_EN_CMD_TO_POS   0
#define	MXC_F_SDHC_ER_INT_EN_CMD_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_EN_CMD_TO_POS))
#define	MXC_F_SDHC_ER_INT_EN_CMD_CRC_POS   1
#define	MXC_F_SDHC_ER_INT_EN_CMD_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_EN_CMD_CRC_POS))
#define	MXC_F_SDHC_ER_INT_EN_CMD_END_BIT_POS   2
#define	MXC_F_SDHC_ER_INT_EN_CMD_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_EN_CMD_END_BIT_POS))
#define	MXC_F_SDHC_ER_INT_EN_CMD_IDX_POS   3
#define	MXC_F_SDHC_ER_INT_EN_CMD_IDX   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_EN_CMD_IDX_POS))
#define	MXC_F_SDHC_ER_INT_EN_DATA_TO_POS   4
#define	MXC_F_SDHC_ER_INT_EN_DATA_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_EN_DATA_TO_POS))
#define	MXC_F_SDHC_ER_INT_EN_DATA_CRC_POS   5
#define	MXC_F_SDHC_ER_INT_EN_DATA_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_EN_DATA_CRC_POS))
#define	MXC_F_SDHC_ER_INT_EN_DATA_END_BIT_POS   6
#define	MXC_F_SDHC_ER_INT_EN_DATA_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_EN_DATA_END_BIT_POS))
#define	MXC_F_SDHC_ER_INT_EN_AUTO_CMD_POS   8
#define	MXC_F_SDHC_ER_INT_EN_AUTO_CMD   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_EN_AUTO_CMD_POS))
#define	MXC_F_SDHC_ER_INT_EN_ADMA_POS   9
#define	MXC_F_SDHC_ER_INT_EN_ADMA   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_EN_ADMA_POS))
#define	MXC_F_SDHC_ER_INT_EN_TUNING_POS   10
#define	MXC_F_SDHC_ER_INT_EN_TUNING   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_EN_TUNING_POS))
#define	MXC_F_SDHC_ER_INT_EN_VENDOR_POS   12
#define	MXC_F_SDHC_ER_INT_EN_VENDOR   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_EN_VENDOR_POS))
#define	MXC_F_SDHC_INT_SIGNAL_CMD_COMP_POS   0
#define	MXC_F_SDHC_INT_SIGNAL_CMD_COMP   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_SIGNAL_CMD_COMP_POS))
#define	MXC_F_SDHC_INT_SIGNAL_TRANS_COMP_POS   1
#define	MXC_F_SDHC_INT_SIGNAL_TRANS_COMP   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_SIGNAL_TRANS_COMP_POS))
#define	MXC_F_SDHC_INT_SIGNAL_BLK_GAP_POS   2
#define	MXC_F_SDHC_INT_SIGNAL_BLK_GAP   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_SIGNAL_BLK_GAP_POS))
#define	MXC_F_SDHC_INT_SIGNAL_DMA_POS   3
#define	MXC_F_SDHC_INT_SIGNAL_DMA   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_SIGNAL_DMA_POS))
#define	MXC_F_SDHC_INT_SIGNAL_BUFFER_WR_POS   4
#define	MXC_F_SDHC_INT_SIGNAL_BUFFER_WR   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_SIGNAL_BUFFER_WR_POS))
#define	MXC_F_SDHC_INT_SIGNAL_BUFFER_RD_POS   5
#define	MXC_F_SDHC_INT_SIGNAL_BUFFER_RD   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_SIGNAL_BUFFER_RD_POS))
#define	MXC_F_SDHC_INT_SIGNAL_CARD_INSERT_POS   6
#define	MXC_F_SDHC_INT_SIGNAL_CARD_INSERT   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_SIGNAL_CARD_INSERT_POS))
#define	MXC_F_SDHC_INT_SIGNAL_CARD_REMOVAL_POS   7
#define	MXC_F_SDHC_INT_SIGNAL_CARD_REMOVAL   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_SIGNAL_CARD_REMOVAL_POS))
#define	MXC_F_SDHC_INT_SIGNAL_CARD_INT_POS   8
#define	MXC_F_SDHC_INT_SIGNAL_CARD_INT   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_SIGNAL_CARD_INT_POS))
#define	MXC_F_SDHC_INT_SIGNAL_RETUNING_POS   12
#define	MXC_F_SDHC_INT_SIGNAL_RETUNING   ((uint16_t)(0x1UL << MXC_F_SDHC_INT_SIGNAL_RETUNING_POS))
#define	MXC_F_SDHC_ER_INT_SIGNAL_CMD_TO_POS   0
#define	MXC_F_SDHC_ER_INT_SIGNAL_CMD_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_SIGNAL_CMD_TO_POS))
#define	MXC_F_SDHC_ER_INT_SIGNAL_CMD_CRC_POS   1
#define	MXC_F_SDHC_ER_INT_SIGNAL_CMD_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_SIGNAL_CMD_CRC_POS))
#define	MXC_F_SDHC_ER_INT_SIGNAL_CMD_END_BIT_POS   2
#define	MXC_F_SDHC_ER_INT_SIGNAL_CMD_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_SIGNAL_CMD_END_BIT_POS))
#define	MXC_F_SDHC_ER_INT_SIGNAL_CMD_IDX_POS   3
#define	MXC_F_SDHC_ER_INT_SIGNAL_CMD_IDX   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_SIGNAL_CMD_IDX_POS))
#define	MXC_F_SDHC_ER_INT_SIGNAL_DATA_TO_POS   4
#define	MXC_F_SDHC_ER_INT_SIGNAL_DATA_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_SIGNAL_DATA_TO_POS))
#define	MXC_F_SDHC_ER_INT_SIGNAL_DATA_CRC_POS   5
#define	MXC_F_SDHC_ER_INT_SIGNAL_DATA_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_SIGNAL_DATA_CRC_POS))
#define	MXC_F_SDHC_ER_INT_SIGNAL_DATA_END_BIT_POS   6
#define	MXC_F_SDHC_ER_INT_SIGNAL_DATA_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_SIGNAL_DATA_END_BIT_POS))
#define	MXC_F_SDHC_ER_INT_SIGNAL_CURR_LIM_POS   7
#define	MXC_F_SDHC_ER_INT_SIGNAL_CURR_LIM   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_SIGNAL_CURR_LIM_POS))
#define	MXC_F_SDHC_ER_INT_SIGNAL_AUTO_CMD_POS   8
#define	MXC_F_SDHC_ER_INT_SIGNAL_AUTO_CMD   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_SIGNAL_AUTO_CMD_POS))
#define	MXC_F_SDHC_ER_INT_SIGNAL_ADMA_POS   9
#define	MXC_F_SDHC_ER_INT_SIGNAL_ADMA   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_SIGNAL_ADMA_POS))
#define	MXC_F_SDHC_ER_INT_SIGNAL_TUNING_POS   10
#define	MXC_F_SDHC_ER_INT_SIGNAL_TUNING   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_SIGNAL_TUNING_POS))
#define	MXC_F_SDHC_ER_INT_SIGNAL_TAR_RESP_POS   12
#define	MXC_F_SDHC_ER_INT_SIGNAL_TAR_RESP   ((uint16_t)(0x1UL << MXC_F_SDHC_ER_INT_SIGNAL_TAR_RESP_POS))
#define	MXC_F_SDHC_AUTO_CMD_ER_NOT_EXCUTED_POS   0
#define	MXC_F_SDHC_AUTO_CMD_ER_NOT_EXCUTED   ((uint16_t)(0x1UL << MXC_F_SDHC_AUTO_CMD_ER_NOT_EXCUTED_POS))
#define	MXC_F_SDHC_AUTO_CMD_ER_TO_POS   1
#define	MXC_F_SDHC_AUTO_CMD_ER_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_AUTO_CMD_ER_TO_POS))
#define	MXC_F_SDHC_AUTO_CMD_ER_CRC_POS   2
#define	MXC_F_SDHC_AUTO_CMD_ER_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_AUTO_CMD_ER_CRC_POS))
#define	MXC_F_SDHC_AUTO_CMD_ER_END_BIT_POS   3
#define	MXC_F_SDHC_AUTO_CMD_ER_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_AUTO_CMD_ER_END_BIT_POS))
#define	MXC_F_SDHC_AUTO_CMD_ER_INDEX_POS   4
#define	MXC_F_SDHC_AUTO_CMD_ER_INDEX   ((uint16_t)(0x1UL << MXC_F_SDHC_AUTO_CMD_ER_INDEX_POS))
#define	MXC_F_SDHC_AUTO_CMD_ER_NOT_ISSUED_POS   7
#define	MXC_F_SDHC_AUTO_CMD_ER_NOT_ISSUED   ((uint16_t)(0x1UL << MXC_F_SDHC_AUTO_CMD_ER_NOT_ISSUED_POS))
#define	MXC_F_SDHC_HOST_CN_2_UHS_POS   0
#define	MXC_F_SDHC_HOST_CN_2_UHS   ((uint16_t)(0x3UL << MXC_F_SDHC_HOST_CN_2_UHS_POS))
#define	MXC_F_SDHC_HOST_CN_2_SIGNAL_V1_8_POS   3
#define	MXC_F_SDHC_HOST_CN_2_SIGNAL_V1_8   ((uint16_t)(0x1UL << MXC_F_SDHC_HOST_CN_2_SIGNAL_V1_8_POS))
#define	MXC_F_SDHC_HOST_CN_2_DRIVER_STRENGTH_POS   4
#define	MXC_F_SDHC_HOST_CN_2_DRIVER_STRENGTH   ((uint16_t)(0x3UL << MXC_F_SDHC_HOST_CN_2_DRIVER_STRENGTH_POS))
#define	MXC_F_SDHC_HOST_CN_2_EXCUTE_POS   6
#define	MXC_F_SDHC_HOST_CN_2_EXCUTE   ((uint16_t)(0x1UL << MXC_F_SDHC_HOST_CN_2_EXCUTE_POS))
#define	MXC_F_SDHC_HOST_CN_2_SAMPLING_CLK_POS   7
#define	MXC_F_SDHC_HOST_CN_2_SAMPLING_CLK   ((uint16_t)(0x1UL << MXC_F_SDHC_HOST_CN_2_SAMPLING_CLK_POS))
#define	MXC_F_SDHC_HOST_CN_2_ASYNCH_INT_POS   14
#define	MXC_F_SDHC_HOST_CN_2_ASYNCH_INT   ((uint16_t)(0x1UL << MXC_F_SDHC_HOST_CN_2_ASYNCH_INT_POS))
#define	MXC_F_SDHC_HOST_CN_2_PRESET_VAL_EN_POS   15
#define	MXC_F_SDHC_HOST_CN_2_PRESET_VAL_EN   ((uint16_t)(0x1UL << MXC_F_SDHC_HOST_CN_2_PRESET_VAL_EN_POS))
#define	MXC_F_SDHC_CFG_0_TO_CLK_FREQ_POS   0
#define	MXC_F_SDHC_CFG_0_TO_CLK_FREQ   ((uint32_t)(0x3FUL << MXC_F_SDHC_CFG_0_TO_CLK_FREQ_POS))
#define	MXC_F_SDHC_CFG_0_TO_CLK_UNIT_POS   7
#define	MXC_F_SDHC_CFG_0_TO_CLK_UNIT   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_0_TO_CLK_UNIT_POS))
#define	MXC_F_SDHC_CFG_0_CLK_FREQ_POS   8
#define	MXC_F_SDHC_CFG_0_CLK_FREQ   ((uint32_t)(0xFFUL << MXC_F_SDHC_CFG_0_CLK_FREQ_POS))
#define	MXC_F_SDHC_CFG_0_MAX_BLK_LEN_POS   16
#define	MXC_F_SDHC_CFG_0_MAX_BLK_LEN   ((uint32_t)(0x3UL << MXC_F_SDHC_CFG_0_MAX_BLK_LEN_POS))
#define	MXC_F_SDHC_CFG_0_BIT_8_POS   18
#define	MXC_F_SDHC_CFG_0_BIT_8   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_0_BIT_8_POS))
#define	MXC_F_SDHC_CFG_0_ADMA2_POS   19
#define	MXC_F_SDHC_CFG_0_ADMA2   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_0_ADMA2_POS))
#define	MXC_F_SDHC_CFG_0_HS_POS   21
#define	MXC_F_SDHC_CFG_0_HS   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_0_HS_POS))
#define	MXC_F_SDHC_CFG_0_SDMA_POS   22
#define	MXC_F_SDHC_CFG_0_SDMA   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_0_SDMA_POS))
#define	MXC_F_SDHC_CFG_0_SUSPEND_POS   23
#define	MXC_F_SDHC_CFG_0_SUSPEND   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_0_SUSPEND_POS))
#define	MXC_F_SDHC_CFG_0_V3_3_POS   24
#define	MXC_F_SDHC_CFG_0_V3_3   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_0_V3_3_POS))
#define	MXC_F_SDHC_CFG_0_V3_0_POS   25
#define	MXC_F_SDHC_CFG_0_V3_0   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_0_V3_0_POS))
#define	MXC_F_SDHC_CFG_0_V1_8_POS   26
#define	MXC_F_SDHC_CFG_0_V1_8   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_0_V1_8_POS))
#define	MXC_F_SDHC_CFG_0_BIT_64_SYS_BUS_POS   28
#define	MXC_F_SDHC_CFG_0_BIT_64_SYS_BUS   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_0_BIT_64_SYS_BUS_POS))
#define	MXC_F_SDHC_CFG_0_ASYNC_INT_POS   29
#define	MXC_F_SDHC_CFG_0_ASYNC_INT   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_0_ASYNC_INT_POS))
#define	MXC_F_SDHC_CFG_0_SLOT_TYPE_POS   30
#define	MXC_F_SDHC_CFG_0_SLOT_TYPE   ((uint32_t)(0x3UL << MXC_F_SDHC_CFG_0_SLOT_TYPE_POS))
#define	MXC_F_SDHC_CFG_1_SDR50_POS   0
#define	MXC_F_SDHC_CFG_1_SDR50   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_1_SDR50_POS))
#define	MXC_F_SDHC_CFG_1_SDR104_POS   1
#define	MXC_F_SDHC_CFG_1_SDR104   ((uint32_t)(0x0UL << MXC_F_SDHC_CFG_1_SDR104_POS))
#define	MXC_F_SDHC_CFG_1_DDR50_POS   2
#define	MXC_F_SDHC_CFG_1_DDR50   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_1_DDR50_POS))
#define	MXC_F_SDHC_CFG_1_DRIVER_A_POS   4
#define	MXC_F_SDHC_CFG_1_DRIVER_A   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_1_DRIVER_A_POS))
#define	MXC_F_SDHC_CFG_1_DRIVER_C_POS   5
#define	MXC_F_SDHC_CFG_1_DRIVER_C   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_1_DRIVER_C_POS))
#define	MXC_F_SDHC_CFG_1_DRIVER_D_POS   6
#define	MXC_F_SDHC_CFG_1_DRIVER_D   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_1_DRIVER_D_POS))
#define	MXC_F_SDHC_CFG_1_TIMER_CNT_TUNING_POS   8
#define	MXC_F_SDHC_CFG_1_TIMER_CNT_TUNING   ((uint32_t)(0xFUL << MXC_F_SDHC_CFG_1_TIMER_CNT_TUNING_POS))
#define	MXC_F_SDHC_CFG_1_TUNING_SDR50_POS   13
#define	MXC_F_SDHC_CFG_1_TUNING_SDR50   ((uint32_t)(0x1UL << MXC_F_SDHC_CFG_1_TUNING_SDR50_POS))
#define	MXC_F_SDHC_CFG_1_RETUNING_POS   14
#define	MXC_F_SDHC_CFG_1_RETUNING   ((uint32_t)(0x3UL << MXC_F_SDHC_CFG_1_RETUNING_POS))
#define	MXC_F_SDHC_CFG_1_CLK_MULTI_POS   16
#define	MXC_F_SDHC_CFG_1_CLK_MULTI   ((uint32_t)(0xFFUL << MXC_F_SDHC_CFG_1_CLK_MULTI_POS))
#define	MXC_F_SDHC_MAX_CURR_CFG_V3_3_POS   0
#define	MXC_F_SDHC_MAX_CURR_CFG_V3_3   ((uint32_t)(0xFFUL << MXC_F_SDHC_MAX_CURR_CFG_V3_3_POS))
#define	MXC_F_SDHC_MAX_CURR_CFG_V3_0_POS   8
#define	MXC_F_SDHC_MAX_CURR_CFG_V3_0   ((uint32_t)(0xFFUL << MXC_F_SDHC_MAX_CURR_CFG_V3_0_POS))
#define	MXC_F_SDHC_MAX_CURR_CFG_V1_8_POS   16
#define	MXC_F_SDHC_MAX_CURR_CFG_V1_8   ((uint32_t)(0xFFUL << MXC_F_SDHC_MAX_CURR_CFG_V1_8_POS))
#define	MXC_F_SDHC_FORCE_CMD_NOT_EXCU_POS   0
#define	MXC_F_SDHC_FORCE_CMD_NOT_EXCU   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_CMD_NOT_EXCU_POS))
#define	MXC_F_SDHC_FORCE_CMD_TO_POS   1
#define	MXC_F_SDHC_FORCE_CMD_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_CMD_TO_POS))
#define	MXC_F_SDHC_FORCE_CMD_CRC_POS   2
#define	MXC_F_SDHC_FORCE_CMD_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_CMD_CRC_POS))
#define	MXC_F_SDHC_FORCE_CMD_END_BIT_POS   3
#define	MXC_F_SDHC_FORCE_CMD_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_CMD_END_BIT_POS))
#define	MXC_F_SDHC_FORCE_CMD_INDEX_POS   4
#define	MXC_F_SDHC_FORCE_CMD_INDEX   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_CMD_INDEX_POS))
#define	MXC_F_SDHC_FORCE_CMD_NOT_ISSUED_POS   7
#define	MXC_F_SDHC_FORCE_CMD_NOT_ISSUED   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_CMD_NOT_ISSUED_POS))
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO_POS   0
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO_POS))
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC_POS   1
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC_POS))
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT_POS   2
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT_POS))
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX_POS   3
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX_POS))
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO_POS   4
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO_POS))
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC_POS   5
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC_POS))
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT_POS   6
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT_POS))
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT_POS   7
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT_POS))
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD_POS   8
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD_POS))
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA_POS   9
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA_POS))
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR_POS   12
#define	MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR   ((uint16_t)(0x7UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR_POS))
#define	MXC_F_SDHC_ADMA_ER_STATE_POS   0
#define	MXC_F_SDHC_ADMA_ER_STATE   ((uint8_t)(0x3UL << MXC_F_SDHC_ADMA_ER_STATE_POS))
#define	MXC_F_SDHC_ADMA_ER_LEN_MISMATCH_POS   2
#define	MXC_F_SDHC_ADMA_ER_LEN_MISMATCH   ((uint8_t)(0x1UL << MXC_F_SDHC_ADMA_ER_LEN_MISMATCH_POS))
#define	MXC_F_SDHC_ADMA_ADDR_0_ADDR_POS   0
#define	MXC_F_SDHC_ADMA_ADDR_0_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_SDHC_ADMA_ADDR_0_ADDR_POS))
#define	MXC_F_SDHC_ADMA_ADDR_1_ADDR_POS   0
#define	MXC_F_SDHC_ADMA_ADDR_1_ADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_SDHC_ADMA_ADDR_1_ADDR_POS))
#define	MXC_F_SDHC_PRESET_0_SDCLK_FREQ_POS   0
#define	MXC_F_SDHC_PRESET_0_SDCLK_FREQ   ((uint16_t)(0x3FFUL << MXC_F_SDHC_PRESET_0_SDCLK_FREQ_POS))
#define	MXC_F_SDHC_PRESET_0_CLK_GEN_POS   10
#define	MXC_F_SDHC_PRESET_0_CLK_GEN   ((uint16_t)(0x1UL << MXC_F_SDHC_PRESET_0_CLK_GEN_POS))
#define	MXC_F_SDHC_PRESET_0_DRIVER_STRENGTH_POS   14
#define	MXC_F_SDHC_PRESET_0_DRIVER_STRENGTH   ((uint16_t)(0x3UL << MXC_F_SDHC_PRESET_0_DRIVER_STRENGTH_POS))
#define	MXC_F_SDHC_PRESET_1_SDCLK_FREQ_POS   0
#define	MXC_F_SDHC_PRESET_1_SDCLK_FREQ   ((uint16_t)(0x3FFUL << MXC_F_SDHC_PRESET_1_SDCLK_FREQ_POS))
#define	MXC_F_SDHC_PRESET_1_CLK_GEN_POS   10
#define	MXC_F_SDHC_PRESET_1_CLK_GEN   ((uint16_t)(0x1UL << MXC_F_SDHC_PRESET_1_CLK_GEN_POS))
#define	MXC_F_SDHC_PRESET_1_DRIVER_STRENGTH_POS   14
#define	MXC_F_SDHC_PRESET_1_DRIVER_STRENGTH   ((uint16_t)(0x3UL << MXC_F_SDHC_PRESET_1_DRIVER_STRENGTH_POS))
#define	MXC_F_SDHC_PRESET_2_SDCLK_FREQ_POS   0
#define	MXC_F_SDHC_PRESET_2_SDCLK_FREQ   ((uint16_t)(0x3FFUL << MXC_F_SDHC_PRESET_2_SDCLK_FREQ_POS))
#define	MXC_F_SDHC_PRESET_2_CLK_GEN_POS   10
#define	MXC_F_SDHC_PRESET_2_CLK_GEN   ((uint16_t)(0x1UL << MXC_F_SDHC_PRESET_2_CLK_GEN_POS))
#define	MXC_F_SDHC_PRESET_2_DRIVER_STRENGTH_POS   14
#define	MXC_F_SDHC_PRESET_2_DRIVER_STRENGTH   ((uint16_t)(0x3UL << MXC_F_SDHC_PRESET_2_DRIVER_STRENGTH_POS))
#define	MXC_F_SDHC_PRESET_3_SDCLK_FREQ_POS   0
#define	MXC_F_SDHC_PRESET_3_SDCLK_FREQ   ((uint16_t)(0x3FFUL << MXC_F_SDHC_PRESET_3_SDCLK_FREQ_POS))
#define	MXC_F_SDHC_PRESET_3_CLK_GEN_POS   10
#define	MXC_F_SDHC_PRESET_3_CLK_GEN   ((uint16_t)(0x1UL << MXC_F_SDHC_PRESET_3_CLK_GEN_POS))
#define	MXC_F_SDHC_PRESET_3_DRIVER_STRENGTH_POS   14
#define	MXC_F_SDHC_PRESET_3_DRIVER_STRENGTH   ((uint16_t)(0x3UL << MXC_F_SDHC_PRESET_3_DRIVER_STRENGTH_POS))
#define	MXC_F_SDHC_PRESET_4_SDCLK_FREQ_POS   0
#define	MXC_F_SDHC_PRESET_4_SDCLK_FREQ   ((uint16_t)(0x3FFUL << MXC_F_SDHC_PRESET_4_SDCLK_FREQ_POS))
#define	MXC_F_SDHC_PRESET_4_CLK_GEN_POS   10
#define	MXC_F_SDHC_PRESET_4_CLK_GEN   ((uint16_t)(0x1UL << MXC_F_SDHC_PRESET_4_CLK_GEN_POS))
#define	MXC_F_SDHC_PRESET_4_DRIVER_STRENGTH_POS   14
#define	MXC_F_SDHC_PRESET_4_DRIVER_STRENGTH   ((uint16_t)(0x3UL << MXC_F_SDHC_PRESET_4_DRIVER_STRENGTH_POS))
#define	MXC_F_SDHC_PRESET_5_SDCLK_FREQ_POS   0
#define	MXC_F_SDHC_PRESET_5_SDCLK_FREQ   ((uint16_t)(0x3FFUL << MXC_F_SDHC_PRESET_5_SDCLK_FREQ_POS))
#define	MXC_F_SDHC_PRESET_5_CLK_GEN_POS   10
#define	MXC_F_SDHC_PRESET_5_CLK_GEN   ((uint16_t)(0x1UL << MXC_F_SDHC_PRESET_5_CLK_GEN_POS))
#define	MXC_F_SDHC_PRESET_5_DRIVER_STRENGTH_POS   14
#define	MXC_F_SDHC_PRESET_5_DRIVER_STRENGTH   ((uint16_t)(0x3UL << MXC_F_SDHC_PRESET_5_DRIVER_STRENGTH_POS))
#define	MXC_F_SDHC_PRESET_6_SDCLK_FREQ_POS   0
#define	MXC_F_SDHC_PRESET_6_SDCLK_FREQ   ((uint16_t)(0x3FFUL << MXC_F_SDHC_PRESET_6_SDCLK_FREQ_POS))
#define	MXC_F_SDHC_PRESET_6_CLK_GEN_POS   10
#define	MXC_F_SDHC_PRESET_6_CLK_GEN   ((uint16_t)(0x1UL << MXC_F_SDHC_PRESET_6_CLK_GEN_POS))
#define	MXC_F_SDHC_PRESET_6_DRIVER_STRENGTH_POS   14
#define	MXC_F_SDHC_PRESET_6_DRIVER_STRENGTH   ((uint16_t)(0x3UL << MXC_F_SDHC_PRESET_6_DRIVER_STRENGTH_POS))
#define	MXC_F_SDHC_PRESET_7_SDCLK_FREQ_POS   0
#define	MXC_F_SDHC_PRESET_7_SDCLK_FREQ   ((uint16_t)(0x3FFUL << MXC_F_SDHC_PRESET_7_SDCLK_FREQ_POS))
#define	MXC_F_SDHC_PRESET_7_CLK_GEN_POS   10
#define	MXC_F_SDHC_PRESET_7_CLK_GEN   ((uint16_t)(0x1UL << MXC_F_SDHC_PRESET_7_CLK_GEN_POS))
#define	MXC_F_SDHC_PRESET_7_DRIVER_STRENGTH_POS   14
#define	MXC_F_SDHC_PRESET_7_DRIVER_STRENGTH   ((uint16_t)(0x3UL << MXC_F_SDHC_PRESET_7_DRIVER_STRENGTH_POS))
#define	MXC_F_SDHC_SLOT_INT_INT_SIGNALS_POS   0
#define	MXC_F_SDHC_SLOT_INT_INT_SIGNALS   ((uint16_t)(0x1UL << MXC_F_SDHC_SLOT_INT_INT_SIGNALS_POS))
#define	MXC_F_SDHC_HOST_CN_VER_SPEC_VER_POS   0
#define	MXC_F_SDHC_HOST_CN_VER_SPEC_VER   ((uint16_t)(0xFFUL << MXC_F_SDHC_HOST_CN_VER_SPEC_VER_POS))
#define	MXC_F_SDHC_HOST_CN_VER_VEND_VER_POS   8
#define	MXC_F_SDHC_HOST_CN_VER_VEND_VER   ((uint16_t)(0xFFUL << MXC_F_SDHC_HOST_CN_VER_VEND_VER_POS))

Detailed Description

Registers, Bit Masks and Bit Positions for the SDHC Peripheral Module.

Note

This file is @generated.