Header file of AD463x Driver. More...

#include <stdint.h>
#include "spi_engine.h"
#include "no_os_util.h"
#include "clk_axi_clkgen.h"
#include "no_os_pwm.h"
#include "no_os_gpio.h"

Include dependency graph for ad463x.h:

This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Classes
struct	ad463x_init_param

struct	ad463x_dev
	Device initialization parameters. More...

Macros
#define	AD463x_H_

#define	AD463X_REG_INTERFACE_CONFIG_A 0x00

#define	AD463X_REG_INTERFACE_CONFIG_B 0x01

#define	AD463X_REG_DEVICE_CONFIG 0x02

#define	AD463X_REG_CHIP_TYPE 0x03

#define	AD463X_REG_PRODUCT_ID_L 0x04

#define	AD463X_REG_PRODUCT_ID_H 0x05

#define	AD463X_REG_CHIP_GRADE 0x06

#define	AD463X_REG_SCRATCH_PAD 0x0A

#define	AD463X_REG_SPI_REVISION 0x0B

#define	AD463X_REG_VENDOR_L 0x0C

#define	AD463X_REG_VENDOR_H 0x0D

#define	AD463X_REG_STREAM_MODE 0x0E

#define	AD463X_REG_EXIT_CFG_MODE 0x14

#define	AD463X_REG_AVG 0x15

#define	AD463X_REG_OFFSET_BASE 0x16

#define	AD463X_REG_OFFSET_X0_0 0x16

#define	AD463X_REG_OFFSET_X0_1 0x17

#define	AD463X_REG_OFFSET_X0_2 0x18

#define	AD463X_REG_OFFSET_X1_0 0x19

#define	AD463X_REG_OFFSET_X1_1 0x1A

#define	AD463X_REG_OFFSET_X1_2 0x1B

#define	AD463X_REG_GAIN_BASE 0x1C

#define	AD463X_REG_GAIN_X0_LSB 0x1C

#define	AD463X_REG_GAIN_X0_MSB 0x1D

#define	AD463X_REG_GAIN_X1_LSB 0x1E

#define	AD463X_REG_GAIN_X1_MSB 0x1F

#define	AD463X_REG_MODES 0x20

#define	AD463X_REG_OSCILATOR 0x21

#define	AD463X_REG_IO 0x22

#define	AD463X_REG_PAT0 0x23

#define	AD463X_REG_PAT1 0x24

#define	AD463X_REG_PAT2 0x25

#define	AD463X_REG_PAT3 0x26

#define	AD463X_REG_DIG_DIAG 0x34

#define	AD463X_REG_DIG_ERR 0x35

#define	AD463X_CFG_SW_RESET (NO_OS_BIT(7) \| NO_OS_BIT(0))

#define	AD463X_CFG_SDO_ENABLE NO_OS_BIT(4)

#define	AD463X_SW_RESET_MSK (NO_OS_BIT(7) \| NO_OS_BIT(0))

#define	AD463X_LANE_MODE_MSK (NO_OS_BIT(7) \| NO_OS_BIT(6))

#define	AD463X_CLK_MODE_MSK (NO_OS_BIT(5) \| NO_OS_BIT(4))

#define	AD463X_DDR_MODE_MSK NO_OS_BIT(3)

#define	AD463X_SDR_MODE 0x00

#define	AD463X_DDR_MODE NO_OS_BIT(3)

#define	AD463X_OUT_DATA_MODE_MSK (NO_OS_BIT(2) \| NO_OS_BIT(1) \| NO_OS_BIT(0))

#define	AD463X_24_DIFF 0x00

#define	AD463X_16_DIFF_8_COM 0x01

#define	AD463X_24_DIFF_8_COM 0x02

#define	AD463X_30_AVERAGED_DIFF 0x03

#define	AD463X_32_PATTERN 0x04

#define	AD463X_EXIT_CFG_MODE NO_OS_BIT(0)

#define	AD463X_CHANNEL_0 0x00

#define	AD463X_CHANNEL_1 0x01

#define	AD463X_OFFSET_0 0x00

#define	AD463X_OFFSET_1 0x01

#define	AD463X_OFFSET_2 0x02

#define	AD463X_GAIN_LSB 0x00

#define	AD463X_GAIN_MSB 0x01

#define	AD463X_ONE_LANE_PER_CH 0x00

#define	AD463X_TWO_LANES_PER_CH NO_OS_BIT(6)

#define	AD463X_FOUR_LANES_PER_CH NO_OS_BIT(7)

#define	AD463X_SHARED_TWO_CH (NO_OS_BIT(6) \| NO_OS_BIT(7))

#define	AD463X_SPI_COMPATIBLE_MODE 0x00

#define	AD463X_ECHO_CLOCK_MODE NO_OS_BIT(4)

#define	AD463X_CLOCK_MASTER_MODE NO_OS_BIT(5)

#define	AD463X_NORMAL_MODE 0x00

#define	AD463X_LOW_POWER_MODE (NO_OS_BIT(1) \| NO_OS_BIT(0))

#define	AD463X_AVG_FILTER_RESET NO_OS_BIT(7)

#define	AD463X_CONFIG_TIMING 0x2000

#define	AD463X_REG_READ_DUMMY 0x00

#define	AD463X_REG_WRITE 0x00

#define	AD463X_REG_READ NO_OS_BIT(7)

#define	AD463X_REG_CHAN_OFFSET(ch, pos) (AD463X_REG_OFFSET_BASE + (3 * ch) + pos)

#define	AD463X_REG_CHAN_GAIN(ch, pos) (AD463X_REG_GAIN_BASE + (2 * ch) + pos)

#define	AD463X_DRIVER_STRENGTH_MASK NO_OS_BIT(0)

#define	AD463X_NORMAL_OUTPUT_STRENGTH 0x00

#define	AD463X_DOUBLE_OUTPUT_STRENGTH NO_OS_BIT(1)

#define	AD463X_OUT_DATA_PAT 0x5A5A0F0F

#define	AD463X_TRIGGER_PULSE_WIDTH_NS 0x0A

#define	AD463X_GAIN_MAX_VAL_SCALED 19997

Enumerations
enum	ad463x_id { ID_AD4630_24, ID_AD4630_20, ID_AD4630_16, ID_AD4631_24, ID_AD4631_20, ID_AD4631_16, ID_AD4632_24, ID_AD4632_20, ID_AD4632_16, ID_AD4030, ID_ADAQ4224 }
	Device type. More...

enum	ad463x_pgia_gain { AD463X_GAIN_0_33 = 0, AD463X_GAIN_0_56 = 1, AD463X_GAIN_2_22 = 2, AD463X_GAIN_6_67 = 3 }
	Available pgia gains. More...

Functions
int32_t	ad463x_spi_reg_read (struct ad463x_dev dev, uint16_t reg_addr, uint8_t reg_data)
	Read device register. More...

int32_t	ad463x_spi_reg_write (struct ad463x_dev *dev, uint16_t reg_addr, uint8_t reg_data)
	Write device register. More...

int32_t	ad463x_spi_reg_read_masked (struct ad463x_dev dev, uint16_t reg_addr, uint8_t mask, uint8_t data)
	SPI read device register using a mask. More...

int32_t	ad463x_spi_reg_write_masked (struct ad463x_dev *dev, uint16_t reg_addr, uint8_t mask, uint8_t data)
	SPI write device register using a mask. More...

int32_t	ad463x_set_pwr_mode (struct ad463x_dev *dev, uint8_t mode)
	Set power mode. More...

int32_t	ad463x_set_avg_frame_len (struct ad463x_dev *dev, uint8_t mode)
	Set average frame length. More...

int32_t	ad463x_set_drive_strength (struct ad463x_dev *dev, uint8_t mode)
	Set drive strength. More...

int32_t	ad463x_exit_reg_cfg_mode (struct ad463x_dev *dev)
	Exit register configuration mode. More...

int32_t	ad463x_set_ch_gain (struct ad463x_dev *dev, uint8_t ch_idx, uint64_t gain)
	Set channel gain. More...

int32_t	ad463x_set_ch_offset (struct ad463x_dev *dev, uint8_t ch_idx, uint32_t offset)
	Set channel offset. More...

int32_t	ad463x_read_data (struct ad463x_dev dev, uint32_t buf, uint16_t samples)
	Read from device. Enter register mode to read/write registers. More...

int32_t	ad463x_init (struct ad463x_dev *device, struct ad463x_init_param init_param)
	Initialize the device. More...

int32_t	ad463x_calc_pgia_gain (int32_t gain_int, int32_t gain_fract, int32_t vref, int32_t precision, enum ad463x_pgia_gain *gain_idx)
	Calculate the PGIA gain. More...

int32_t	ad463x_set_pgia_gain (struct ad463x_dev *dev, enum ad463x_pgia_gain gain_idx)
	Set the PGIA gain. More...

int32_t	ad463x_remove (struct ad463x_dev *dev)
	Free the memory allocated by ad463x_init(). More...

int32_t	ad463x_enter_config_mode (struct ad463x_dev *dev)
	Enter register configuration mode. More...

Detailed Description

Header file of AD463x Driver.

Author: Antoniu Miclaus (anton.nosp@m.iu.m.nosp@m.iclau.nosp@m.s@an.nosp@m.alog..nosp@m.com)

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
The use of this software may or may not infringe the patent rights of one or more patent holders. This license does not release you from the requirement that you obtain separate licenses from these patent holders to use this software.
Use of the software either in source or binary form, must be run on or directly connected to an Analog Devices Inc. component.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ AD463X_16_DIFF_8_COM

#define AD463X_16_DIFF_8_COM 0x01

◆ AD463X_24_DIFF

#define AD463X_24_DIFF 0x00

◆ AD463X_24_DIFF_8_COM

#define AD463X_24_DIFF_8_COM 0x02

◆ AD463X_30_AVERAGED_DIFF

#define AD463X_30_AVERAGED_DIFF 0x03

◆ AD463X_32_PATTERN

#define AD463X_32_PATTERN 0x04

◆ AD463X_AVG_FILTER_RESET

#define AD463X_AVG_FILTER_RESET NO_OS_BIT(7)

◆ AD463X_CFG_SDO_ENABLE

#define AD463X_CFG_SDO_ENABLE NO_OS_BIT(4)

◆ AD463X_CFG_SW_RESET

#define AD463X_CFG_SW_RESET (NO_OS_BIT(7) | NO_OS_BIT(0))

◆ AD463X_CHANNEL_0

#define AD463X_CHANNEL_0 0x00

◆ AD463X_CHANNEL_1

#define AD463X_CHANNEL_1 0x01

◆ AD463X_CLK_MODE_MSK

#define AD463X_CLK_MODE_MSK (NO_OS_BIT(5) | NO_OS_BIT(4))

◆ AD463X_CLOCK_MASTER_MODE

#define AD463X_CLOCK_MASTER_MODE NO_OS_BIT(5)

◆ AD463X_CONFIG_TIMING

#define AD463X_CONFIG_TIMING 0x2000

◆ AD463X_DDR_MODE

#define AD463X_DDR_MODE NO_OS_BIT(3)

◆ AD463X_DDR_MODE_MSK

#define AD463X_DDR_MODE_MSK NO_OS_BIT(3)

◆ AD463X_DOUBLE_OUTPUT_STRENGTH

#define AD463X_DOUBLE_OUTPUT_STRENGTH NO_OS_BIT(1)

◆ AD463X_DRIVER_STRENGTH_MASK

#define AD463X_DRIVER_STRENGTH_MASK NO_OS_BIT(0)

◆ AD463X_ECHO_CLOCK_MODE

#define AD463X_ECHO_CLOCK_MODE NO_OS_BIT(4)

◆ AD463X_EXIT_CFG_MODE

#define AD463X_EXIT_CFG_MODE NO_OS_BIT(0)

◆ AD463X_FOUR_LANES_PER_CH

#define AD463X_FOUR_LANES_PER_CH NO_OS_BIT(7)

◆ AD463X_GAIN_LSB

#define AD463X_GAIN_LSB 0x00

◆ AD463X_GAIN_MAX_VAL_SCALED

#define AD463X_GAIN_MAX_VAL_SCALED 19997

◆ AD463X_GAIN_MSB

#define AD463X_GAIN_MSB 0x01

◆ AD463x_H_

#define AD463x_H_

◆ AD463X_LANE_MODE_MSK

#define AD463X_LANE_MODE_MSK (NO_OS_BIT(7) | NO_OS_BIT(6))

◆ AD463X_LOW_POWER_MODE

#define AD463X_LOW_POWER_MODE (NO_OS_BIT(1) | NO_OS_BIT(0))

◆ AD463X_NORMAL_MODE

#define AD463X_NORMAL_MODE 0x00

◆ AD463X_NORMAL_OUTPUT_STRENGTH

#define AD463X_NORMAL_OUTPUT_STRENGTH 0x00

◆ AD463X_OFFSET_0

#define AD463X_OFFSET_0 0x00

◆ AD463X_OFFSET_1

#define AD463X_OFFSET_1 0x01

◆ AD463X_OFFSET_2

#define AD463X_OFFSET_2 0x02

◆ AD463X_ONE_LANE_PER_CH

#define AD463X_ONE_LANE_PER_CH 0x00

◆ AD463X_OUT_DATA_MODE_MSK

#define AD463X_OUT_DATA_MODE_MSK (NO_OS_BIT(2) | NO_OS_BIT(1) | NO_OS_BIT(0))

◆ AD463X_OUT_DATA_PAT

#define AD463X_OUT_DATA_PAT 0x5A5A0F0F

◆ AD463X_REG_AVG

#define AD463X_REG_AVG 0x15

◆ AD463X_REG_CHAN_GAIN

#define AD463X_REG_CHAN_GAIN	(	ch,
		pos
	)	(AD463X_REG_GAIN_BASE + (2 * ch) + pos)

◆ AD463X_REG_CHAN_OFFSET

#define AD463X_REG_CHAN_OFFSET	(	ch,
		pos
	)	(AD463X_REG_OFFSET_BASE + (3 * ch) + pos)

◆ AD463X_REG_CHIP_GRADE

#define AD463X_REG_CHIP_GRADE 0x06

◆ AD463X_REG_CHIP_TYPE

#define AD463X_REG_CHIP_TYPE 0x03

◆ AD463X_REG_DEVICE_CONFIG

#define AD463X_REG_DEVICE_CONFIG 0x02

◆ AD463X_REG_DIG_DIAG

#define AD463X_REG_DIG_DIAG 0x34

◆ AD463X_REG_DIG_ERR

#define AD463X_REG_DIG_ERR 0x35

◆ AD463X_REG_EXIT_CFG_MODE

#define AD463X_REG_EXIT_CFG_MODE 0x14

◆ AD463X_REG_GAIN_BASE

#define AD463X_REG_GAIN_BASE 0x1C

◆ AD463X_REG_GAIN_X0_LSB

#define AD463X_REG_GAIN_X0_LSB 0x1C

◆ AD463X_REG_GAIN_X0_MSB

#define AD463X_REG_GAIN_X0_MSB 0x1D

◆ AD463X_REG_GAIN_X1_LSB

#define AD463X_REG_GAIN_X1_LSB 0x1E

◆ AD463X_REG_GAIN_X1_MSB

#define AD463X_REG_GAIN_X1_MSB 0x1F

◆ AD463X_REG_INTERFACE_CONFIG_A

#define AD463X_REG_INTERFACE_CONFIG_A 0x00

◆ AD463X_REG_INTERFACE_CONFIG_B

#define AD463X_REG_INTERFACE_CONFIG_B 0x01

◆ AD463X_REG_IO

#define AD463X_REG_IO 0x22

◆ AD463X_REG_MODES

#define AD463X_REG_MODES 0x20

◆ AD463X_REG_OFFSET_BASE

#define AD463X_REG_OFFSET_BASE 0x16

◆ AD463X_REG_OFFSET_X0_0

#define AD463X_REG_OFFSET_X0_0 0x16

◆ AD463X_REG_OFFSET_X0_1

#define AD463X_REG_OFFSET_X0_1 0x17

◆ AD463X_REG_OFFSET_X0_2

#define AD463X_REG_OFFSET_X0_2 0x18

◆ AD463X_REG_OFFSET_X1_0

#define AD463X_REG_OFFSET_X1_0 0x19

◆ AD463X_REG_OFFSET_X1_1

#define AD463X_REG_OFFSET_X1_1 0x1A

◆ AD463X_REG_OFFSET_X1_2

#define AD463X_REG_OFFSET_X1_2 0x1B

◆ AD463X_REG_OSCILATOR

#define AD463X_REG_OSCILATOR 0x21

◆ AD463X_REG_PAT0

#define AD463X_REG_PAT0 0x23

◆ AD463X_REG_PAT1

#define AD463X_REG_PAT1 0x24

◆ AD463X_REG_PAT2

#define AD463X_REG_PAT2 0x25

◆ AD463X_REG_PAT3

#define AD463X_REG_PAT3 0x26

◆ AD463X_REG_PRODUCT_ID_H

#define AD463X_REG_PRODUCT_ID_H 0x05

◆ AD463X_REG_PRODUCT_ID_L

#define AD463X_REG_PRODUCT_ID_L 0x04

◆ AD463X_REG_READ

#define AD463X_REG_READ NO_OS_BIT(7)

◆ AD463X_REG_READ_DUMMY

#define AD463X_REG_READ_DUMMY 0x00

◆ AD463X_REG_SCRATCH_PAD

#define AD463X_REG_SCRATCH_PAD 0x0A

◆ AD463X_REG_SPI_REVISION

#define AD463X_REG_SPI_REVISION 0x0B

◆ AD463X_REG_STREAM_MODE

#define AD463X_REG_STREAM_MODE 0x0E

◆ AD463X_REG_VENDOR_H

#define AD463X_REG_VENDOR_H 0x0D

◆ AD463X_REG_VENDOR_L

#define AD463X_REG_VENDOR_L 0x0C

◆ AD463X_REG_WRITE

#define AD463X_REG_WRITE 0x00

◆ AD463X_SDR_MODE

#define AD463X_SDR_MODE 0x00

◆ AD463X_SHARED_TWO_CH

#define AD463X_SHARED_TWO_CH (NO_OS_BIT(6) | NO_OS_BIT(7))

◆ AD463X_SPI_COMPATIBLE_MODE

#define AD463X_SPI_COMPATIBLE_MODE 0x00

◆ AD463X_SW_RESET_MSK

#define AD463X_SW_RESET_MSK (NO_OS_BIT(7) | NO_OS_BIT(0))

◆ AD463X_TRIGGER_PULSE_WIDTH_NS

#define AD463X_TRIGGER_PULSE_WIDTH_NS 0x0A

◆ AD463X_TWO_LANES_PER_CH

#define AD463X_TWO_LANES_PER_CH NO_OS_BIT(6)

Enumeration Type Documentation

◆ ad463x_id

enum ad463x_id

Device type.

Enumerator
ID_AD4630_24	AD4630-24 device
ID_AD4630_20	AD4630-20 device
ID_AD4630_16	AD4630-16 device
ID_AD4631_24	AD4631-24 device
ID_AD4631_20	AD4631-20 device
ID_AD4631_16	AD4631-16 device
ID_AD4632_24	AD4632-24 device
ID_AD4632_20	AD4632-20 device
ID_AD4632_16	AD4632-16 device
ID_AD4030	AD4030 device
ID_ADAQ4224	ADAQ4224 device

◆ ad463x_pgia_gain

enum ad463x_pgia_gain

Available pgia gains.

Enumerator
AD463X_GAIN_0_33	Vout/Vin = 0.33
AD463X_GAIN_0_56	Vout/Vin = 0.56
AD463X_GAIN_2_22	Vout/Vin = 2.22
AD463X_GAIN_6_67	Vout/Vin = 6.67

Function Documentation

◆ ad463x_calc_pgia_gain()

int32_t ad463x_calc_pgia_gain	(	int32_t	gain_int,
		int32_t	gain_fract,
		int32_t	vref,
		int32_t	precision,
		enum ad463x_pgia_gain *	gain_idx
	)

Calculate the PGIA gain.

Calculate PGIA gain

Parameters

gain_int	- Interger part of the gain.
gain_fract	- Fractional part of the gain.
vref	- Reference Voltage.
precision	- Precision value shifter.
gain_idx	- Index of gain resulting from the calculation.

Returns: Zero in case of success, negative number otherwise

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◆ ad463x_enter_config_mode()

int32_t ad463x_enter_config_mode ( struct ad463x_dev * dev )

Enter register configuration mode.

Enter configuration Register mode

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ ad463x_exit_reg_cfg_mode()

int32_t ad463x_exit_reg_cfg_mode ( struct ad463x_dev * dev )

Exit register configuration mode.

Exit register configuration mode

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad463x_init()

int32_t ad463x_init	(	struct ad463x_dev **	device,
		struct ad463x_init_param *	init_param
	)

Initialize the device.

Device initialization

Parameters

[out]	device	- The device structure.
[in]	init_param	- The structure that contains the device initial parameters.

Returns: 0 in case of success, -1 otherwise.

Perform Hardware Reset and configure pins

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◆ ad463x_read_data()

int32_t ad463x_read_data	(	struct ad463x_dev *	dev,
		uint32_t *	buf,
		uint16_t	samples
	)

Read from device. Enter register mode to read/write registers.

Read data

Parameters

[in]	dev	- ad469x_dev device handler.
[out]	buf	- data buffer.
[in]	samples	- sample number.

Returns: 0 in case of success, -1 otherwise.

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◆ ad463x_remove()

int32_t ad463x_remove ( struct ad463x_dev * dev )

Free the memory allocated by ad463x_init().

Free resources

Parameters

[in] dev - Pointer to the device handler.

Returns: 0 in case of success, -1 otherwise

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◆ ad463x_set_avg_frame_len()

int32_t ad463x_set_avg_frame_len	(	struct ad463x_dev *	dev,
		uint8_t	mode
	)

Set average frame length.

Set average frame length

Parameters

dev	- The device structure.
mode	- Average filter frame length mode.

Returns: 0 in case of success, negative error code otherwise.

◆ ad463x_set_ch_gain()

int32_t ad463x_set_ch_gain	(	struct ad463x_dev *	dev,
		uint8_t	ch_idx,
		uint64_t	gain
	)

Set channel gain.

Set channel gain

Parameters

dev	- The device structure.
ch_idx	- The channel index.
gain	- The gain value scaled by 10000. Example: to set gain 1.5, use 150000

Returns: 0 in case of success, negative error code otherwise.

◆ ad463x_set_ch_offset()

int32_t ad463x_set_ch_offset	(	struct ad463x_dev *	dev,
		uint8_t	ch_idx,
		uint32_t	offset
	)

Set channel offset.

Set channel offset

Parameters

dev	- The device structure.
ch_idx	- The channel index.
offset	- The channel offset.

Returns: 0 in case of success, negative error code otherwise.

◆ ad463x_set_drive_strength()

int32_t ad463x_set_drive_strength	(	struct ad463x_dev *	dev,
		uint8_t	mode
	)

Set drive strength.

Set drive strength

Parameters

dev	- The device structure.
mode	- The register data.

Returns: 0 in case of success, negative error code otherwise.

◆ ad463x_set_pgia_gain()

int32_t ad463x_set_pgia_gain	(	struct ad463x_dev *	dev,
		enum ad463x_pgia_gain	gain_idx
	)

Set the PGIA gain.

Control PGIA gain

Parameters

dev	- Pointer to the device handler.
gain_idx	- Gain control index.

Returns: 0 in case of success, -1 otherwise

Check if gain available in the ADC

Check if gain gain_idx is in the valid range

update gain index value in the device handler

Set A0 and A1 pins according to gain index value

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◆ ad463x_set_pwr_mode()

int32_t ad463x_set_pwr_mode	(	struct ad463x_dev *	dev,
		uint8_t	mode
	)

Set power mode.

Set power mode

Parameters

dev	- The device structure.
mode	- The power mode.

Returns: 0 in case of success, negative error code otherwise.

◆ ad463x_spi_reg_read()

int32_t ad463x_spi_reg_read	(	struct ad463x_dev *	dev,
		uint16_t	reg_addr,
		uint8_t *	reg_data
	)

Read device register.

Parameters

dev	- The device structure.
reg_addr	- The register address.
reg_data	- The data read from the register.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad463x_spi_reg_read_masked()

int32_t ad463x_spi_reg_read_masked	(	struct ad463x_dev *	dev,
		uint16_t	reg_addr,
		uint8_t	mask,
		uint8_t *	data
	)

SPI read device register using a mask.

Read from device using a mask

Parameters

dev	- The device structure.
reg_addr	- The register address.
mask	- The mask.
data	- The data read from the register.

Returns: 0 in case of success, negative error code otherwise.

◆ ad463x_spi_reg_write()

int32_t ad463x_spi_reg_write	(	struct ad463x_dev *	dev,
		uint16_t	reg_addr,
		uint8_t	reg_data
	)

Write device register.

Write device register

Parameters

dev	- The device structure.
reg_addr	- The register address.
reg_data	- The register data.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad463x_spi_reg_write_masked()

int32_t ad463x_spi_reg_write_masked	(	struct ad463x_dev *	dev,
		uint16_t	reg_addr,
		uint8_t	mask,
		uint8_t	data
	)

SPI write device register using a mask.

Write to device using a mask

Parameters

dev	- The device structure.
reg_addr	- The register address.
mask	- The mask.
data	- The register data.

Returns: 0 in case of success, negative error code otherwise.

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Classes

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ AD463X_16_DIFF_8_COM

◆ AD463X_24_DIFF

◆ AD463X_24_DIFF_8_COM

◆ AD463X_30_AVERAGED_DIFF

◆ AD463X_32_PATTERN

◆ AD463X_AVG_FILTER_RESET

◆ AD463X_CFG_SDO_ENABLE

◆ AD463X_CFG_SW_RESET

◆ AD463X_CHANNEL_0

◆ AD463X_CHANNEL_1

◆ AD463X_CLK_MODE_MSK

◆ AD463X_CLOCK_MASTER_MODE

◆ AD463X_CONFIG_TIMING

◆ AD463X_DDR_MODE

◆ AD463X_DDR_MODE_MSK

◆ AD463X_DOUBLE_OUTPUT_STRENGTH

◆ AD463X_DRIVER_STRENGTH_MASK

◆ AD463X_ECHO_CLOCK_MODE

◆ AD463X_EXIT_CFG_MODE

◆ AD463X_FOUR_LANES_PER_CH

◆ AD463X_GAIN_LSB

◆ AD463X_GAIN_MAX_VAL_SCALED

◆ AD463X_GAIN_MSB

◆ AD463x_H_

◆ AD463X_LANE_MODE_MSK

◆ AD463X_LOW_POWER_MODE

◆ AD463X_NORMAL_MODE

◆ AD463X_NORMAL_OUTPUT_STRENGTH

◆ AD463X_OFFSET_0

◆ AD463X_OFFSET_1

◆ AD463X_OFFSET_2

◆ AD463X_ONE_LANE_PER_CH

◆ AD463X_OUT_DATA_MODE_MSK

◆ AD463X_OUT_DATA_PAT

◆ AD463X_REG_AVG

◆ AD463X_REG_CHAN_GAIN

◆ AD463X_REG_CHAN_OFFSET

◆ AD463X_REG_CHIP_GRADE

◆ AD463X_REG_CHIP_TYPE

◆ AD463X_REG_DEVICE_CONFIG

◆ AD463X_REG_DIG_DIAG

◆ AD463X_REG_DIG_ERR

◆ AD463X_REG_EXIT_CFG_MODE

◆ AD463X_REG_GAIN_BASE

◆ AD463X_REG_GAIN_X0_LSB

◆ AD463X_REG_GAIN_X0_MSB

◆ AD463X_REG_GAIN_X1_LSB

◆ AD463X_REG_GAIN_X1_MSB

◆ AD463X_REG_INTERFACE_CONFIG_A

◆ AD463X_REG_INTERFACE_CONFIG_B

◆ AD463X_REG_IO

◆ AD463X_REG_MODES

◆ AD463X_REG_OFFSET_BASE

◆ AD463X_REG_OFFSET_X0_0

◆ AD463X_REG_OFFSET_X0_1

◆ AD463X_REG_OFFSET_X0_2

◆ AD463X_REG_OFFSET_X1_0

◆ AD463X_REG_OFFSET_X1_1

◆ AD463X_REG_OFFSET_X1_2

◆ AD463X_REG_OSCILATOR

◆ AD463X_REG_PAT0

◆ AD463X_REG_PAT1

◆ AD463X_REG_PAT2

◆ AD463X_REG_PAT3

◆ AD463X_REG_PRODUCT_ID_H

◆ AD463X_REG_PRODUCT_ID_L

◆ AD463X_REG_READ

◆ AD463X_REG_READ_DUMMY

◆ AD463X_REG_SCRATCH_PAD

◆ AD463X_REG_SPI_REVISION

◆ AD463X_REG_STREAM_MODE

◆ AD463X_REG_VENDOR_H

◆ AD463X_REG_VENDOR_L

◆ AD463X_REG_WRITE