parameters.h File Reference

Definitions specific to Xilinx platform used by capi_selftest project. Copyright (c) 2025-2026 Analog Devices, Inc. More...

#include <xparameters.h>
#include "capi_uart.h"
#include "xilinx_capi_uart.h"
#include "xilinx_capi_gpio.h"
#include "xilinx_capi_spi.h"
#include "xilinx_capi_timer.h"
#include "xilinx_capi_i2c.h"
#include "xilinx_capi_irq.h"
#include "capi_timer.h"
#include "xinterrupt_wrap.h"

Include dependency graph for parameters.h:

Macros
#define	GPIO_SEL_PS
#define	SPI_SEL_PS
#define	I2C_SEL_PL
#define	I2C_TARGET_SEL_PS
#define	TIMER_SELECT   TIMER_SEL_AXI
#define	UART_ASYNC_SEL_PS
#define	UART_IDENTIFIER   XPAR_XUARTPS_0_BASEADDR
#define	UART_OPS   &capi_uart_xilinx_ps_ops
#define	UART_EXTRA_TYPE   struct capi_uart_xilinx_config
#define	UART_EXTRA_INIT   { .use_irq = false }
#define	UART_BAUDRATE   115200U
#define	PLATFORM_NAME   "XILINX"
#define	GPIO_OUTPUT_IDENTIFIER   XPAR_XGPIOPS_0_BASEADDR
#define	GPIO_OUTPUT_NUM_PINS   1U
#define	GPIO_OUTPUT_OPS   &capi_gpio_xilinx_ps_ops
#define	GPIO_OUTPUT_EXTRA   struct capi_gpio_xilinx_ps_config
#define	GPIO_OUTPUT_EXTRA_INIT    { .base_pin = 63U }
#define	GPIO_INPUT_IDENTIFIER   XPAR_XGPIOPS_0_BASEADDR
#define	GPIO_INPUT_NUM_PINS   1U
#define	GPIO_INPUT_OPS   &capi_gpio_xilinx_ps_ops
#define	GPIO_INPUT_EXTRA   struct capi_gpio_xilinx_ps_config
#define	GPIO_INPUT_EXTRA_INIT    { .base_pin = 62U }
#define	GPIO_HAS_PIN_LOOPBACK   1
#define	GPIO_OUTPUT_PIN_NUMBERS   { 0U }
#define	GPIO_INPUT_PIN_NUMBERS   { 0U }
#define	GPIO_INPUT_PIN   62U
#define	GPIO_IRQ_EVENTS_PER_EDGE   1U
#define	IRQ_CTRL_IDENTIFIER   XPAR_XSCUGIC_0_BASEADDR
#define	IRQ_CTRL_EXTRA   NULL
#define	UART_ASYNC_IDENTIFIER   XPAR_XUARTPS_1_BASEADDR
#define	UART_ASYNC_OPS   &capi_uart_xilinx_ps_ops
#define	UART_ASYNC_EXTRA_TYPE   struct capi_uart_xilinx_config
#define	UART_ASYNC_CLK_FREQ_HZ   0U
#define	UART_ASYNC_EXTRA_INIT   { .use_irq = false }
#define	UART_ASYNC_HAS_LINE_CONFIG   1
#define	UART_ASYNC_HAS_IRQ_CTL   1
#define	UART_ASYNC_HAS_RX_TIMEOUT   1
#define	UART_ASYNC_HAS_IRQ   0
#define	UART_ASYNC_BAUDRATE   115200U
#define	UART_ASYNC_BAUD_SLOW   9600U
#define	UART_ASYNC_BAUD_FAST   115200U
#define	UART_ASYNC_SPEED_LEN   256U
#define	UART_ASYNC_LEN   128U
#define	SPI_IDENTIFIER   XPAR_XSPIPS_0_BASEADDR
#define	SPI_OPS   &capi_spi_xilinx_ps_ops
#define	SPI_EXTRA_TYPE   struct capi_spi_xilinx_config
#define	SPI_EXTRA_INIT   { .use_irq = false }
#define	SPI_HAS_IRQ   0
#define	SPI_HAS_DMA   0 /* async via DMA available */
#define	SPI_CLK_FREQ   0U
#define	SPI_DEVICE_NATIVE_CS   0x01U
#define	SPI_DEVICE_MODE   CAPI_SPI_MODE_0
#define	SPI_DEVICE_SPEED_HZ   1000000U
#define	TIMER_SEL_TTC   1
#define	TIMER_SEL_AXI   2
#define	TIMER_SEL_SCU   3
#define	TIMER_IDENTIFIER   XPAR_XTTCPS_0_BASEADDR
#define	TIMER_OPS   &capi_timer_xilinx_ps_ttc_ops
#define	TIMER_INPUT_CLK_HZ   XPAR_XTTCPS_0_CLOCK_FREQ
#define	TIMER_OUTPUT_FREQ_HZ   0U /* TTC free-runs, no target frequency */
#define	TIMER_EXTRA_TYPE   struct capi_timer_xilinx_config
#define	TIMER_EXTRA_INIT   { .use_irq = false }
#define	TIMER_HAS_IRQ   0
#define	TIMER_HAS_COMPARE   1
#define	TIMER_DIRECTION   CAPI_TIMER_COUNT_UP
#define	TIMER_COUNTER_MAX   0x0000FFFFU /* 16-bit TTC, ~1.2 ms rollover */
#define	TIMER_COUNTER_WIDTH   16U
#define	TIMER_COMPARE_VALUE   0x00001000U
#define	TIMER_RATE_WINDOW_US   100U
#define	TIMER_RATE_COUNTER_MASK   0x0000FFFFU
#define	TIMER_RATE_TOLERANCE_PCT   10U
#define	TIMER_IRQ_PERIOD_US   1000U
#define	TIMER_IRQ_EXPECTED_COUNT   200U
#define	I2C_TARGET_ADDR   0x42U
#define	I2C_PL_INPUT_CLK_HZ   100000000U
#define	I2C_IDENTIFIER   XPAR_XIIC_0_BASEADDR
#define	I2C_OPS   &capi_i2c_xilinx_pl_ops
#define	I2C_EXTRA_TYPE   struct capi_i2c_xilinx_config
#define	I2C_EXTRA_INIT
#define	I2C_TARGET_IDENTIFIER   XPAR_XIICPS_0_BASEADDR
#define	I2C_TARGET_OPS   &capi_i2c_xilinx_ps_ops
#define	I2C_TARGET_EXTRA_TYPE   struct capi_i2c_xilinx_config
#define	I2C_TARGET_EXTRA_INIT   { .use_irq = false }
#define	I2C_MASTER_HAS_IRQ   0
#define	I2C_TARGET_HAS_IRQ   0
#define	I2C_PLATFORM_INIT()
#define	I2C_PLATFORM_DEINIT()
#define	I2C_PLATFORM_SET_TARGET(h)

Detailed Description

Definitions specific to Xilinx platform used by capi_selftest project. Copyright (c) 2025-2026 Analog Devices, Inc.

SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

GPIO_HAS_PIN_LOOPBACK

#define GPIO_HAS_PIN_LOOPBACK   1

GPIO_INPUT_EXTRA

#define GPIO_INPUT_EXTRA   struct capi_gpio_xilinx_ps_config

GPIO_INPUT_EXTRA_INIT

#define GPIO_INPUT_EXTRA_INIT    { .base_pin = 62U }

GPIO_INPUT_IDENTIFIER

#define GPIO_INPUT_IDENTIFIER   XPAR_XGPIOPS_0_BASEADDR

GPIO_INPUT_NUM_PINS

#define GPIO_INPUT_NUM_PINS   1U

GPIO_INPUT_OPS

#define GPIO_INPUT_OPS   &capi_gpio_xilinx_ps_ops

GPIO_INPUT_PIN

#define GPIO_INPUT_PIN   62U

GPIO_INPUT_PIN_NUMBERS

#define GPIO_INPUT_PIN_NUMBERS   { 0U }

GPIO_IRQ_EVENTS_PER_EDGE

#define GPIO_IRQ_EVENTS_PER_EDGE   1U

GPIO_OUTPUT_EXTRA

#define GPIO_OUTPUT_EXTRA   struct capi_gpio_xilinx_ps_config

GPIO_OUTPUT_EXTRA_INIT

#define GPIO_OUTPUT_EXTRA_INIT    { .base_pin = 63U }

GPIO_OUTPUT_IDENTIFIER

#define GPIO_OUTPUT_IDENTIFIER   XPAR_XGPIOPS_0_BASEADDR

GPIO_OUTPUT_NUM_PINS

#define GPIO_OUTPUT_NUM_PINS   1U

GPIO_OUTPUT_OPS

#define GPIO_OUTPUT_OPS   &capi_gpio_xilinx_ps_ops

GPIO_OUTPUT_PIN_NUMBERS

#define GPIO_OUTPUT_PIN_NUMBERS   { 0U }

GPIO_SEL_PS

#define GPIO_SEL_PS

I2C_EXTRA_INIT

#define I2C_EXTRA_INIT

Value:

                  { .use_irq = false, \
                  .input_clock_hz = I2C_PL_INPUT_CLK_HZ }

I2C_EXTRA_TYPE

#define I2C_EXTRA_TYPE   struct capi_i2c_xilinx_config

I2C_IDENTIFIER

#define I2C_IDENTIFIER   XPAR_XIIC_0_BASEADDR

I2C_MASTER_HAS_IRQ

#define I2C_MASTER_HAS_IRQ   0

I2C_OPS

#define I2C_OPS   &capi_i2c_xilinx_pl_ops

I2C_PL_INPUT_CLK_HZ

#define I2C_PL_INPUT_CLK_HZ   100000000U

I2C_PLATFORM_DEINIT

#define I2C_PLATFORM_DEINIT

(

)

Value:

((void)0)

I2C_PLATFORM_INIT

#define I2C_PLATFORM_INIT

(

)

Value:

0

I2C_PLATFORM_SET_TARGET

#define I2C_PLATFORM_SET_TARGET

(

h

)

Value:

((void)(h))

I2C_SEL_PL

#define I2C_SEL_PL

I2C_TARGET_ADDR

#define I2C_TARGET_ADDR   0x42U

I2C_TARGET_EXTRA_INIT

#define I2C_TARGET_EXTRA_INIT   { .use_irq = false }

I2C_TARGET_EXTRA_TYPE

#define I2C_TARGET_EXTRA_TYPE   struct capi_i2c_xilinx_config

I2C_TARGET_HAS_IRQ

#define I2C_TARGET_HAS_IRQ   0

I2C_TARGET_IDENTIFIER

#define I2C_TARGET_IDENTIFIER   XPAR_XIICPS_0_BASEADDR

I2C_TARGET_OPS

#define I2C_TARGET_OPS   &capi_i2c_xilinx_ps_ops

I2C_TARGET_SEL_PS

#define I2C_TARGET_SEL_PS

IRQ_CTRL_EXTRA

#define IRQ_CTRL_EXTRA   NULL

IRQ_CTRL_IDENTIFIER

#define IRQ_CTRL_IDENTIFIER   XPAR_XSCUGIC_0_BASEADDR

PLATFORM_NAME

#define PLATFORM_NAME   "XILINX"

SPI_CLK_FREQ

#define SPI_CLK_FREQ   0U

SPI_DEVICE_MODE

#define SPI_DEVICE_MODE   CAPI_SPI_MODE_0

SPI_DEVICE_NATIVE_CS

#define SPI_DEVICE_NATIVE_CS   0x01U

SPI_DEVICE_SPEED_HZ

#define SPI_DEVICE_SPEED_HZ   1000000U

SPI_EXTRA_INIT

#define SPI_EXTRA_INIT   { .use_irq = false }

SPI_EXTRA_TYPE

#define SPI_EXTRA_TYPE   struct capi_spi_xilinx_config

SPI_HAS_DMA

#define SPI_HAS_DMA   0 /* async via DMA available */

SPI_HAS_IRQ

#define SPI_HAS_IRQ   0

SPI_IDENTIFIER

#define SPI_IDENTIFIER   XPAR_XSPIPS_0_BASEADDR

SPI_OPS

#define SPI_OPS   &capi_spi_xilinx_ps_ops

SPI_SEL_PS

#define SPI_SEL_PS

TIMER_COMPARE_VALUE

#define TIMER_COMPARE_VALUE   0x00001000U

TIMER_COUNTER_MAX

#define TIMER_COUNTER_MAX   0x0000FFFFU /* 16-bit TTC, ~1.2 ms rollover */

TIMER_COUNTER_WIDTH

#define TIMER_COUNTER_WIDTH   16U

TIMER_DIRECTION

#define TIMER_DIRECTION   CAPI_TIMER_COUNT_UP

TIMER_EXTRA_INIT

#define TIMER_EXTRA_INIT   { .use_irq = false }

TIMER_EXTRA_TYPE

#define TIMER_EXTRA_TYPE   struct capi_timer_xilinx_config

TIMER_HAS_COMPARE

#define TIMER_HAS_COMPARE   1

TIMER_HAS_IRQ

#define TIMER_HAS_IRQ   0

TIMER_IDENTIFIER

#define TIMER_IDENTIFIER   XPAR_XTTCPS_0_BASEADDR

TIMER_INPUT_CLK_HZ

#define TIMER_INPUT_CLK_HZ   XPAR_XTTCPS_0_CLOCK_FREQ

TIMER_IRQ_EXPECTED_COUNT

#define TIMER_IRQ_EXPECTED_COUNT   200U

TIMER_IRQ_PERIOD_US

#define TIMER_IRQ_PERIOD_US   1000U

TIMER_OPS

#define TIMER_OPS   &capi_timer_xilinx_ps_ttc_ops

TIMER_OUTPUT_FREQ_HZ

#define TIMER_OUTPUT_FREQ_HZ   0U /* TTC free-runs, no target frequency */

TIMER_RATE_COUNTER_MASK

#define TIMER_RATE_COUNTER_MASK   0x0000FFFFU

TIMER_RATE_TOLERANCE_PCT

#define TIMER_RATE_TOLERANCE_PCT   10U

TIMER_RATE_WINDOW_US

#define TIMER_RATE_WINDOW_US   100U

TIMER_SEL_AXI

#define TIMER_SEL_AXI   2

TIMER_SEL_SCU

#define TIMER_SEL_SCU   3

TIMER_SEL_TTC

#define TIMER_SEL_TTC   1

TIMER_SELECT

#define TIMER_SELECT   TIMER_SEL_AXI

UART_ASYNC_BAUD_FAST

#define UART_ASYNC_BAUD_FAST   115200U

UART_ASYNC_BAUD_SLOW

#define UART_ASYNC_BAUD_SLOW   9600U

UART_ASYNC_BAUDRATE

#define UART_ASYNC_BAUDRATE   115200U

UART_ASYNC_CLK_FREQ_HZ

#define UART_ASYNC_CLK_FREQ_HZ   0U

UART_ASYNC_EXTRA_INIT

#define UART_ASYNC_EXTRA_INIT   { .use_irq = false }

UART_ASYNC_EXTRA_TYPE

#define UART_ASYNC_EXTRA_TYPE   struct capi_uart_xilinx_config

UART_ASYNC_HAS_IRQ

#define UART_ASYNC_HAS_IRQ   0

UART_ASYNC_HAS_IRQ_CTL

#define UART_ASYNC_HAS_IRQ_CTL   1

UART_ASYNC_HAS_LINE_CONFIG

#define UART_ASYNC_HAS_LINE_CONFIG   1

UART_ASYNC_HAS_RX_TIMEOUT

#define UART_ASYNC_HAS_RX_TIMEOUT   1

UART_ASYNC_IDENTIFIER

#define UART_ASYNC_IDENTIFIER   XPAR_XUARTPS_1_BASEADDR

UART_ASYNC_LEN

#define UART_ASYNC_LEN   128U

UART_ASYNC_OPS

#define UART_ASYNC_OPS   &capi_uart_xilinx_ps_ops

UART_ASYNC_SEL_PS

#define UART_ASYNC_SEL_PS

UART_ASYNC_SPEED_LEN

#define UART_ASYNC_SPEED_LEN   256U

UART_BAUDRATE

#define UART_BAUDRATE   115200U

UART_EXTRA_INIT

#define UART_EXTRA_INIT   { .use_irq = false }

UART_EXTRA_TYPE

#define UART_EXTRA_TYPE   struct capi_uart_xilinx_config

UART_IDENTIFIER

#define UART_IDENTIFIER   XPAR_XUARTPS_0_BASEADDR

UART_OPS

#define UART_OPS   &capi_uart_xilinx_ps_ops