Developer Guides
Guides aimed at contributors extending pyadi-dt — new device
classes, eval-board composites, FPGA-platform definitions, and XSA
board builders.
- Authoring a new device class
- 1. Overview & scope
- 2. Class hierarchy at a glance
- 3. End-to-end call flow
- 4. Anatomy of a Device
- 5. Port & clock-output plumbing
- 6. Converter patterns
- 7. Cookbook 1 — Adding a new clock device
- 8. Cookbook 2 — Adding a new converter / transceiver
- 9. Cookbook 3 — Adding an eval board or an FPGA board
- 10. Bridging to the XSA pipeline
- 11. Testing your new device
- pyadi-jif to pyadi-dt interface contract
- Hardware CI
- How it works
- Boot reliability
- Board power-off on teardown
- Node manifest
- Adding a new hardware node
- Self-hosted runner registration
- Exporter systemd service
- Fork-PR approval gate
- Private-repo dependency access
- Prism results upload
- Debug artifacts
- Local DT-emission parity test
- AD9371 coverage status and known gaps
- Troubleshooting
- Labgrid exporter systemd service
- Release Operator Runbook