ADAR3000 HDL project

The ADAR3000 is a 5-bit, X-band beamformer IC. It is controlled through a SPI interface and a set of general purpose control pins.

The EVAL-ADAR3000 evaluation board is connected to the FPGA carrier through the SDP-I-FMC interposer board. The HDL project provides the SPI and GPIO control interface of the device from the processing system (PS).

Supported boards

• EVAL-ADAR3000

Supported devices

• ADAR3000

Supported carriers

• ZCU102 on FMC HPC1 slot (VADJ = 1.8 V)

Block design

Block diagram

The connections between the processing system and the device are depicted in the below diagram:

CPU/Memory interconnects addresses

The addresses are dependent on the architecture of the FPGA, having an offset added to the base address from HDL (see more at CPU/Memory interconnects addresses).

Instance	ZynqMP
axi_sysid_0	0x4500_0000

SPI connections

SPI type	SPI manager instance	SPI subordinate	CS nb
PS	SPI 0	ADAR3000	0

GPIOs

To know how the Software GPIO numbers are calculated, check out GPIOs - HDL Architecture page.

GPIO signal	Direction	HDL no.	Zynq UltraScale+ MP
gpio7	OUT	39	117
gpio6	OUT	38	116
gpio5	OUT	37	115
gpio4	OUT	36	114
gpio3	OUT	35	113
gpio2	OUT	34	112
gpio1	OUT	33	111
gpio0	OUT	32	110

Legend

• GPIO signal = name of the GPIO in the HDL project

• Direction = from the FPGA point of view

• HDL no. = HDL GPIO EMIO

• Zynq UltraScale+ MP is Software GPIO, to be used in device trees

Interrupts

This project does not use any Programmable Logic interrupts.

Building the HDL project

The design is built upon ADI’s generic HDL reference design framework. If you want to build the sources, ADI makes them available on the HDL repository. To get the source you must clone the HDL repository, and then build the project as follows:

Linux/Cygwin/WSL

~$

cd hdl/projects/adar3000/zcu102

~/hdl/projects/adar3000/zcu102$

make

A more comprehensive build guide can be found in the Build an HDL project user guide.

Resources

Hardware related

• Product datasheets:

  • ADAR3000

  • EVAL-ADAR3000

  • SDP-I-FMC

HDL related

• ADAR3000 HDL project source code

IP name	Source code link	Documentation link
AXI_SYSID	library/axi_sysid	AXI System ID
SYSID_ROM	library/sysid_rom	AXI System ID

Software related

• Linux device tree adi-adar3000-evb.dts

More information

• ADI HDL User guide

Support

Analog Devices, Inc. will provide limited online support for anyone using the reference design with ADI components via the EngineerZone FPGA reference designs forum.

For questions regarding the ADI Linux device drivers, device trees, etc. from our Linux GitHub repository, the team will offer support on the EngineerZone Linux software drivers forum.

For questions concerning the ADI No-OS drivers, from our No-OS GitHub repository, the team will offer support on the EngineerZone microcontroller No-OS drivers forum.

It should be noted, that the older the tools’ versions and release branches are, the lower the chances to receive support from ADI engineers.