Definitions specific to xilinx platform used by ad463x_fmcz project.
More...
#include <stdio.h>
#include <xparameters.h>
#include <xil_cache.h>
#include <xilinx_uart.h>
#include "xilinx_gpio.h"
#include "axi_pwm_extra.h"
#include "spi_engine.h"
Definitions specific to xilinx platform used by ad463x_fmcz project.
- Author
- Antoniu Miclaus (anton.nosp@m.iu.m.nosp@m.iclau.nosp@m.s@an.nosp@m.alog..nosp@m.com)
-
Axel Haslam (ahasl.nosp@m.am@b.nosp@m.aylib.nosp@m.re.c.nosp@m.om)
Copyright 2024(c) Analog Devices, Inc.
SPDX-License-Identifier: BSD-3-Clause
◆ AD400X_ADC_REF_VOLTAGE
| #define AD400X_ADC_REF_VOLTAGE 5000 |
◆ AXI_PWMGEN_BASEADDR
| #define AXI_PWMGEN_BASEADDR XPAR_CNV_GENERATOR_BASEADDR |
◆ DCACHE_INVALIDATE
| #define DCACHE_INVALIDATE Xil_DCacheInvalidateRange |
◆ DMA_BASEADDR
| #define DMA_BASEADDR XPAR_AXI_AD463X_DMA_BASEADDR |
◆ GPIO_DEVICE_ID
◆ GPIO_EXTRA
◆ GPIO_OFFSET
◆ GPIO_OPS
◆ GPIO_PGIA_0
◆ GPIO_PGIA_0_PORT
| #define GPIO_PGIA_0_PORT 0 |
◆ GPIO_PGIA_1
◆ GPIO_PGIA_1_PORT
| #define GPIO_PGIA_1_PORT 0 |
◆ GPIO_RESETN_1
◆ GPIO_RESETN_PORT
| #define GPIO_RESETN_PORT 0 |
◆ MAX_SIZE_BASE_ADDR
◆ NO_OS_PWM_ID
◆ PWM_EXTRA
◆ PWM_OPS
◆ REFCLK_RATE
| #define REFCLK_RATE 160000000 |
◆ RX_CLKGEN_BASEADDR
| #define RX_CLKGEN_BASEADDR XPAR_SPI_CLKGEN_BASEADDR |
◆ SAMPLES_PER_CHANNEL_PLATFORM
| #define SAMPLES_PER_CHANNEL_PLATFORM 100000 |
◆ SPI_BAUDRATE
| #define SPI_BAUDRATE 80000000 |
◆ SPI_CS
◆ SPI_DEVICE_ID
◆ SPI_ENG_REF_CLK_FREQ_HZ
| #define SPI_ENG_REF_CLK_FREQ_HZ XPAR_PS7_SPI_0_SPI_CLK_FREQ_HZ |
◆ SPI_ENGINE_BASEADDR
| #define SPI_ENGINE_BASEADDR XPAR_SPI_AD463X_SPI_AD463X_AXI_REGMAP_BASEADDR |
◆ SPI_EXTRA
◆ SPI_OPS
◆ TRIGGER_DUTY_NS
| #define TRIGGER_DUTY_NS 10 |
◆ TRIGGER_PERIOD_NS
| #define TRIGGER_PERIOD_NS 500 |
◆ UART_BAUDRATE
| #define UART_BAUDRATE 115200 |
◆ UART_DEVICE_ID
◆ UART_EXTRA
◆ UART_IRQ_ID
| #define UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR |
◆ UART_OPS
◆ ad4630_axi_pwm_init
◆ gpio_extra_param
◆ spi_eng_init_param
◆ uart_extra_ip