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Header file of ADAS1000 Driver. More...
Go to the source code of this file.
Classes | |
struct | adas1000_dev |
struct | adas1000_init_param |
struct | read_param |
Macros | |
#define | ADAS1000_COMM_WRITE 0x80 /* SPI Write command */ |
#define | ADAS1000_RDY_MASK 0x40 /* READY bit mask */ |
#define | ADAS1000_ALL_CH_MASK 0x00 /* Word mask for activating all channels */ |
#define | ADAS1000_WD_CNT_MASK 0x01 /* Word count mask */ |
#define | ADAS1000_NOP 0x00 /* NOP (No operation) */ |
#define | ADAS1000_ECGCTL 0x01 /* ECG Setting Register */ |
#define | ADAS1000_LOFFCTL 0x02 /* Leads off Control Register */ |
#define | ADAS1000_RESPCTL 0x03 /* Respiration Control Register */ |
#define | ADAS1000_PACECTL 0x04 /* Pace Detection Control Register */ |
#define | ADAS1000_CMREFCTL 0x05 /* Common Mode Reference and Shield Drive Control Register */ |
#define | ADAS1000_GPIOCTL 0x06 /* GPIO Control Register */ |
#define | ADAS1000_PACEAMPTH 0x07 /* Pace Amplitude Threshold2 */ |
#define | ADAS1000_TESTTONE 0x08 /* Test Tone */ |
#define | ADAS1000_CALDAC 0x09 /* Calibration DAC */ |
#define | ADAS1000_FRMCTL 0x0A /* Frame Control Register */ |
#define | ADAS1000_FILTCTL 0x0B /* Filter Control Register */ |
#define | ADAS1000_LOFFUTH 0x0C /* Leads off Upper Threshold */ |
#define | ADAS1000_LOFFLTH 0x0D /* Leads off Lower Threshold */ |
#define | ADAS1000_PACEEDGETH 0x0E /* Pace Edge Threshold */ |
#define | ADAS1000_PACELVLTH 0x0F /* Pace Level Threshold */ |
#define | ADAS1000_LADATA 0x11 /* LA or LEAD I Data */ |
#define | ADAS1000_LLDATA 0x12 /* LL or LEAD II Data */ |
#define | ADAS1000_RADATA 0x13 /* RA or LEAD III Data */ |
#define | ADAS1000_V1DATA 0x14 /* V1 or V1 Data */ |
#define | ADAS1000_V2DATA 0x15 /* V2 or V2 Data */ |
#define | ADAS1000_PACEDATA 0x1A /* Read Pace Detection Data */ |
#define | ADAS1000_RESPMAG 0x1B /* Read Respiration Data Magnitude */ |
#define | ADAS1000_RESPPH 0x1C /* Read Respiration Data Phase */ |
#define | ADAS1000_LOFF 0x1D /* Leads Off Status */ |
#define | ADAS1000_DCLEADSOFF 0x1E /* DC Leads off Register */ |
#define | ADAS1000_EXTENDSW 0x20 /* Extended Switch for respiration inputs */ |
#define | ADAS1000_CALLA 0x21 /* User gain calibration LA */ |
#define | ADAS1000_CALLL 0x22 /* User gain calibration LL */ |
#define | ADAS1000_CALRA 0x23 /* User gain calibration RA */ |
#define | ADAS1000_CALV1 0x24 /* User gain calibration V1 */ |
#define | ADAS1000_CALV2 0x25 /* User gain calibration V2 */ |
#define | ADAS1000_LOAMLA 0x31 /* Leads off Amplitude for LA */ |
#define | ADAS1000_LOAMLL 0x32 /* Leads off Amplitude for LL */ |
#define | ADAS1000_LOAMRA 0x33 /* Leads off Amplitude for RA */ |
#define | ADAS1000_LOAMV1 0x34 /* Leads off Amplitude for V1 */ |
#define | ADAS1000_LOAMV2 0x35 /* Leads off Amplitude for V2 */ |
#define | ADAS1000_PACE1_DATA 0x3A /* Pace1 Width & Amplitude2 */ |
#define | ADAS1000_PACE2_DATA 0x3B /* Pace2 Width & Amplitude2 */ |
#define | ADAS1000_PACE3_DATA 0x3C /* Pace3 Width & Amplitude2 */ |
#define | ADAS1000_FRAMES 0x40 /* Frame Header - Read Data Frames */ |
#define | ADAS1000_CRC 0x41 /* Frame CRC */ |
#define | ADAS1000_ECGCTL_LAEN (1ul << 23) |
#define | ADAS1000_ECGCTL_LLEN (1ul << 22) |
#define | ADAS1000_ECGCTL_RAEN (1ul << 21) |
#define | ADAS1000_ECGCTL_V1EN (1ul << 20) |
#define | ADAS1000_ECGCTL_V2EN (1ul << 19) |
#define | ADAS1000_ECGCTL_CHCONFIG (1ul << 10) |
#define | ADAS1000_ECGCTL_GAIN (1ul << 8) |
#define | ADAS1000_ECGCTL_VREFBUF (1ul << 7) |
#define | ADAS1000_ECGCTL_CLKEXT (1ul << 6) |
#define | ADAS1000_ECGCTL_MASTER (1ul << 5) |
#define | ADAS1000_ECGCTL_GANG (1ul << 4) |
#define | ADAS1000_ECGCTL_HP (1ul << 3) |
#define | ADAS1000_ECGCTL_CNVEN (1ul << 2) |
#define | ADAS1000_ECGCTL_PWREN (1ul << 1) |
#define | ADAS1000_ECGCTL_SWRST (1ul << 0) |
#define | ADAS1000_LOFFCTL_LAPH (1ul << 23) |
#define | ADAS1000_LOFFCTL_LLPH (1ul << 22) |
#define | ADAS1000_LOFFCTL_RAPH (1ul << 21) |
#define | ADAS1000_LOFFCTL_V1PH (1ul << 20) |
#define | ADAS1000_LOFFCTL_V2PH (1ul << 19) |
#define | ADAS1000_LOFFCTL_CEPH (1ul << 18) |
#define | ADAS1000_LOFFCTL_LAACLOEN (1ul << 17) |
#define | ADAS1000_LOFFCTL_LLACLOEN (1ul << 16) |
#define | ADAS1000_LOFFCTL_RAACLOEN (1ul << 15) |
#define | ADAS1000_LOFFCTL_V1ACLOEN (1ul << 14) |
#define | ADAS1000_LOFFCTL_V2ACLOEN (1ul << 13) |
#define | ADAS1000_LOFFCTL_CEACLOEN (1ul << 12) |
#define | ADAS1000_LOFFCTL_ACCURREN (1ul << 7) |
#define | ADAS1000_LOFFCTL_DCCURRENT (1ul << 2) |
#define | ADAS1000_LOFFCTL_ACSEL (1ul << 1) |
#define | ADAS1000_LOFFCTL_LOFFEN (1ul << 0) |
#define | ADAS1000_RESPCTL_RESPEXTSYNC (1ul << 15) |
#define | ADAS1000_RESPCTL_RESPEXTAMP (1ul << 14) |
#define | ADAS1000_RESPCTL_RESPOUT (1ul << 13) |
#define | ADAS1000_RESPCTL_RESPCAP (1ul << 12) |
#define | ADAS1000_RESPCTL_RESPGAIN (1ul << 8) |
#define | ADAS1000_RESPCTL_RESPEXTSEL (1ul << 7) |
#define | ADAS1000_RESPCTL_RESPSEL (1ul << 5) |
#define | ADAS1000_RESPCTL_RESPAMP (1ul << 3) |
#define | ADAS1000_RESPCTL_RESPFREQ (1ul << 1) |
#define | ADAS1000_RESPCTL_RESPEN (1ul << 0) |
#define | ADAS1000_RESPCTL_RESPGAIN_MASK (0x0000000Ful << 8) |
#define | ADAS1000_RESPCTL_RESPSEL_MASK (0x00000003ul << 5) |
#define | ADAS1000_PACECTL_PACEFILTW (1ul << 11) |
#define | ADAS1000_PACECTL_PACETFILT2 (1ul << 10) |
#define | ADAS1000_PACECTL_PACETFILT1 (1ul << 9) |
#define | ADAS1000_PACECTL_PACE3SEL (1ul << 7) |
#define | ADAS1000_PACECTL_PACE2SEL (1ul << 5) |
#define | ADAS1000_PACECTL_PACE1SEL (1ul << 3) |
#define | ADAS1000_PACECTL_PACE3EN (1ul << 2) |
#define | ADAS1000_PACECTL_PACE2EN (1ul << 1) |
#define | ADAS1000_PACECTL_PACE1EN (1ul << 0) |
#define | ADAS1000_PACECTL_PACE3SEL_MASK (0x00000003ul << 7) |
#define | ADAS1000_PACECTL_PACE2SEL_MASK (0x00000003ul << 5) |
#define | ADAS1000_PACECTL_PACE1SEL_MASK (0x00000003ul << 3) |
#define | ADAS1000_CMREFCTL_LACM (1ul << 23) |
#define | ADAS1000_CMREFCTL_LLCM (1ul << 22) |
#define | ADAS1000_CMREFCTL_RACM (1ul << 21) |
#define | ADAS1000_CMREFCTL_V1CM (1ul << 20) |
#define | ADAS1000_CMREFCTL_V2CM (1ul << 19) |
#define | ADAS1000_CMREFCTL_LARLD (1ul << 14) |
#define | ADAS1000_CMREFCTL_LLRLD (1ul << 13) |
#define | ADAS1000_CMREFCTL_RARLD (1ul << 12) |
#define | ADAS1000_CMREFCTL_V1RLD (1ul << 11) |
#define | ADAS1000_CMREFCTL_V2RLD (1ul << 10) |
#define | ADAS1000_CMREFCTL_CERLD (1ul << 9) |
#define | ADAS1000_CMREFCTL_CEREFEN (1ul << 8) |
#define | ADAS1000_CMREFCTL_RLDSEL (1ul << 4) |
#define | ADAS1000_CMREFCTL_DRVCM (1ul << 3) |
#define | ADAS1000_CMREFCTL_EXTCM (1ul << 2) |
#define | ADAS1000_CMREFCTL_RLD_EN (1ul << 1) |
#define | ADAS1000_CMREFCTL_SHLDEN (1ul << 0) |
#define | ADAS1000_CMREFCTL_RLDSEL_MASK (0x0000000Ful << 4) |
#define | ADAS1000_GPIOCTL_SPIFW (1ul << 18) |
#define | ADAS1000_GPIOCTL_SPIEN (1ul << 16) |
#define | ADAS1000_GPIOCTL_G3CTL (1ul << 14) |
#define | ADAS1000_GPIOCTL_G3OUT (1ul << 13) |
#define | ADAS1000_GPIOCTL_G3IN (1ul << 12) |
#define | ADAS1000_GPIOCTL_G2CTL (1ul << 10) |
#define | ADAS1000_GPIOCTL_G2OUT (1ul << 9) |
#define | ADAS1000_GPIOCTL_G2IN (1ul << 8) |
#define | ADAS1000_GPIOCTL_G1CTL (1ul << 6) |
#define | ADAS1000_GPIOCTL_G1OUT (1ul << 5) |
#define | ADAS1000_GPIOCTL_G1IN (1ul << 4) |
#define | ADAS1000_GPIOCTL_G0CTL (1ul << 2) |
#define | ADAS1000_GPIOCTL_G0OUT (1ul << 1) |
#define | ADAS1000_GPIOCTL_G0IN (1ul << 0) |
#define | ADAS1000_GPIOCTL_G3CTL_MASK (0x00000003ul << 14) |
#define | ADAS1000_GPIOCTL_G2CTL_MASK (0x00000003ul << 10) |
#define | ADAS1000_GPIOCTL_G1CTL_MASK (0x00000003ul << 6) |
#define | ADAS1000_GPIOCTL_G0CTL_MASK (0x00000003ul << 2) |
#define | ADAS1000_PACEAMPTH_PACE3AMPTH (1ul << 16) |
#define | ADAS1000_PACEAMPTH_PACE2AMPTH (1ul << 8) |
#define | ADAS1000_PACEAMPTH_PACE1AMPTH (1ul << 0) |
#define | ADAS1000_PACEAMPTH_PACE3AMPTH_MASK (0x000000FFul << 16) |
#define | ADAS1000_PACEAMPTH_PACE2AMPTH_MASK (0x000000FFul << 8) |
#define | ADAS1000_PACEAMPTH_PACE1AMPTH_MASK (0x000000FFul << 0) |
#define | ADAS1000_TESTTONE_TONLA (1ul << 23) |
#define | ADAS1000_TESTTONE_TONLL (1ul << 22) |
#define | ADAS1000_TESTTONE_TONRA (1ul << 21) |
#define | ADAS1000_TESTTONE_TONV1 (1ul << 20) |
#define | ADAS1000_TESTTONE_TONV2 (1ul << 19) |
#define | ADAS1000_TESTTONE_TONTYPE (1ul << 3) |
#define | ADAS1000_TESTTONE_TONINT (1ul << 2) |
#define | ADAS1000_TESTTONE_TONOUT (1ul << 1) |
#define | ADAS1000_TESTTONE_TONEN (1ul << 0) |
#define | ADAS1000_TESTTONE_TONTYPE_MASK (0x00000003ul << 3) |
#define | ADAS1000_CALDAC_CALCHPEN (1ul << 13) |
#define | ADAS1000_CALDAC_CALMODEEN (1ul << 12) |
#define | ADAS1000_CALDAC_CALINT (1ul << 11) |
#define | ADAS1000_CALDAC_CALDACEN (1ul << 10) |
#define | ADAS1000_CALDAC_CALDATA (1ul << 0) |
#define | ADAS1000_CALDAC_CALDATA_MASK (0x000003FFul << 0) |
#define | ADAS1000_FRMCTL_LEAD_I_LADIS (1ul << 23) |
#define | ADAS1000_FRMCTL_LEAD_II_LLDIS (1ul << 22) |
#define | ADAS1000_FRMCTL_LEAD_III_RADIS (1ul << 21) |
#define | ADAS1000_FRMCTL_V1DIS (1ul << 20) |
#define | ADAS1000_FRMCTL_V2DIS (1ul << 19) |
#define | ADAS1000_FRMCTL_PACEDIS (1ul << 14) |
#define | ADAS1000_FRMCTL_RESPMDIS (1ul << 13) |
#define | ADAS1000_FRMCTL_RESPPHDIS (1ul << 12) |
#define | ADAS1000_FRMCTL_LOFFDIS (1ul << 11) |
#define | ADAS1000_FRMCTL_GPIODIS (1ul << 10) |
#define | ADAS1000_FRMCTL_CRCDIS (1ul << 9) |
#define | ADAS1000_FRMCTL_SIGNEDEN (1ul << 8) |
#define | ADAS1000_FRMCTL_ADIS (1ul << 7) |
#define | ADAS1000_FRMCTL_RDYRPT (1ul << 6) |
#define | ADAS1000_FRMCTL_DATAFMT (1ul << 4) |
#define | ADAS1000_FRMCTL_SKIP (1ul << 2) |
#define | ADAS1000_FRMCTL_FRMRATE_2KHZ 0x00 |
#define | ADAS1000_FRMCTL_FRMRATE_16KHZ 0x01 |
#define | ADAS1000_FRMCTL_FRMRATE_128KHZ 0x10 |
#define | ADAS1000_FRMCTL_FRMRATE_31_25HZ 0x11 |
#define | ADAS1000_FRMCTL_WORD_MASK |
#define | ADAS1000_FRMCTL_SKIP_MASK (0x00000003ul << 2) |
#define | ADAS1000_FRMCTL_FRMRATE_MASK (0x00000003ul << 0) |
#define | ADAS1000_FILTCTL_MN2K (1ul << 5) |
#define | ADAS1000_FILTCTL_N2KBP (1ul << 4) |
#define | ADAS1000_FILTCTL_LPF (1ul << 2) |
#define | ADAS1000_FILTCTL_LPF_MASK (0x00000003ul << 2) |
#define | ADAS1000_LOFFUTH_ADCOVER (1ul << 16) |
#define | ADAS1000_LOFFUTH_LOFFUTH (1ul << 0) |
#define | ADAS1000_LOFFUTH_ADCOVER_MASK (0x0000000Ful << 16) |
#define | ADAS1000_LOFFUTH_LOFFUTH_MASK (0x0000FFFFul << 0) |
#define | ADAS1000_LOFFLTH_ADCUNDR (1ul << 16) |
#define | ADAS1000_LOFFLTH_LOFFLTH (1ul << 0) |
#define | ADAS1000_LOFFLTH_ADCUNDR_MASK (0x0000000Ful << 16) |
#define | ADAS1000_LOFFLTH_LOFFLTH_MASK (0x0000FFFFul << 0) |
#define | ADAS1000_PACEEDGETH_PACE3EDGTH (1ul << 16) |
#define | ADAS1000_PACEEDGETH_PACE2EDGTH (1ul << 8) |
#define | ADAS1000_PACEEDGETH_PACE1EDGTH (1ul << 0) |
#define | ADAS1000_PACEEDGETH_PACE3EDGTH_MASK (0x000000FFul << 16) |
#define | ADAS1000_PACEEDGETH_PACE2EDGTH_MASK (0x000000FFul << 8) |
#define | ADAS1000_PACEEDGETH_PACE1EDGTH_MASK (0x000000FFul << 0) |
#define | ADAS1000_PACELVLTH_PACE3LVLTH (1ul << 16) |
#define | ADAS1000_PACELVLTH_PACE2LVLTH (1ul << 8) |
#define | ADAS1000_PACELVLTH_PACE1LVLTH (1ul << 0) |
#define | ADAS1000_PACELVLTH_PACE3LVLTH_MASK (0x000000FFul << 16) |
#define | ADAS1000_PACELVLTH_PACE2LVLTH_MASK (0x000000FFul << 8) |
#define | ADAS1000_PACELVLTH_PACE1LVLTH_MASK (0x000000FFul << 0) |
#define | ADAS1000_LADATA_ADDRESS (1ul << 24) |
#define | ADAS1000_LADATA_ECG_DATA (1ul << 0) |
#define | ADAS1000_LADATA_ADDRESS_MASK (0x000000FFul << 24) |
#define | ADAS1000_LADATA_ECG_DATA_MASK (0x00FFFFFFul << 0) |
#define | ADAS1000_PACEDATA_ADDRESS (1ul << 24) |
#define | ADAS1000_PACEDATA_PACE3_DETECTED (1ul << 23) |
#define | ADAS1000_PACEDATA_PACE_CH3_HEIGHT (1ul << 16) |
#define | ADAS1000_PACEDATA_PACE_CH3_WIDTH (1ul << 20) |
#define | ADAS1000_PACEDATA_PACE2_DETECTED (1ul << 15) |
#define | ADAS1000_PACEDATA_PACE_CH2_WIDTH (1ul << 12) |
#define | ADAS1000_PACEDATA_PACE_CH2_HEIGHT (1ul << 8) |
#define | ADAS1000_PACEDATA_PACE1_DETECTED (1ul << 7) |
#define | ADAS1000_PACEDATA_PACE_CH1_WIDTH (1ul << 4) |
#define | ADAS1000_PACEDATA_CH1_HEIGHT (1ul << 0) |
#define | ADAS1000_PACEDATA_ADDRESS_MASK (0x000000FFul << 24) |
#define | ADAS1000_PACEDATA_PACE_CH3_WIDTH_MASK (0x00000007ul << 20) |
#define | ADAS1000_PACEDATA_PACE_CH3_HEIGHT_MASK (0x0000000Ful << 16) |
#define | ADAS1000_PACEDATA_PACE_CH2_WIDTH_MASK (0x00000007ul << 12) |
#define | ADAS1000_PACEDATA_PACE_CH2_HEIGHT_MASK (0x0000000Ful << 8) |
#define | ADAS1000_PACEDATA_PACE_CH1_WIDTH_MASK (0x00000007ul << 4) |
#define | ADAS1000_PACEDATA_PACE_CH1_HEIGHT_MASK (0x0000000Ful << 0) |
#define | ADAS1000_RESPMAG_ADDRESS (1ul << 24) |
#define | ADAS1000_RESPMAG_MAGNITUDE (1ul << 0) |
#define | ADAS1000_RESPMAG_ADDRESS_MASK (0x000000FFul << 24) |
#define | ADAS1000_RESPMAG_MAGNITUDE_MASK (0x00FFFFFFul << 0) |
#define | ADAS1000_RESPPH_ADDRESS (1ul << 24) |
#define | ADAS1000_RESPPH_PHASE (1ul << 0) |
#define | ADAS1000_RESPPH_ADDRESS_MASK (0x000000FFul << 24) |
#define | ADAS1000_RESPPH_PHASE_MASK (0x00FFFFFFul << 0) |
#define | ADAS1000_LOFF_ADDRESS (1ul << 24) |
#define | ADAS1000_LOFF_RL_LEADS_OFF_STATUS (1ul << 23) |
#define | ADAS1000_LOFF_LA_LEADS_OFF_STATUS (1ul << 22) |
#define | ADAS1000_LOFF_LL_LEADS_OFF_STATUS (1ul << 21) |
#define | ADAS1000_LOFF_RA_LEADS_OFF_STATUS (1ul << 20) |
#define | ADAS1000_LOFF_V1_LEADS_OFF_STATUS (1ul << 19) |
#define | ADAS1000_LOFF_V2_LEADS_OFF_STATUS (1ul << 18) |
#define | ADAS1000_LOFF_CELO (1ul << 13) |
#define | ADAS1000_LOFF_LAADCOR (1ul << 12) |
#define | ADAS1000_LOFF_LLADCOR (1ul << 11) |
#define | ADAS1000_LOFF_RAADCOR (1ul << 10) |
#define | ADAS1000_LOFF_V1ADCOR (1ul << 9) |
#define | ADAS1000_LOFF_V2ADCOR (1ul << 8) |
#define | ADAS1000_LOFF_ADDRESS_MASK (0x000000FFul << 24) |
#define | ADAS1000_DCLEADSOFF_ADDRESS (1ul << 24) |
#define | ADAS1000_DCLEADSOFF_RL_INPUT_OVERRANGE (1ul << 23) |
#define | ADAS1000_DCLEADSOFF_LA_INPUT_OVERRANGE (1ul << 22) |
#define | ADAS1000_DCLEADSOFF_LL_INPUT_OVERRANGE (1ul << 21) |
#define | ADAS1000_DCLEADSOFF_RA_INPUT_OVERRANGE (1ul << 20) |
#define | ADAS1000_DCLEADSOFF_CE_INPUT_OVERRANGE (1ul << 13) |
#define | ADAS1000_DCLEADSOFF_RL_INPUT_UNDERRANGE (1ul << 12) |
#define | ADAS1000_DCLEADSOFF_LA_INPUT_UNDERRANGE (1ul << 11) |
#define | ADAS1000_DCLEADSOFF_LL_INPUT_UNDERRANGE (1ul << 10) |
#define | ADAS1000_DCLEADSOFF_RA_INPUT_UNDERRANGE (1ul << 9) |
#define | ADAS1000_DCLEADSOFF_CE_INPUT_UNDERRANGE (1ul << 2) |
#define | ADAS1000_DCLEADSOFF_ADDRESS_MASK (0x000000FFul << 24) |
#define | ADAS1000_EXTENDSW_EXTRESP_RA_LA (1ul << 23) |
#define | ADAS1000_EXTENDSW_EXTRESP_RA_LL (1ul << 22) |
#define | ADAS1000_EXTENDSW_EXTRESP_RA_RA (1ul << 21) |
#define | ADAS1000_EXTENDSW_EXTRESP_RA_V1 (1ul << 20) |
#define | ADAS1000_EXTENDSW_EXTRESP_RA_V2 (1ul << 19) |
#define | ADAS1000_EXTENDSW_EXTRESP_LL_LA (1ul << 18) |
#define | ADAS1000_EXTENDSW_EXTRESP_LL_LL (1ul << 17) |
#define | ADAS1000_EXTENDSW_EXTRESP_LL_RA (1ul << 16) |
#define | ADAS1000_EXTENDSW_EXTRESP_LL_V1 (1ul << 15) |
#define | ADAS1000_EXTENDSW_EXTRESP_LL_V2 (1ul << 14) |
#define | ADAS1000_EXTENDSW_EXTRESP_LA_LA (1ul << 13) |
#define | ADAS1000_EXTENDSW_EXTRESP_LA_LL (1ul << 12) |
#define | ADAS1000_EXTENDSW_EXTRESP_LA_RA (1ul << 11) |
#define | ADAS1000_EXTENDSW_EXTRESP_LA_V1 (1ul << 10) |
#define | ADAS1000_EXTENDSW_EXTRESP_LA_V2 (1ul << 9) |
#define | ADAS1000_EXTENDSW_FREE_V1 (1ul << 8) |
#define | ADAS1000_EXTENDSW_FREE_V2 (1ul << 7) |
#define | ADAS1000_EXTENDSW_NOMATH_V1 (1ul << 6) |
#define | ADAS1000_EXTENDSW_NOMATH_V2 (1ul << 5) |
#define | ADAS1000_CAL_ADDRESS (1ul << 24) |
#define | ADAS1000_CAL_USRCAL (1ul << 23) |
#define | ADAS1000_CAL_CALVALUE (1ul << 0) |
#define | ADAS1000_CAL_ADDRESS_MASK (0x000000FFul << 24) |
#define | ADAS1000_CAL_CALVALUE_MASK (0x00000FFFul << 0) |
#define | ADAS1000_LOAM_ADDRESS (1ul << 24) |
#define | ADAS1000_LOAM_LOFFAM (1ul << 0) |
#define | ADAS1000_LOAM_ADDRESS_MASK (0x000000FFul << 24) |
#define | ADAS1000_LOAM_LOFFAM_MASK (0x0000FFFFul << 0) |
#define | ADAS1000_PACE_DATA_ADDRESS (1ul << 24) |
#define | ADAS1000_PACE_DATA_HEIGHT (1ul << 8) |
#define | ADAS1000_PACE_DATA_WIDTH (1ul << 0) |
#define | ADAS1000_PACE_DATA_ADDRESS_MASK (0x000000FFul << 24) |
#define | ADAS1000_PACE_DATA_HEIGHT_MASK (0x0000FFFFul << 8) |
#define | ADAS1000_PACE_DATA_WIDTH_MASK (0x000000FFul << 0) |
#define | ADAS1000_FRAMES_MARKER (1ul << 31) |
#define | ADAS1000_FRAMES_READY_BIT (1ul << 30) |
#define | ADAS1000_FRAMES_OVERFLOW (1ul << 28) |
#define | ADAS1000_FRAMES_FAULT (1ul << 27) |
#define | ADAS1000_FRAMES_PACE3_DETECTED (1ul << 26) |
#define | ADAS1000_FRAMES_PACE2_DETECTED (1ul << 25) |
#define | ADAS1000_FRAMES_PACE1_DETECTED (1ul << 24) |
#define | ADAS1000_FRAMES_RESPIRATION (1ul << 23) |
#define | ADAS1000_FRAMES_LEADS_OFF_DETECTED (1ul << 22) |
#define | ADAS1000_FRAMES_DC_LEADS_OFF_DETECTED (1ul << 21) |
#define | ADAS1000_FRAMES_ADC_OUT_OF_RANGE (1ul << 20) |
#define | ADAS1000_CRC_MASK (0x00FFFFFF << 0) |
#define | ADAS1000_31_25HZ_FRAME_RATE 3125 |
#define | ADAS1000_2KHZ_FRAME_RATE 2000 |
#define | ADAS1000_16KHZ_FRAME_RATE 16000 |
#define | ADAS1000_128KHZ_FRAME_RATE 128000 |
#define | ADAS1000_31_25HZ_WORD_SIZE 32 |
#define | ADAS1000_2KHZ_WORD_SIZE 32 |
#define | ADAS1000_16KHZ_WORD_SIZE 32 |
#define | ADAS1000_128KHZ_WORD_SIZE 16 |
#define | ADAS1000_31_25HZ_FRAME_SIZE 12 |
#define | ADAS1000_2KHZ_FRAME_SIZE 12 |
#define | ADAS1000_16KHZ_FRAME_SIZE 12 |
#define | ADAS1000_128KHZ_FRAME_SIZE 15 |
#define | CRC_POLY_2KHZ_16KHZ 0x005D6DCBul |
#define | CRC_CHECK_CONST_2KHZ_16KHZ 0x0015A0BAul |
#define | CRC_POLY_128KHZ 0x00001021ul |
#define | CRC_CHECK_CONST_128KHz 0x00001D0Ful |
Functions | |
int32_t | adas1000_compute_spi_freq (struct adas1000_init_param *init_param, uint32_t *spi_freq) |
Preliminary function which computes the spi frequency based on the frame rate value passed input parameter. More... | |
int32_t | adas1000_init (struct adas1000_dev **device, const struct adas1000_init_param *init_param) |
Initializes the SPI communication with ADAS1000. The ADAS1000 is configured with the specified frame rate and all the words in a frame are activated. More... | |
int32_t | adas1000_read (struct adas1000_dev *device, uint8_t reg_addr, uint32_t *reg_data) |
Read device register. More... | |
int32_t | adas1000_write (struct adas1000_dev *device, uint8_t reg_addr, uint32_t reg_data) |
Write device register. More... | |
int32_t | adas1000_soft_reset (struct adas1000_dev *device) |
Software reset of the device. More... | |
int32_t | adas1000_compute_frame_size (struct adas1000_dev *device) |
Compute frame size. More... | |
int32_t | adas1000_set_inactive_framewords (struct adas1000_dev *device, uint32_t words_mask) |
Selects which words are not included in a data frame. More... | |
int32_t | adas1000_set_frame_rate (struct adas1000_dev *device, uint32_t rate) |
Sets the frame rate. More... | |
int32_t | adas1000_read_data (struct adas1000_dev *device, uint8_t *data_buff, uint32_t frame_cnt, struct read_param *read_data_param) |
Reads the specified number of frames. More... | |
uint32_t | adas1000_compute_frame_crc (struct adas1000_dev *device, uint8_t *buff) |
Computes the CRC for a frame. More... | |
Header file of ADAS1000 Driver.
Copyright 2012-2021(c) Analog Devices, Inc.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define ADAS1000_128KHZ_FRAME_RATE 128000 |
#define ADAS1000_128KHZ_FRAME_SIZE 15 |
#define ADAS1000_128KHZ_WORD_SIZE 16 |
#define ADAS1000_16KHZ_FRAME_RATE 16000 |
#define ADAS1000_16KHZ_FRAME_SIZE 12 |
#define ADAS1000_16KHZ_WORD_SIZE 32 |
#define ADAS1000_2KHZ_FRAME_RATE 2000 |
#define ADAS1000_2KHZ_FRAME_SIZE 12 |
#define ADAS1000_2KHZ_WORD_SIZE 32 |
#define ADAS1000_31_25HZ_FRAME_RATE 3125 |
#define ADAS1000_31_25HZ_FRAME_SIZE 12 |
#define ADAS1000_31_25HZ_WORD_SIZE 32 |
#define ADAS1000_ALL_CH_MASK 0x00 /* Word mask for activating all channels */ |
#define ADAS1000_CAL_ADDRESS (1ul << 24) |
#define ADAS1000_CAL_ADDRESS_MASK (0x000000FFul << 24) |
#define ADAS1000_CAL_CALVALUE (1ul << 0) |
#define ADAS1000_CAL_CALVALUE_MASK (0x00000FFFul << 0) |
#define ADAS1000_CAL_USRCAL (1ul << 23) |
#define ADAS1000_CALDAC 0x09 /* Calibration DAC */ |
#define ADAS1000_CALDAC_CALCHPEN (1ul << 13) |
#define ADAS1000_CALDAC_CALDACEN (1ul << 10) |
#define ADAS1000_CALDAC_CALDATA (1ul << 0) |
#define ADAS1000_CALDAC_CALDATA_MASK (0x000003FFul << 0) |
#define ADAS1000_CALDAC_CALINT (1ul << 11) |
#define ADAS1000_CALDAC_CALMODEEN (1ul << 12) |
#define ADAS1000_CALLA 0x21 /* User gain calibration LA */ |
#define ADAS1000_CALLL 0x22 /* User gain calibration LL */ |
#define ADAS1000_CALRA 0x23 /* User gain calibration RA */ |
#define ADAS1000_CALV1 0x24 /* User gain calibration V1 */ |
#define ADAS1000_CALV2 0x25 /* User gain calibration V2 */ |
#define ADAS1000_CMREFCTL 0x05 /* Common Mode Reference and Shield Drive Control Register */ |
#define ADAS1000_CMREFCTL_CEREFEN (1ul << 8) |
#define ADAS1000_CMREFCTL_CERLD (1ul << 9) |
#define ADAS1000_CMREFCTL_DRVCM (1ul << 3) |
#define ADAS1000_CMREFCTL_EXTCM (1ul << 2) |
#define ADAS1000_CMREFCTL_LACM (1ul << 23) |
#define ADAS1000_CMREFCTL_LARLD (1ul << 14) |
#define ADAS1000_CMREFCTL_LLCM (1ul << 22) |
#define ADAS1000_CMREFCTL_LLRLD (1ul << 13) |
#define ADAS1000_CMREFCTL_RACM (1ul << 21) |
#define ADAS1000_CMREFCTL_RARLD (1ul << 12) |
#define ADAS1000_CMREFCTL_RLD_EN (1ul << 1) |
#define ADAS1000_CMREFCTL_RLDSEL (1ul << 4) |
#define ADAS1000_CMREFCTL_RLDSEL_MASK (0x0000000Ful << 4) |
#define ADAS1000_CMREFCTL_SHLDEN (1ul << 0) |
#define ADAS1000_CMREFCTL_V1CM (1ul << 20) |
#define ADAS1000_CMREFCTL_V1RLD (1ul << 11) |
#define ADAS1000_CMREFCTL_V2CM (1ul << 19) |
#define ADAS1000_CMREFCTL_V2RLD (1ul << 10) |
#define ADAS1000_COMM_WRITE 0x80 /* SPI Write command */ |
#define ADAS1000_CRC 0x41 /* Frame CRC */ |
#define ADAS1000_CRC_MASK (0x00FFFFFF << 0) |
#define ADAS1000_DCLEADSOFF 0x1E /* DC Leads off Register */ |
#define ADAS1000_DCLEADSOFF_ADDRESS (1ul << 24) |
#define ADAS1000_DCLEADSOFF_ADDRESS_MASK (0x000000FFul << 24) |
#define ADAS1000_DCLEADSOFF_CE_INPUT_OVERRANGE (1ul << 13) |
#define ADAS1000_DCLEADSOFF_CE_INPUT_UNDERRANGE (1ul << 2) |
#define ADAS1000_DCLEADSOFF_LA_INPUT_OVERRANGE (1ul << 22) |
#define ADAS1000_DCLEADSOFF_LA_INPUT_UNDERRANGE (1ul << 11) |
#define ADAS1000_DCLEADSOFF_LL_INPUT_OVERRANGE (1ul << 21) |
#define ADAS1000_DCLEADSOFF_LL_INPUT_UNDERRANGE (1ul << 10) |
#define ADAS1000_DCLEADSOFF_RA_INPUT_OVERRANGE (1ul << 20) |
#define ADAS1000_DCLEADSOFF_RA_INPUT_UNDERRANGE (1ul << 9) |
#define ADAS1000_DCLEADSOFF_RL_INPUT_OVERRANGE (1ul << 23) |
#define ADAS1000_DCLEADSOFF_RL_INPUT_UNDERRANGE (1ul << 12) |
#define ADAS1000_ECGCTL 0x01 /* ECG Setting Register */ |
#define ADAS1000_ECGCTL_CHCONFIG (1ul << 10) |
#define ADAS1000_ECGCTL_CLKEXT (1ul << 6) |
#define ADAS1000_ECGCTL_CNVEN (1ul << 2) |
#define ADAS1000_ECGCTL_GAIN (1ul << 8) |
#define ADAS1000_ECGCTL_GANG (1ul << 4) |
#define ADAS1000_ECGCTL_HP (1ul << 3) |
#define ADAS1000_ECGCTL_LAEN (1ul << 23) |
#define ADAS1000_ECGCTL_LLEN (1ul << 22) |
#define ADAS1000_ECGCTL_MASTER (1ul << 5) |
#define ADAS1000_ECGCTL_PWREN (1ul << 1) |
#define ADAS1000_ECGCTL_RAEN (1ul << 21) |
#define ADAS1000_ECGCTL_SWRST (1ul << 0) |
#define ADAS1000_ECGCTL_V1EN (1ul << 20) |
#define ADAS1000_ECGCTL_V2EN (1ul << 19) |
#define ADAS1000_ECGCTL_VREFBUF (1ul << 7) |
#define ADAS1000_EXTENDSW 0x20 /* Extended Switch for respiration inputs */ |
#define ADAS1000_EXTENDSW_EXTRESP_LA_LA (1ul << 13) |
#define ADAS1000_EXTENDSW_EXTRESP_LA_LL (1ul << 12) |
#define ADAS1000_EXTENDSW_EXTRESP_LA_RA (1ul << 11) |
#define ADAS1000_EXTENDSW_EXTRESP_LA_V1 (1ul << 10) |
#define ADAS1000_EXTENDSW_EXTRESP_LA_V2 (1ul << 9) |
#define ADAS1000_EXTENDSW_EXTRESP_LL_LA (1ul << 18) |
#define ADAS1000_EXTENDSW_EXTRESP_LL_LL (1ul << 17) |
#define ADAS1000_EXTENDSW_EXTRESP_LL_RA (1ul << 16) |
#define ADAS1000_EXTENDSW_EXTRESP_LL_V1 (1ul << 15) |
#define ADAS1000_EXTENDSW_EXTRESP_LL_V2 (1ul << 14) |
#define ADAS1000_EXTENDSW_EXTRESP_RA_LA (1ul << 23) |
#define ADAS1000_EXTENDSW_EXTRESP_RA_LL (1ul << 22) |
#define ADAS1000_EXTENDSW_EXTRESP_RA_RA (1ul << 21) |
#define ADAS1000_EXTENDSW_EXTRESP_RA_V1 (1ul << 20) |
#define ADAS1000_EXTENDSW_EXTRESP_RA_V2 (1ul << 19) |
#define ADAS1000_EXTENDSW_FREE_V1 (1ul << 8) |
#define ADAS1000_EXTENDSW_FREE_V2 (1ul << 7) |
#define ADAS1000_EXTENDSW_NOMATH_V1 (1ul << 6) |
#define ADAS1000_EXTENDSW_NOMATH_V2 (1ul << 5) |
#define ADAS1000_FILTCTL 0x0B /* Filter Control Register */ |
#define ADAS1000_FILTCTL_LPF (1ul << 2) |
#define ADAS1000_FILTCTL_LPF_MASK (0x00000003ul << 2) |
#define ADAS1000_FILTCTL_MN2K (1ul << 5) |
#define ADAS1000_FILTCTL_N2KBP (1ul << 4) |
#define ADAS1000_FRAMES 0x40 /* Frame Header - Read Data Frames */ |
#define ADAS1000_FRAMES_ADC_OUT_OF_RANGE (1ul << 20) |
#define ADAS1000_FRAMES_DC_LEADS_OFF_DETECTED (1ul << 21) |
#define ADAS1000_FRAMES_FAULT (1ul << 27) |
#define ADAS1000_FRAMES_LEADS_OFF_DETECTED (1ul << 22) |
#define ADAS1000_FRAMES_MARKER (1ul << 31) |
#define ADAS1000_FRAMES_OVERFLOW (1ul << 28) |
#define ADAS1000_FRAMES_PACE1_DETECTED (1ul << 24) |
#define ADAS1000_FRAMES_PACE2_DETECTED (1ul << 25) |
#define ADAS1000_FRAMES_PACE3_DETECTED (1ul << 26) |
#define ADAS1000_FRAMES_READY_BIT (1ul << 30) |
#define ADAS1000_FRAMES_RESPIRATION (1ul << 23) |
#define ADAS1000_FRMCTL 0x0A /* Frame Control Register */ |
#define ADAS1000_FRMCTL_ADIS (1ul << 7) |
#define ADAS1000_FRMCTL_CRCDIS (1ul << 9) |
#define ADAS1000_FRMCTL_DATAFMT (1ul << 4) |
#define ADAS1000_FRMCTL_FRMRATE_128KHZ 0x10 |
#define ADAS1000_FRMCTL_FRMRATE_16KHZ 0x01 |
#define ADAS1000_FRMCTL_FRMRATE_2KHZ 0x00 |
#define ADAS1000_FRMCTL_FRMRATE_31_25HZ 0x11 |
#define ADAS1000_FRMCTL_FRMRATE_MASK (0x00000003ul << 0) |
#define ADAS1000_FRMCTL_GPIODIS (1ul << 10) |
#define ADAS1000_FRMCTL_LEAD_I_LADIS (1ul << 23) |
#define ADAS1000_FRMCTL_LEAD_II_LLDIS (1ul << 22) |
#define ADAS1000_FRMCTL_LEAD_III_RADIS (1ul << 21) |
#define ADAS1000_FRMCTL_LOFFDIS (1ul << 11) |
#define ADAS1000_FRMCTL_PACEDIS (1ul << 14) |
#define ADAS1000_FRMCTL_RDYRPT (1ul << 6) |
#define ADAS1000_FRMCTL_RESPMDIS (1ul << 13) |
#define ADAS1000_FRMCTL_RESPPHDIS (1ul << 12) |
#define ADAS1000_FRMCTL_SIGNEDEN (1ul << 8) |
#define ADAS1000_FRMCTL_SKIP (1ul << 2) |
#define ADAS1000_FRMCTL_SKIP_MASK (0x00000003ul << 2) |
#define ADAS1000_FRMCTL_V1DIS (1ul << 20) |
#define ADAS1000_FRMCTL_V2DIS (1ul << 19) |
#define ADAS1000_FRMCTL_WORD_MASK |
#define ADAS1000_GPIOCTL 0x06 /* GPIO Control Register */ |
#define ADAS1000_GPIOCTL_G0CTL (1ul << 2) |
#define ADAS1000_GPIOCTL_G0CTL_MASK (0x00000003ul << 2) |
#define ADAS1000_GPIOCTL_G0IN (1ul << 0) |
#define ADAS1000_GPIOCTL_G0OUT (1ul << 1) |
#define ADAS1000_GPIOCTL_G1CTL (1ul << 6) |
#define ADAS1000_GPIOCTL_G1CTL_MASK (0x00000003ul << 6) |
#define ADAS1000_GPIOCTL_G1IN (1ul << 4) |
#define ADAS1000_GPIOCTL_G1OUT (1ul << 5) |
#define ADAS1000_GPIOCTL_G2CTL (1ul << 10) |
#define ADAS1000_GPIOCTL_G2CTL_MASK (0x00000003ul << 10) |
#define ADAS1000_GPIOCTL_G2IN (1ul << 8) |
#define ADAS1000_GPIOCTL_G2OUT (1ul << 9) |
#define ADAS1000_GPIOCTL_G3CTL (1ul << 14) |
#define ADAS1000_GPIOCTL_G3CTL_MASK (0x00000003ul << 14) |
#define ADAS1000_GPIOCTL_G3IN (1ul << 12) |
#define ADAS1000_GPIOCTL_G3OUT (1ul << 13) |
#define ADAS1000_GPIOCTL_SPIEN (1ul << 16) |
#define ADAS1000_GPIOCTL_SPIFW (1ul << 18) |
#define ADAS1000_LADATA 0x11 /* LA or LEAD I Data */ |
#define ADAS1000_LADATA_ADDRESS (1ul << 24) |
#define ADAS1000_LADATA_ADDRESS_MASK (0x000000FFul << 24) |
#define ADAS1000_LADATA_ECG_DATA (1ul << 0) |
#define ADAS1000_LADATA_ECG_DATA_MASK (0x00FFFFFFul << 0) |
#define ADAS1000_LLDATA 0x12 /* LL or LEAD II Data */ |
#define ADAS1000_LOAM_ADDRESS (1ul << 24) |
#define ADAS1000_LOAM_ADDRESS_MASK (0x000000FFul << 24) |
#define ADAS1000_LOAM_LOFFAM (1ul << 0) |
#define ADAS1000_LOAM_LOFFAM_MASK (0x0000FFFFul << 0) |
#define ADAS1000_LOAMLA 0x31 /* Leads off Amplitude for LA */ |
#define ADAS1000_LOAMLL 0x32 /* Leads off Amplitude for LL */ |
#define ADAS1000_LOAMRA 0x33 /* Leads off Amplitude for RA */ |
#define ADAS1000_LOAMV1 0x34 /* Leads off Amplitude for V1 */ |
#define ADAS1000_LOAMV2 0x35 /* Leads off Amplitude for V2 */ |
#define ADAS1000_LOFF 0x1D /* Leads Off Status */ |
#define ADAS1000_LOFF_ADDRESS (1ul << 24) |
#define ADAS1000_LOFF_ADDRESS_MASK (0x000000FFul << 24) |
#define ADAS1000_LOFF_CELO (1ul << 13) |
#define ADAS1000_LOFF_LA_LEADS_OFF_STATUS (1ul << 22) |
#define ADAS1000_LOFF_LAADCOR (1ul << 12) |
#define ADAS1000_LOFF_LL_LEADS_OFF_STATUS (1ul << 21) |
#define ADAS1000_LOFF_LLADCOR (1ul << 11) |
#define ADAS1000_LOFF_RA_LEADS_OFF_STATUS (1ul << 20) |
#define ADAS1000_LOFF_RAADCOR (1ul << 10) |
#define ADAS1000_LOFF_RL_LEADS_OFF_STATUS (1ul << 23) |
#define ADAS1000_LOFF_V1_LEADS_OFF_STATUS (1ul << 19) |
#define ADAS1000_LOFF_V1ADCOR (1ul << 9) |
#define ADAS1000_LOFF_V2_LEADS_OFF_STATUS (1ul << 18) |
#define ADAS1000_LOFF_V2ADCOR (1ul << 8) |
#define ADAS1000_LOFFCTL 0x02 /* Leads off Control Register */ |
#define ADAS1000_LOFFCTL_ACCURREN (1ul << 7) |
#define ADAS1000_LOFFCTL_ACSEL (1ul << 1) |
#define ADAS1000_LOFFCTL_CEACLOEN (1ul << 12) |
#define ADAS1000_LOFFCTL_CEPH (1ul << 18) |
#define ADAS1000_LOFFCTL_DCCURRENT (1ul << 2) |
#define ADAS1000_LOFFCTL_LAACLOEN (1ul << 17) |
#define ADAS1000_LOFFCTL_LAPH (1ul << 23) |
#define ADAS1000_LOFFCTL_LLACLOEN (1ul << 16) |
#define ADAS1000_LOFFCTL_LLPH (1ul << 22) |
#define ADAS1000_LOFFCTL_LOFFEN (1ul << 0) |
#define ADAS1000_LOFFCTL_RAACLOEN (1ul << 15) |
#define ADAS1000_LOFFCTL_RAPH (1ul << 21) |
#define ADAS1000_LOFFCTL_V1ACLOEN (1ul << 14) |
#define ADAS1000_LOFFCTL_V1PH (1ul << 20) |
#define ADAS1000_LOFFCTL_V2ACLOEN (1ul << 13) |
#define ADAS1000_LOFFCTL_V2PH (1ul << 19) |
#define ADAS1000_LOFFLTH 0x0D /* Leads off Lower Threshold */ |
#define ADAS1000_LOFFLTH_ADCUNDR (1ul << 16) |
#define ADAS1000_LOFFLTH_ADCUNDR_MASK (0x0000000Ful << 16) |
#define ADAS1000_LOFFLTH_LOFFLTH (1ul << 0) |
#define ADAS1000_LOFFLTH_LOFFLTH_MASK (0x0000FFFFul << 0) |
#define ADAS1000_LOFFUTH 0x0C /* Leads off Upper Threshold */ |
#define ADAS1000_LOFFUTH_ADCOVER (1ul << 16) |
#define ADAS1000_LOFFUTH_ADCOVER_MASK (0x0000000Ful << 16) |
#define ADAS1000_LOFFUTH_LOFFUTH (1ul << 0) |
#define ADAS1000_LOFFUTH_LOFFUTH_MASK (0x0000FFFFul << 0) |
#define ADAS1000_NOP 0x00 /* NOP (No operation) */ |
#define ADAS1000_PACE1_DATA 0x3A /* Pace1 Width & Amplitude2 */ |
#define ADAS1000_PACE2_DATA 0x3B /* Pace2 Width & Amplitude2 */ |
#define ADAS1000_PACE3_DATA 0x3C /* Pace3 Width & Amplitude2 */ |
#define ADAS1000_PACE_DATA_ADDRESS (1ul << 24) |
#define ADAS1000_PACE_DATA_ADDRESS_MASK (0x000000FFul << 24) |
#define ADAS1000_PACE_DATA_HEIGHT (1ul << 8) |
#define ADAS1000_PACE_DATA_HEIGHT_MASK (0x0000FFFFul << 8) |
#define ADAS1000_PACE_DATA_WIDTH (1ul << 0) |
#define ADAS1000_PACE_DATA_WIDTH_MASK (0x000000FFul << 0) |
#define ADAS1000_PACEAMPTH 0x07 /* Pace Amplitude Threshold2 */ |
#define ADAS1000_PACEAMPTH_PACE1AMPTH (1ul << 0) |
#define ADAS1000_PACEAMPTH_PACE1AMPTH_MASK (0x000000FFul << 0) |
#define ADAS1000_PACEAMPTH_PACE2AMPTH (1ul << 8) |
#define ADAS1000_PACEAMPTH_PACE2AMPTH_MASK (0x000000FFul << 8) |
#define ADAS1000_PACEAMPTH_PACE3AMPTH (1ul << 16) |
#define ADAS1000_PACEAMPTH_PACE3AMPTH_MASK (0x000000FFul << 16) |
#define ADAS1000_PACECTL 0x04 /* Pace Detection Control Register */ |
#define ADAS1000_PACECTL_PACE1EN (1ul << 0) |
#define ADAS1000_PACECTL_PACE1SEL (1ul << 3) |
#define ADAS1000_PACECTL_PACE1SEL_MASK (0x00000003ul << 3) |
#define ADAS1000_PACECTL_PACE2EN (1ul << 1) |
#define ADAS1000_PACECTL_PACE2SEL (1ul << 5) |
#define ADAS1000_PACECTL_PACE2SEL_MASK (0x00000003ul << 5) |
#define ADAS1000_PACECTL_PACE3EN (1ul << 2) |
#define ADAS1000_PACECTL_PACE3SEL (1ul << 7) |
#define ADAS1000_PACECTL_PACE3SEL_MASK (0x00000003ul << 7) |
#define ADAS1000_PACECTL_PACEFILTW (1ul << 11) |
#define ADAS1000_PACECTL_PACETFILT1 (1ul << 9) |
#define ADAS1000_PACECTL_PACETFILT2 (1ul << 10) |
#define ADAS1000_PACEDATA 0x1A /* Read Pace Detection Data */ |
#define ADAS1000_PACEDATA_ADDRESS (1ul << 24) |
#define ADAS1000_PACEDATA_ADDRESS_MASK (0x000000FFul << 24) |
#define ADAS1000_PACEDATA_CH1_HEIGHT (1ul << 0) |
#define ADAS1000_PACEDATA_PACE1_DETECTED (1ul << 7) |
#define ADAS1000_PACEDATA_PACE2_DETECTED (1ul << 15) |
#define ADAS1000_PACEDATA_PACE3_DETECTED (1ul << 23) |
#define ADAS1000_PACEDATA_PACE_CH1_HEIGHT_MASK (0x0000000Ful << 0) |
#define ADAS1000_PACEDATA_PACE_CH1_WIDTH (1ul << 4) |
#define ADAS1000_PACEDATA_PACE_CH1_WIDTH_MASK (0x00000007ul << 4) |
#define ADAS1000_PACEDATA_PACE_CH2_HEIGHT (1ul << 8) |
#define ADAS1000_PACEDATA_PACE_CH2_HEIGHT_MASK (0x0000000Ful << 8) |
#define ADAS1000_PACEDATA_PACE_CH2_WIDTH (1ul << 12) |
#define ADAS1000_PACEDATA_PACE_CH2_WIDTH_MASK (0x00000007ul << 12) |
#define ADAS1000_PACEDATA_PACE_CH3_HEIGHT (1ul << 16) |
#define ADAS1000_PACEDATA_PACE_CH3_HEIGHT_MASK (0x0000000Ful << 16) |
#define ADAS1000_PACEDATA_PACE_CH3_WIDTH (1ul << 20) |
#define ADAS1000_PACEDATA_PACE_CH3_WIDTH_MASK (0x00000007ul << 20) |
#define ADAS1000_PACEEDGETH 0x0E /* Pace Edge Threshold */ |
#define ADAS1000_PACEEDGETH_PACE1EDGTH (1ul << 0) |
#define ADAS1000_PACEEDGETH_PACE1EDGTH_MASK (0x000000FFul << 0) |
#define ADAS1000_PACEEDGETH_PACE2EDGTH (1ul << 8) |
#define ADAS1000_PACEEDGETH_PACE2EDGTH_MASK (0x000000FFul << 8) |
#define ADAS1000_PACEEDGETH_PACE3EDGTH (1ul << 16) |
#define ADAS1000_PACEEDGETH_PACE3EDGTH_MASK (0x000000FFul << 16) |
#define ADAS1000_PACELVLTH 0x0F /* Pace Level Threshold */ |
#define ADAS1000_PACELVLTH_PACE1LVLTH (1ul << 0) |
#define ADAS1000_PACELVLTH_PACE1LVLTH_MASK (0x000000FFul << 0) |
#define ADAS1000_PACELVLTH_PACE2LVLTH (1ul << 8) |
#define ADAS1000_PACELVLTH_PACE2LVLTH_MASK (0x000000FFul << 8) |
#define ADAS1000_PACELVLTH_PACE3LVLTH (1ul << 16) |
#define ADAS1000_PACELVLTH_PACE3LVLTH_MASK (0x000000FFul << 16) |
#define ADAS1000_RADATA 0x13 /* RA or LEAD III Data */ |
#define ADAS1000_RDY_MASK 0x40 /* READY bit mask */ |
#define ADAS1000_RESPCTL 0x03 /* Respiration Control Register */ |
#define ADAS1000_RESPCTL_RESPAMP (1ul << 3) |
#define ADAS1000_RESPCTL_RESPCAP (1ul << 12) |
#define ADAS1000_RESPCTL_RESPEN (1ul << 0) |
#define ADAS1000_RESPCTL_RESPEXTAMP (1ul << 14) |
#define ADAS1000_RESPCTL_RESPEXTSEL (1ul << 7) |
#define ADAS1000_RESPCTL_RESPEXTSYNC (1ul << 15) |
#define ADAS1000_RESPCTL_RESPFREQ (1ul << 1) |
#define ADAS1000_RESPCTL_RESPGAIN (1ul << 8) |
#define ADAS1000_RESPCTL_RESPGAIN_MASK (0x0000000Ful << 8) |
#define ADAS1000_RESPCTL_RESPOUT (1ul << 13) |
#define ADAS1000_RESPCTL_RESPSEL (1ul << 5) |
#define ADAS1000_RESPCTL_RESPSEL_MASK (0x00000003ul << 5) |
#define ADAS1000_RESPMAG 0x1B /* Read Respiration Data Magnitude */ |
#define ADAS1000_RESPMAG_ADDRESS (1ul << 24) |
#define ADAS1000_RESPMAG_ADDRESS_MASK (0x000000FFul << 24) |
#define ADAS1000_RESPMAG_MAGNITUDE (1ul << 0) |
#define ADAS1000_RESPMAG_MAGNITUDE_MASK (0x00FFFFFFul << 0) |
#define ADAS1000_RESPPH 0x1C /* Read Respiration Data Phase */ |
#define ADAS1000_RESPPH_ADDRESS (1ul << 24) |
#define ADAS1000_RESPPH_ADDRESS_MASK (0x000000FFul << 24) |
#define ADAS1000_RESPPH_PHASE (1ul << 0) |
#define ADAS1000_RESPPH_PHASE_MASK (0x00FFFFFFul << 0) |
#define ADAS1000_TESTTONE 0x08 /* Test Tone */ |
#define ADAS1000_TESTTONE_TONEN (1ul << 0) |
#define ADAS1000_TESTTONE_TONINT (1ul << 2) |
#define ADAS1000_TESTTONE_TONLA (1ul << 23) |
#define ADAS1000_TESTTONE_TONLL (1ul << 22) |
#define ADAS1000_TESTTONE_TONOUT (1ul << 1) |
#define ADAS1000_TESTTONE_TONRA (1ul << 21) |
#define ADAS1000_TESTTONE_TONTYPE (1ul << 3) |
#define ADAS1000_TESTTONE_TONTYPE_MASK (0x00000003ul << 3) |
#define ADAS1000_TESTTONE_TONV1 (1ul << 20) |
#define ADAS1000_TESTTONE_TONV2 (1ul << 19) |
#define ADAS1000_V1DATA 0x14 /* V1 or V1 Data */ |
#define ADAS1000_V2DATA 0x15 /* V2 or V2 Data */ |
#define ADAS1000_WD_CNT_MASK 0x01 /* Word count mask */ |
#define CRC_CHECK_CONST_128KHz 0x00001D0Ful |
#define CRC_CHECK_CONST_2KHZ_16KHZ 0x0015A0BAul |
#define CRC_POLY_128KHZ 0x00001021ul |
#define CRC_POLY_2KHZ_16KHZ 0x005D6DCBul |
uint32_t adas1000_compute_frame_crc | ( | struct adas1000_dev * | device, |
uint8_t * | buff | ||
) |
Computes the CRC for a frame.
device | - Device structure. |
buff | - Buffer holding the frame data. |
Select the CRC poly and word size based on the frame rate.
int32_t adas1000_compute_frame_size | ( | struct adas1000_dev * | device | ) |
Compute frame size.
device | - The device structure. |
ADAS1000_2KHZ__FRAME_RATE
int32_t adas1000_compute_spi_freq | ( | struct adas1000_init_param * | init_param, |
uint32_t * | spi_freq | ||
) |
Preliminary function which computes the spi frequency based on the frame rate value passed input parameter.
Compute SPI frequency based on frame rate
init_param | - ADAS1000 initialization parameters. |
spi_freq | - SPI frequency to be computed. |
Compute the SPI clock frequency.
ADAS1000_2KHZ__FRAME_RATE
int32_t adas1000_init | ( | struct adas1000_dev ** | device, |
const struct adas1000_init_param * | init_param | ||
) |
Initializes the SPI communication with ADAS1000. The ADAS1000 is configured with the specified frame rate and all the words in a frame are activated.
device | - the device structure. |
init_param | - the initialization parameters. |
store the selected frame rate
Initialize the SPI controller.
Reset the ADAS1000.
Activate all the channels
Set the frame rate
int32_t adas1000_read | ( | struct adas1000_dev * | device, |
uint8_t | reg_addr, | ||
uint32_t * | reg_data | ||
) |
Read device register.
device | - The device structure. |
reg_addr | - The register address. |
reg_data | - The data read from the register. |
int32_t adas1000_read_data | ( | struct adas1000_dev * | device, |
uint8_t * | data_buff, | ||
uint32_t | frame_cnt, | ||
struct read_param * | read_data_param | ||
) |
Reads the specified number of frames.
device | - Device structure. |
data_buff | - Buffer to store the read data. |
frame_cnt | - Number of frames to read. |
read_data_param | - Structure holding the parameters required for frame read sequence |
If the read sequence must be started send a FRAMES command.
Read the number of requested frames.
If waiting for the READY bit to be set read the header until the bit is set, otherwise just read the entire frame.
if the header is repeated until the READY bit is set read only the header, otherwise read the entire frame.
If the frames read sequence must be stopped read a register to stop the frames read.
int32_t adas1000_set_frame_rate | ( | struct adas1000_dev * | device, |
uint32_t | rate | ||
) |
Sets the frame rate.
device | - The device structure. |
rate | - ADAS1000 frame rate. |
Store the selected frame rate
Read the current value of the Frame Control Register
Compute new frame size and update the Frame Control Register value
ADAS1000_2KHZ__FRAME_RATE
Write the new Frame control Register value
int32_t adas1000_set_inactive_framewords | ( | struct adas1000_dev * | device, |
uint32_t | words_mask | ||
) |
Selects which words are not included in a data frame.
device | - The device structure. |
words_mask | - Specifies the words to be excluded from the data frame using a bitwise or of the corresponding bits from the Frame Control Register. |
Read the current value of the Frame Control Register
set the inactive channles
Write the new value to the Frame Control register.
compute the number of inactive words
compute the new frame size
int32_t adas1000_soft_reset | ( | struct adas1000_dev * | device | ) |
Software reset of the device.
device | - The device structure. |
Clear all registers to their reset value.
The software reset requires a NOP command to complete the reset.
int32_t adas1000_write | ( | struct adas1000_dev * | device, |
uint8_t | reg_addr, | ||
uint32_t | reg_data | ||
) |
Write device register.
device | - The device structure. |
reg_addr | - The register address. |
reg_data | - The data to be written. |