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Implementation of ADIOL100 Driver. More...
#include "adiol100.h"#include "no_os_alloc.h"#include "no_os_delay.h"#include "no_os_print_log.h"#include "no_os_spi.h"#include <errno.h>#include <stdint.h>#include <string.h>Functions | |
| int | adiol100_read_revid (struct adiol100_dev *dev, uint16_t *rev_id) |
| Read the chip RevisionID register. | |
| int | adiol100_read_devid (struct adiol100_dev *dev, uint16_t *dev_id) |
| Read the chip DeviceID register. | |
| int | adiol100_setup_clock (struct adiol100_dev *dev, uint8_t clock_src, uint8_t clk_div) |
| Configure the clock source, divider, and enable clock output. | |
| int | adiol100_init (struct adiol100_dev **dev, struct adiol100_init_param *ip) |
| Initialize the ADIOL100 device. | |
| int | adiol100_remove (struct adiol100_dev *dev) |
| Free resources allocated by adiol100_init(). | |
| int | adiol100_read (struct adiol100_dev *dev, uint16_t reg, uint16_t *value) |
| Read a 16-bit register. Handles paged access automatically. | |
| int | adiol100_write (struct adiol100_dev *dev, uint16_t reg, uint16_t value) |
| Write a 16-bit register. Handles paged access automatically. | |
| int | adiol100_update (struct adiol100_dev *dev, uint16_t reg, uint16_t mask, uint16_t value) |
| Read-modify-write a register using a bit mask. | |
| int | adiol100_load_msg (struct adiol100_dev *dev, enum adiol100_channel ch, const uint8_t *data, uint8_t txbytes, uint8_t rxbytes, enum adiol100_keep_msg keep) |
| Load IO-Link payload into TxFIFO without triggering CQSend. | |
| int | adiol100_send_msg (struct adiol100_dev *dev, enum adiol100_channel ch) |
| Assert CQSend to trigger transmission of the message in the TxFIFO. | |
| int | adiol100_load_and_send_msg (struct adiol100_dev *dev, enum adiol100_channel ch, uint8_t *data, uint8_t txbytes, uint8_t rxbytes, enum adiol100_keep_msg keep, uint16_t framctrl1) |
| Load IO-Link payload into TxFIFO and trigger CQSend in one SPI burst. | |
| int | adiol100_read_msg (struct adiol100_dev *dev, enum adiol100_channel ch, uint8_t *data, uint8_t data_len) |
| Read device response from RxFIFO, stripping the MsgID/RxBytesAct header. | |
| int | adiol100_read_channel_burst (struct adiol100_dev *dev, enum adiol100_channel ch, uint16_t *rxstat, uint16_t *irq, uint16_t *status, uint8_t *data, uint8_t data_len) |
| Burst-read RxFIFOStat, Interrupt, Status, and RxFIFO in one SPI cycle. | |
| int | adiol100_global_reset (struct adiol100_dev *dev) |
| Disable global interrupts, clear trigger, read-clear all IRQ registers, and turn off all LEDs. | |
| int | adiol100_reset_tx_fifo (struct adiol100_dev *dev, enum adiol100_channel ch) |
| Reset the transmit FIFO for a channel. | |
| int | adiol100_reset_rx_fifo (struct adiol100_dev *dev, enum adiol100_channel ch) |
| Reset the receive FIFO for a channel. | |
| int | adiol100_reset_channel (struct adiol100_dev *dev, enum adiol100_channel ch) |
| Assert CHANRST to reset all channel-specific registers. | |
| int | adiol100_config_cq (struct adiol100_dev *dev, enum adiol100_channel ch, enum adiol100_cq_mode mode, enum adiol100_cq_drv drv_en, enum adiol100_sink_sel sink_sel, enum adiol100_cq_slew_rate slew_rate, enum adiol100_iec3th iec3th, enum adiol100_source_sink source_sink, enum adiol100_glitch_filter glitch_filter, enum adiol100_cq_npn npn, enum adiol100_cq_ext cq_ext, enum adiol100_inv_cq inv_cq, enum adiol100_cq_txen txen) |
| Configure the CQ driver. | |
| int | adiol100_config_cq_protection (struct adiol100_dev *dev, enum adiol100_channel ch, enum adiol100_cq_current_limit current_limit, enum adiol100_blanking_time blanking, enum adiol100_autoretry_timeout retry_tmo, enum adiol100_autoretry retry_en, enum adiol100_voltage_threshold tx_vthr_h, enum adiol100_voltage_threshold tx_vthr_l, enum adiol100_voltage_threshold rx_vthr_h, enum adiol100_voltage_threshold rx_vthr_l) |
| Configure CQ protection: current limit, blanking, thresholds, autoretry. | |
| int | adiol100_config_lp (struct adiol100_dev *dev, enum adiol100_channel ch, enum adiol100_lp_en enable, enum adiol100_lp_rev rev_en) |
| Configure the L+ sensor supply: enable and reverse polarity protection. | |
| int | adiol100_config_lp_protection (struct adiol100_dev *dev, enum adiol100_channel ch, uint8_t cl_nom, uint8_t pwr_max, uint8_t curr_max, uint8_t curr_min, uint8_t ol_timeout, uint8_t cl_timeout, uint8_t slope, uint8_t slope_bl, uint8_t ar_time, uint8_t ar_count) |
| Configure L+ FET protection: current, power, timeouts, slope, retry. | |
| int | adiol100_config_cq_protection_ext (struct adiol100_dev *dev, enum adiol100_channel ch, uint8_t cl_nom, uint8_t pwr_max, uint8_t curr_max, uint8_t curr_min, uint8_t ol_timeout, uint8_t cl_timeout, uint8_t slope, uint8_t slope_bl, uint8_t ar_time, uint8_t ar_count) |
| Configure CQ external high-side FET protection. | |
| int | adiol100_config_di (struct adiol100_dev *dev, enum adiol100_channel ch, enum adiol100_iec3th iec3th, enum adiol100_source_sink source_sink, enum adiol100_sink_sel sink_sel, enum adiol100_glitch_filter glitch_filter, enum adiol100_inv_di inv_di) |
| Configure the digital input (DICfgA/B). | |
| int | adiol100_config_framer (struct adiol100_dev *dev, enum adiol100_channel ch, enum adiol100_ins_chks ins_chks, enum adiol100_framer framer_en, enum adiol100_ckt_err_inh ckt_err_inh, enum adiol100_msg_repeat msg_repeat, enum adiol100_bdelay bdelay, uint8_t ddelay, enum adiol100_tsize_err_inh tsize_err_inh, enum adiol100_uart_par uart_par, enum adiol100_uart_baud uart_baud, enum adiol100_uart_en uart_en, enum adiol100_safe_pulse_det safe_pulse_det) |
| Configure the IO-Link framer (FramCtrl1 + FramCtrl2). | |
| int | adiol100_wakeup_request (struct adiol100_dev *dev, enum adiol100_channel ch) |
| Generate a wake-up pulse (WURQ) on a channel. | |
| int | adiol100_clear_estcom_fails (struct adiol100_dev *dev, enum adiol100_channel ch) |
| Clear the establish-communication fail counter in StatusA/B. | |
| int | adiol100_config_trigger (struct adiol100_dev *dev, enum adiol100_channel ch, enum adiol100_auto_cycler_dis auto_cycler_dis, enum adiol100_trig_val trig_val, enum adiol100_trig_en trig_en) |
| Configure trigger assignment for a channel. | |
| int | adiol100_fire_trigger (struct adiol100_dev *dev, enum adiol100_trig_val trig_val) |
| Fire an SPI trigger to start transmission on matching channels. | |
| int | adiol100_led_sync (struct adiol100_dev *dev) |
| Synchronize LED drivers across multiple devices. | |
| int | adiol100_set_burst_len (struct adiol100_dev *dev, enum adiol100_channel ch, uint8_t write_len, uint8_t read_len) |
| Set the SPI burst length for FIFO access. | |
| int | adiol100_get_comrt (struct adiol100_dev *dev, enum adiol100_channel ch, uint8_t *comrt) |
| Get the communication rate determined by EstCom (COM1/2/3). | |
| int | adiol100_set_cycle_tmr (struct adiol100_dev *dev, enum adiol100_channel ch, uint8_t value) |
| Set the IO-Link cycle timer value. | |
| int | adiol100_get_cycle_tmr (struct adiol100_dev *dev, enum adiol100_channel ch, uint16_t *value) |
| Get the current cycle timer register value. | |
| int | adiol100_enable_cycle_timer (struct adiol100_dev *dev, enum adiol100_channel ch) |
| Enable the cycle timer for autonomous cyclic operation. | |
| int | adiol100_disable_cycle_timer (struct adiol100_dev *dev, enum adiol100_channel ch) |
| Disable the cycle timer. | |
| int | adiol100_get_channel_irq (struct adiol100_dev *dev, enum adiol100_channel ch, uint16_t *flags) |
| Read and accumulate channel interrupt flags. | |
| int | adiol100_get_global_irq (struct adiol100_dev *dev, uint16_t *flags) |
| Read and accumulate global interrupt flags. | |
| void | adiol100_clear_channel_irq (struct adiol100_dev *dev, enum adiol100_channel ch, uint16_t mask) |
| Clear specific bits from the accumulated channel interrupt flags. | |
| void | adiol100_clear_global_irq (struct adiol100_dev *dev, uint16_t mask) |
| Clear specific bits from the accumulated global interrupt flags. | |
| int | adiol100_enable_global_irq (struct adiol100_dev *dev, uint16_t mask) |
| Set the global interrupt enable mask. | |
| int | adiol100_enable_channel_irq (struct adiol100_dev *dev, enum adiol100_channel ch, uint16_t mask) |
| Set the channel interrupt enable mask. | |
| int | adiol100_get_fifo_status (struct adiol100_dev *dev, enum adiol100_channel ch, uint16_t *flags) |
| Read the RxFIFO status register (level + error flags). | |
| int | adiol100_get_status (struct adiol100_dev *dev, enum adiol100_channel ch, uint16_t *flags) |
| Read the channel status register. | |
| int | adiol100_config_watchdog (struct adiol100_dev *dev, enum adiol100_wdg_timebase timebase, uint8_t time, enum adiol100_wdg_mode mode, enum adiol100_wdg_en enable, enum adiol100_wdg_lock lock) |
| Configure the watchdog timer. | |
| int | adiol100_clear_watchdog (struct adiol100_dev *dev) |
| Clear the watchdog timer (write-1-to-clear). | |
| int | adiol100_read_adc_global (struct adiol100_dev *dev, enum adiol100_adc_global source, uint16_t *value) |
| Read a raw 13-bit global ADC measurement (V24 voltage or temperature). | |
| int | adiol100_read_adc_chan (struct adiol100_dev *dev, enum adiol100_adc_chan source, enum adiol100_channel ch, uint16_t *value) |
| Read a raw 13-bit per-channel ADC measurement (CQ/LP voltage or current). | |
| int | adiol100_reset_adc_stats (struct adiol100_dev *dev) |
| Reset all ADC min/max statistics (V24, Temp, CQ and LP for both channels). | |
| int | adiol100_set_led_brightness (struct adiol100_dev *dev, enum adiol100_led led, enum adiol100_led_brightness red_bgt, enum adiol100_led_brightness green_bgt) |
| Set the brightness for one LED. | |
| int | adiol100_set_led_sequence (struct adiol100_dev *dev, enum adiol100_led led, enum adiol100_led_seq red_seq, enum adiol100_led_seq green_seq) |
| Set the blink sequence for one LED. | |
| int | adiol100_set_led_mode (struct adiol100_dev *dev, enum adiol100_led led, enum adiol100_led_mode mode) |
| Set the operating mode for one LED. | |
| int | adiol100_reset_leds (struct adiol100_dev *dev) |
| Turn off all four LEDs by clearing their sequences and resetting modes. | |
| int | adiol100_estcom (struct adiol100_dev *dev, enum adiol100_channel ch) |
| Run EstablishCommunication: reset FIFOs, set EstCom, poll for result. | |
Implementation of ADIOL100 Driver.
Copyright 2026(c) Analog Devices, Inc.
SPDX-License-Identifier: BSD-3-Clause
| void adiol100_clear_channel_irq | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint16_t | mask ) |
Clear specific bits from the accumulated channel interrupt flags.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| mask | - Bitmask of flags to clear. |
| int adiol100_clear_estcom_fails | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch ) |
Clear the establish-communication fail counter in StatusA/B.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| void adiol100_clear_global_irq | ( | struct adiol100_dev * | dev, |
| uint16_t | mask ) |
Clear specific bits from the accumulated global interrupt flags.
| dev | - The device structure. |
| mask | - Bitmask of flags to clear. |
| int adiol100_clear_watchdog | ( | struct adiol100_dev * | dev | ) |
Clear the watchdog timer (write-1-to-clear).
| dev | - The device structure. |
| int adiol100_config_cq | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| enum adiol100_cq_mode | mode, | ||
| enum adiol100_cq_drv | drv_en, | ||
| enum adiol100_sink_sel | sink_sel, | ||
| enum adiol100_cq_slew_rate | slew_rate, | ||
| enum adiol100_iec3th | iec3th, | ||
| enum adiol100_source_sink | source_sink, | ||
| enum adiol100_glitch_filter | glitch_filter, | ||
| enum adiol100_cq_npn | npn, | ||
| enum adiol100_cq_ext | cq_ext, | ||
| enum adiol100_inv_cq | inv_cq, | ||
| enum adiol100_cq_txen | txen ) |
Configure the CQ driver.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| mode | - Push-pull or open-drain driver mode. |
| drv_en | - Enable or disable the CQ driver. |
| sink_sel | - Input sink/source current level. |
| slew_rate | - CQ output slew rate. |
| iec3th | - IEC 61131-2 type 2/3 threshold (0 for IO-Link). |
| source_sink | - Current source or sink on CQ. |
| glitch_filter | - CQ receiver glitch filter. |
| npn | - NPN/PNP mode (ignored if push-pull). |
| cq_ext | - Use external high-side FET. |
| inv_cq | - Invert CQ output polarity. |
| txen | - CQ transmitter enable (SIO only, 0 with framer). |
| int adiol100_config_cq_protection | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| enum adiol100_cq_current_limit | current_limit, | ||
| enum adiol100_blanking_time | blanking, | ||
| enum adiol100_autoretry_timeout | retry_tmo, | ||
| enum adiol100_autoretry | retry_en, | ||
| enum adiol100_voltage_threshold | tx_vthr_h, | ||
| enum adiol100_voltage_threshold | tx_vthr_l, | ||
| enum adiol100_voltage_threshold | rx_vthr_h, | ||
| enum adiol100_voltage_threshold | rx_vthr_l ) |
Configure CQ protection: current limit, blanking, thresholds, autoretry.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| current_limit | - CQ driver current limit. |
| blanking | - Current limit blanking time. |
| retry_tmo | - Autoretry timeout after current limit event. |
| retry_en | - Enable or disable autoretry. |
| tx_vthr_h | - CQ transmit high voltage threshold. |
| tx_vthr_l | - CQ transmit low voltage threshold. |
| rx_vthr_h | - CQ receive high voltage threshold. |
| rx_vthr_l | - CQ receive low voltage threshold. |
| int adiol100_config_cq_protection_ext | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint8_t | cl_nom, | ||
| uint8_t | pwr_max, | ||
| uint8_t | curr_max, | ||
| uint8_t | curr_min, | ||
| uint8_t | ol_timeout, | ||
| uint8_t | cl_timeout, | ||
| uint8_t | slope, | ||
| uint8_t | slope_bl, | ||
| uint8_t | ar_time, | ||
| uint8_t | ar_count ) |
Configure CQ external high-side FET protection.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| cl_nom | - Nominal current limit (CQExtCfg, 8-bit, 20mA/step with 10mOhm Rsense). |
| pwr_max | - Maximum power dissipation (8-bit, 1W/step). |
| curr_max | - Maximum current (8-bit, 20mA/step). |
| curr_min | - Minimum current at turn-on (8-bit, 20mA/step). |
| ol_timeout | - Overload timeout (8-bit, 2ms/step). |
| cl_timeout | - Current limit timeout (8-bit, 2ms/step). |
| slope | - Minimum voltage slope (8-bit, 19.5V/s per step). |
| slope_bl | - Slope blanking time (8-bit, 2ms/step). |
| ar_time | - Autoretry time (6-bit, 25ms/step). |
| ar_count | - Autoretry count (4-bit, 0 = unlimited). |
| int adiol100_config_di | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| enum adiol100_iec3th | iec3th, | ||
| enum adiol100_source_sink | source_sink, | ||
| enum adiol100_sink_sel | sink_sel, | ||
| enum adiol100_glitch_filter | glitch_filter, | ||
| enum adiol100_inv_di | inv_di ) |
Configure the digital input (DICfgA/B).
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| iec3th | - IEC 61131-2 type 2/3 threshold select. |
| source_sink | - Current sink or source select. |
| sink_sel | - Sink/source current level. |
| glitch_filter | - Glitch filter setting. |
| inv_di | - Invert DI logic output. |
| int adiol100_config_framer | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| enum adiol100_ins_chks | ins_chks, | ||
| enum adiol100_framer | framer_en, | ||
| enum adiol100_ckt_err_inh | ckt_err_inh, | ||
| enum adiol100_msg_repeat | msg_repeat, | ||
| enum adiol100_bdelay | bdelay, | ||
| uint8_t | ddelay, | ||
| enum adiol100_tsize_err_inh | tsize_err_inh, | ||
| enum adiol100_uart_par | uart_par, | ||
| enum adiol100_uart_baud | uart_baud, | ||
| enum adiol100_uart_en | uart_en, | ||
| enum adiol100_safe_pulse_det | safe_pulse_det ) |
Configure the IO-Link framer (FramCtrl1 + FramCtrl2).
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| ins_chks | - Enable or disable checksum insertion. |
| framer_en | - Enable or disable the framer. |
| ckt_err_inh | - Suppress or send message on CKT error. |
| msg_repeat | - Auto-repeat last message if FIFO not reloaded. |
| bdelay | - Additional byte delay (0–3 TBIT). |
| ddelay | - Device answer delay. Wait time = 4 + ddelay * 2 TBIT. Set 3 for IO-Link standard (10 TBIT). Range 0–255. |
| tsize_err_inh | - Inhibit TX size error checking. |
| uart_par | - UART parity bit enable. |
| uart_baud | - UART baud rate (ignored in IO-Link mode). |
| uart_en | - UART mode enable (0 for IO-Link mode). |
| safe_pulse_det | - Enable safety pulse detection. |
| int adiol100_config_lp | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| enum adiol100_lp_en | enable, | ||
| enum adiol100_lp_rev | rev_en ) |
Configure the L+ sensor supply: enable and reverse polarity protection.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| enable | - Enable or disable L+ supply. |
| rev_en | - Enable or disable reverse polarity protection. |
| int adiol100_config_lp_protection | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint8_t | cl_nom, | ||
| uint8_t | pwr_max, | ||
| uint8_t | curr_max, | ||
| uint8_t | curr_min, | ||
| uint8_t | ol_timeout, | ||
| uint8_t | cl_timeout, | ||
| uint8_t | slope, | ||
| uint8_t | slope_bl, | ||
| uint8_t | ar_time, | ||
| uint8_t | ar_count ) |
Configure L+ FET protection: current, power, timeouts, slope, retry.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| cl_nom | - Nominal current limit (LPCfg, 8-bit, 20mA/step with 10mOhm Rsense). |
| pwr_max | - Maximum power dissipation (8-bit, 1W/step). |
| curr_max | - Maximum current (8-bit, 20mA/step). |
| curr_min | - Minimum current at turn-on (8-bit, 20mA/step). |
| ol_timeout | - Overload timeout (8-bit, 2ms/step). |
| cl_timeout | - Current limit timeout (8-bit, 2ms/step). |
| slope | - Minimum voltage slope (8-bit, 19.5V/s per step). |
| slope_bl | - Slope blanking time (8-bit, 2ms/step). |
| ar_time | - Autoretry time (6-bit, 25ms/step). |
| ar_count | - Autoretry count (4-bit, 0 = unlimited). |
| int adiol100_config_trigger | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| enum adiol100_auto_cycler_dis | auto_cycler_dis, | ||
| enum adiol100_trig_val | trig_val, | ||
| enum adiol100_trig_en | trig_en ) |
Configure trigger assignment for a channel.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| auto_cycler_dis | - Auto-disable cycler on COMLOST. |
| trig_val | - Trigger value (0–15). 0 is global trigger. |
| trig_en | - Enable SPI-based trigger synchronization. |
| int adiol100_config_watchdog | ( | struct adiol100_dev * | dev, |
| enum adiol100_wdg_timebase | timebase, | ||
| uint8_t | time, | ||
| enum adiol100_wdg_mode | mode, | ||
| enum adiol100_wdg_en | enable, | ||
| enum adiol100_wdg_lock | lock ) |
Configure the watchdog timer.
| dev | - The device structure. |
| timebase | - Timer tick period (100us, 500us, or 2ms). |
| time | - Timeout multiplier (6-bit, 0–63). |
| mode | - SPI activity reset or explicit clear. |
| enable | - Enable or disable the watchdog. |
| lock | - Lock the watchdog configuration. |
| int adiol100_disable_cycle_timer | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch ) |
Disable the cycle timer.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| int adiol100_enable_channel_irq | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint16_t | mask ) |
Set the channel interrupt enable mask.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| mask | - Bitmask of interrupts to enable. |
| int adiol100_enable_cycle_timer | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch ) |
Enable the cycle timer for autonomous cyclic operation.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| int adiol100_enable_global_irq | ( | struct adiol100_dev * | dev, |
| uint16_t | mask ) |
Set the global interrupt enable mask.
| dev | - The device structure. |
| mask | - Bitmask of interrupts to enable. |
| int adiol100_estcom | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch ) |
Run EstablishCommunication: reset FIFOs, set EstCom, poll for result.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| int adiol100_fire_trigger | ( | struct adiol100_dev * | dev, |
| enum adiol100_trig_val | trig_val ) |
Fire an SPI trigger to start transmission on matching channels.
| dev | - The device structure. |
| trig_val | - Trigger value (0–15). |
| int adiol100_get_channel_irq | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint16_t * | flags ) |
Read and accumulate channel interrupt flags.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| flags | - Pointer to store the accumulated interrupt flags. |
| int adiol100_get_comrt | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint8_t * | comrt ) |
Get the communication rate determined by EstCom (COM1/2/3).
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| comrt | - Pointer to store the COM rate value (1, 2, or 3). |
| int adiol100_get_cycle_tmr | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint16_t * | value ) |
Get the current cycle timer register value.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| value | - Pointer to store the cycle timer value. |
| int adiol100_get_fifo_status | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint16_t * | flags ) |
Read the RxFIFO status register (level + error flags).
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| flags | - Pointer to store the status flags. |
| int adiol100_get_global_irq | ( | struct adiol100_dev * | dev, |
| uint16_t * | flags ) |
Read and accumulate global interrupt flags.
| dev | - The device structure. |
| flags | - Pointer to store the accumulated interrupt flags. |
| int adiol100_get_status | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint16_t * | flags ) |
Read the channel status register.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| flags | - Pointer to store the status flags. |
| int adiol100_global_reset | ( | struct adiol100_dev * | dev | ) |
Disable global interrupts, clear trigger, read-clear all IRQ registers, and turn off all LEDs.
| dev | - The device structure. |
| int adiol100_init | ( | struct adiol100_dev ** | dev, |
| struct adiol100_init_param * | ip ) |
Initialize the ADIOL100 device.
| dev | - Pointer to the device descriptor (allocated internally). |
| ip | - Initialization parameters (SPI, address, clock). |
| int adiol100_led_sync | ( | struct adiol100_dev * | dev | ) |
Synchronize LED drivers across multiple devices.
| dev | - The device structure. |
| int adiol100_load_and_send_msg | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint8_t * | data, | ||
| uint8_t | txbytes, | ||
| uint8_t | rxbytes, | ||
| enum adiol100_keep_msg | keep, | ||
| uint16_t | framctrl1 ) |
Load IO-Link payload into TxFIFO and trigger CQSend in one SPI burst.
Writes TxFIFO data followed by FramCtrl1 (with CQSend asserted) in a single SPI transaction using register auto-increment. Caller must set burst length via adiol100_set_burst_len() and provide the current FramCtrl1 register value before calling.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| data | - IO-Link payload bytes (MC + CKT + OD). |
| txbytes | - Number of payload bytes to transmit. |
| rxbytes | - Number of response bytes expected from the device (including CKS). |
| keep | - Retain message in TxFIFO for cyclic re-sending. |
| framctrl1 | - Current FramCtrl1 register value (framer config bits). |
| int adiol100_load_msg | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| const uint8_t * | data, | ||
| uint8_t | txbytes, | ||
| uint8_t | rxbytes, | ||
| enum adiol100_keep_msg | keep ) |
Load IO-Link payload into TxFIFO without triggering CQSend.
Caller must set burst length via adiol100_set_burst_len() before calling.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| data | - IO-Link payload bytes (MC + CKT + OD). |
| txbytes | - Number of payload bytes to transmit. |
| rxbytes | - Number of response bytes expected from the device (including CKS). |
| keep | - Retain message in TxFIFO for cyclic re-sending. |
| int adiol100_read | ( | struct adiol100_dev * | dev, |
| uint16_t | reg, | ||
| uint16_t * | value ) |
Read a 16-bit register. Handles paged access automatically.
| dev | - The device structure. |
| reg | - Register address (0x1Fxx for paged registers). |
| value | - Pointer to store the read value. |
| int adiol100_read_adc_chan | ( | struct adiol100_dev * | dev, |
| enum adiol100_adc_chan | source, | ||
| enum adiol100_channel | ch, | ||
| uint16_t * | value ) |
Read a raw 13-bit per-channel ADC measurement (CQ/LP voltage or current).
| dev | - The device structure. |
| source | - Per-channel ADC source (CQ_VOLT/CUR or LP_VOLT/CUR with MIN/MAX). |
| ch | - Channel selection (A or B). |
| value | - Raw 13-bit value (2's complement). |
| int adiol100_read_adc_global | ( | struct adiol100_dev * | dev, |
| enum adiol100_adc_global | source, | ||
| uint16_t * | value ) |
Read a raw 13-bit global ADC measurement (V24 voltage or temperature).
| dev | - The device structure. |
| source | - Global ADC source (V24_VOLT/MIN/MAX or TEMP/MIN/MAX). |
| value | - Raw 13-bit value (2's complement). |
| int adiol100_read_channel_burst | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint16_t * | rxstat, | ||
| uint16_t * | irq, | ||
| uint16_t * | status, | ||
| uint8_t * | data, | ||
| uint8_t | data_len ) |
Burst-read RxFIFOStat, Interrupt, Status, and RxFIFO in one SPI cycle.
Uses register auto-increment from RxFIFOStat (0x01/0x11) through Status (0x03/0x13), then into the RxFIFO (0x04/0x14) for the configured burst read length. Reading the Interrupt register clears its flags. Caller must set burst length via adiol100_set_burst_len() before calling.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| rxstat | - Pointer to store RxFIFOStat (level + error flags). |
| irq | - Pointer to store Interrupt flags (read-to-clear). |
| status | - Pointer to store Status register. |
| data | - Buffer to store RxFIFO response bytes (after MsgID/RxBytesAct header). |
| data_len | - Number of response bytes to read from the FIFO. |
| int adiol100_read_devid | ( | struct adiol100_dev * | dev, |
| uint16_t * | dev_id ) |
Read the chip DeviceID register.
| dev | - The device structure. |
| dev_id | - Pointer to store the device ID value. |
| int adiol100_read_msg | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint8_t * | data, | ||
| uint8_t | data_len ) |
Read device response from RxFIFO, stripping the MsgID/RxBytesAct header.
Caller must set burst length via adiol100_set_burst_len() before calling.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| data | - Buffer to store response bytes. |
| data_len | - Number of response bytes to read from the FIFO. |
| int adiol100_read_revid | ( | struct adiol100_dev * | dev, |
| uint16_t * | rev_id ) |
Read the chip RevisionID register.
| dev | - The device structure. |
| rev_id | - Pointer to store the revision ID value. |
| int adiol100_remove | ( | struct adiol100_dev * | dev | ) |
Free resources allocated by adiol100_init().
| dev | - The device structure. |
| int adiol100_reset_adc_stats | ( | struct adiol100_dev * | dev | ) |
Reset all ADC min/max statistics (V24, Temp, CQ and LP for both channels).
| dev | - The device structure. |
| int adiol100_reset_channel | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch ) |
Assert CHANRST to reset all channel-specific registers.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| int adiol100_reset_leds | ( | struct adiol100_dev * | dev | ) |
Turn off all four LEDs by clearing their sequences and resetting modes.
| dev | - The device structure. |
| int adiol100_reset_rx_fifo | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch ) |
Reset the receive FIFO for a channel.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| int adiol100_reset_tx_fifo | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch ) |
Reset the transmit FIFO for a channel.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| int adiol100_send_msg | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch ) |
Assert CQSend to trigger transmission of the message in the TxFIFO.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| int adiol100_set_burst_len | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint8_t | write_len, | ||
| uint8_t | read_len ) |
Set the SPI burst length for FIFO access.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| write_len | - Number of bytes in the write burst. |
| read_len | - Number of bytes in the read burst. |
| int adiol100_set_cycle_tmr | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch, | ||
| uint8_t | value ) |
Set the IO-Link cycle timer value.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| value | - IO-Link encoded cycle time byte. |
| int adiol100_set_led_brightness | ( | struct adiol100_dev * | dev, |
| enum adiol100_led | led, | ||
| enum adiol100_led_brightness | red_bgt, | ||
| enum adiol100_led_brightness | green_bgt ) |
Set the brightness for one LED.
| dev | - The device structure. |
| led | - LED index (1–4). |
| red_bgt | - Red brightness (see enum adiol100_led_brightness). |
| green_bgt | - Green brightness (see enum adiol100_led_brightness). |
| int adiol100_set_led_mode | ( | struct adiol100_dev * | dev, |
| enum adiol100_led | led, | ||
| enum adiol100_led_mode | mode ) |
Set the operating mode for one LED.
| dev | - The device structure. |
| led | - LED index (1–4). |
| mode | - Operating mode (see enum adiol100_led_mode). |
| int adiol100_set_led_sequence | ( | struct adiol100_dev * | dev, |
| enum adiol100_led | led, | ||
| enum adiol100_led_seq | red_seq, | ||
| enum adiol100_led_seq | green_seq ) |
Set the blink sequence for one LED.
| dev | - The device structure. |
| led | - LED index (1–4). |
| red_seq | - Red blink pattern (see enum adiol100_led_seq or custom). |
| green_seq | - Green blink pattern (see enum adiol100_led_seq or custom). |
| int adiol100_setup_clock | ( | struct adiol100_dev * | dev, |
| uint8_t | clock_src, | ||
| uint8_t | clk_div ) |
Configure the clock source, divider, and enable clock output.
| dev | - The device structure. |
| clock_src | - Clock source selection (internal, crystal, or external). |
| clk_div | - Clock divider (ClkDiv[1:0]). |
| int adiol100_update | ( | struct adiol100_dev * | dev, |
| uint16_t | reg, | ||
| uint16_t | mask, | ||
| uint16_t | value ) |
Read-modify-write a register using a bit mask.
| dev | - The device structure. |
| reg | - Register address. |
| mask | - Bit mask of the field to modify. |
| value | - New value (pre-shifted to match mask position). |
| int adiol100_wakeup_request | ( | struct adiol100_dev * | dev, |
| enum adiol100_channel | ch ) |
Generate a wake-up pulse (WURQ) on a channel.
| dev | - The device structure. |
| ch | - Channel selection (A or B). |
| int adiol100_write | ( | struct adiol100_dev * | dev, |
| uint16_t | reg, | ||
| uint16_t | value ) |
Write a 16-bit register. Handles paged access automatically.
| dev | - The device structure. |
| reg | - Register address (0x1Fxx for paged registers). |
| value | - The value to write. |