ADIOL100 IO-Link transceiver driver definitions. More...

#include "no_os_spi.h"
#include "no_os_gpio.h"
#include "no_os_util.h"
#include <stdint.h>

Include dependency graph for adiol100.h:

Classes
struct	adiol100_init_param
	Initialization parameters for the ADIOL100 driver. More...

struct	adiol100_dev
	ADIOL100 device descriptor, created by adiol100_init(). More...

Macros
#define	ADIOL100_NUM_CHANNELS 2

#define	ADIOL100_REG_INTERRUPTG 0x0000

#define	ADIOL100_REG_RXFIFOSTAT_A 0x0001

#define	ADIOL100_REG_INTERRUPT_A 0x0002

#define	ADIOL100_REG_STATUS_A 0x0003

#define	ADIOL100_REG_TXRXDATA_A 0x0004

#define	ADIOL100_REG_FRAMCTRL1_A 0x0005

#define	ADIOL100_REG_FRAMCTRL2_A 0x0006

#define	ADIOL100_REG_CYCLTMR_A 0x0007

#define	ADIOL100_REG_TRIGASSIGN_A 0x0008

#define	ADIOL100_REG_CQSET_A 0x0009

#define	ADIOL100_REG_CQCURLIM_A 0x000A

#define	ADIOL100_REG_DICFG_A 0x000C

#define	ADIOL100_REG_INTEN_A 0x000E

#define	ADIOL100_REG_LPCFG_A 0x000D

#define	ADIOL100_REG_RXFIFOSTAT_B 0x0011

#define	ADIOL100_REG_INTERRUPT_B 0x0012

#define	ADIOL100_REG_STATUS_B 0x0013

#define	ADIOL100_REG_TXRXDATA_B 0x0014

#define	ADIOL100_REG_FRAMCTRL1_B 0x0015

#define	ADIOL100_REG_FRAMCTRL2_B 0x0016

#define	ADIOL100_REG_CYCLTMR_B 0x0017

#define	ADIOL100_REG_TRIGASSIGN_B 0x0018

#define	ADIOL100_REG_CQSET_B 0x0019

#define	ADIOL100_REG_CQCURLIM_B 0x001A

#define	ADIOL100_REG_DICFG_B 0x001C

#define	ADIOL100_REG_INTEN_B 0x001E

#define	ADIOL100_REG_LPCFG_B 0x001D

#define	ADIOL100_REG_WATCHDOG 0x000F

#define	ADIOL100_REG_TRIGGER 0x0010

#define	ADIOL100_REG_INTERRUPTG_EN 0x1F00

#define	ADIOL100_REG_CLOCKCFG 0x1F01

#define	ADIOL100_REG_REVISIONID 0x1F02

#define	ADIOL100_REG_DEVICEID 0x1F03

#define	ADIOL100_REG_SPIFIFO_A_BURST 0x1F04

#define	ADIOL100_REG_SPIFIFO_B_BURST 0x1F05

#define	ADIOL100_BURST_RDLEN_MSK NO_OS_GENMASK(15, 8)

#define	ADIOL100_BURST_WRLEN_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_REG_LPFETPWRCFG_A 0x1F10

#define	ADIOL100_REG_LPCURRENTCFG_A 0x1F11

#define	ADIOL100_REG_LPFETPROTECT_A 0x1F12

#define	ADIOL100_REG_LPSLOPE_A 0x1F13

#define	ADIOL100_REG_LPRETRY_A 0x1F14

#define	ADIOL100_REG_LPFETPWRCFG_B 0x1F20

#define	ADIOL100_REG_LPCURRENTCFG_B 0x1F21

#define	ADIOL100_REG_LPFETPROTECT_B 0x1F22

#define	ADIOL100_REG_LPSLOPE_B 0x1F23

#define	ADIOL100_REG_LPRETRY_B 0x1F24

#define	ADIOL100_REG_CQEXTCFG_A 0x000B

#define	ADIOL100_REG_CQEXTCFG_B 0x001B

#define	ADIOL100_CQCL_S NO_OS_BIT(13)

#define	ADIOL100_CQCL_L NO_OS_BIT(12)

#define	ADIOL100_CQTO_L NO_OS_BIT(11)

#define	ADIOL100_CQSLOERR_L NO_OS_BIT(10)

#define	ADIOL100_CQOL_L NO_OS_BIT(9)

#define	ADIOL100_CQEXTCLNOM_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_ESTCOM_TIMEOUT_MS 160

#define	ADIOL100_REG_EXTRAPAGE 0x001F

#define	ADIOL100_PAGED_BASE 0x1F00

#define	ADIOL100_AUTOCYCLERDIS NO_OS_BIT(8)

#define	ADIOL100_TRIGA_MSK NO_OS_GENMASK(7, 4)

#define	ADIOL100_TRIGEN NO_OS_BIT(0)

#define	ADIOL100_IEC3THDI NO_OS_BIT(15)

#define	ADIOL100_SOURCESINKDI NO_OS_BIT(14)

#define	ADIOL100_SINKSELDI_MSK NO_OS_GENMASK(13, 12)

#define	ADIOL100_GLITCHFILTERDI_MSK NO_OS_GENMASK(11, 10)

#define	ADIOL100_INVDI NO_OS_BIT(2)

#define	ADIOL100_LEDSYNC NO_OS_BIT(7)

#define	ADIOL100_TRIGGER_MSK NO_OS_GENMASK(3, 0)

#define	ADIOL100_UARTPAREN NO_OS_BIT(15)

#define	ADIOL100_SAFEPULSDET NO_OS_BIT(14)

#define	ADIOL100_ESTCOMFACLR NO_OS_BIT(13)

#define	ADIOL100_INSCHKS NO_OS_BIT(12)

#define	ADIOL100_UARTBAUD_MSK NO_OS_GENMASK(11, 9)

#define	ADIOL100_UARTEN NO_OS_BIT(8)

#define	ADIOL100_COMRT_MSK NO_OS_GENMASK(7, 6)

#define	ADIOL100_ESTCOM NO_OS_BIT(5)

#define	ADIOL100_WUPULS NO_OS_BIT(4)

#define	ADIOL100_TXKEEPMSG NO_OS_BIT(3)

#define	ADIOL100_FRAMEREN NO_OS_BIT(2)

#define	ADIOL100_CYCLETMREN NO_OS_BIT(1)

#define	ADIOL100_CQSEND NO_OS_BIT(0)

#define	ADIOL100_TCYCLBS_MSK NO_OS_GENMASK(7, 6)

#define	ADIOL100_TCYCLM_MSK NO_OS_GENMASK(5, 0)

#define	ADIOL100_CYCLTMR_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_CHANRST NO_OS_BIT(15)

#define	ADIOL100_TSIZEERRINH NO_OS_BIT(14)

#define	ADIOL100_TXFIFORSTN NO_OS_BIT(13)

#define	ADIOL100_RXFIFORSTN NO_OS_BIT(12)

#define	ADIOL100_CKTERRINH NO_OS_BIT(11)

#define	ADIOL100_MSGREPEAT NO_OS_BIT(10)

#define	ADIOL100_BDELAY_MSK NO_OS_GENMASK(9, 8)

#define	ADIOL100_DDELAY_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_EXTCLKOKINTEN NO_OS_BIT(15)

#define	ADIOL100_WDGINTEN NO_OS_BIT(14)

#define	ADIOL100_SPICRCERRINTEN NO_OS_BIT(13)

#define	ADIOL100_EXTCLKMISINTEN NO_OS_BIT(12)

#define	ADIOL100_THSHDNINTEN NO_OS_BIT(11)

#define	ADIOL100_THWARNINTEN NO_OS_BIT(10)

#define	ADIOL100_V24ERRINTEN NO_OS_BIT(9)

#define	ADIOL100_V24WARNINTEN NO_OS_BIT(8)

#define	ADIOL100_EXTCLKOKINT NO_OS_BIT(15)

#define	ADIOL100_WDGINT NO_OS_BIT(14)

#define	ADIOL100_SPICRCERRINT NO_OS_BIT(13)

#define	ADIOL100_EXTCLKMISINT NO_OS_BIT(12)

#define	ADIOL100_THSHDNINT NO_OS_BIT(11)

#define	ADIOL100_THWARNINT NO_OS_BIT(10)

#define	ADIOL100_V24ERRINT NO_OS_BIT(9)

#define	ADIOL100_V24WARNINT NO_OS_BIT(8)

#define	ADIOL100_EXTCLKOKST NO_OS_BIT(7)

#define	ADIOL100_WDGST NO_OS_BIT(6)

#define	ADIOL100_SPICRCERRSTST NO_OS_BIT(5)

#define	ADIOL100_EXTCLKMISST NO_OS_BIT(4)

#define	ADIOL100_THSHDNST NO_OS_BIT(3)

#define	ADIOL100_THWARNST NO_OS_BIT(2)

#define	ADIOL100_V24ERRST NO_OS_BIT(1)

#define	ADIOL100_V24WARNST NO_OS_BIT(0)

#define	ADIOL100_DELAYERRINT NO_OS_BIT(15)

#define	ADIOL100_SAFEPULSRINT NO_OS_BIT(14)

#define	ADIOL100_TXERRINT NO_OS_BIT(13)

#define	ADIOL100_RXERRINT NO_OS_BIT(12)

#define	ADIOL100_ESTCOMSUCINT NO_OS_BIT(11)

#define	ADIOL100_ESTCOMFAILINT NO_OS_BIT(10)

#define	ADIOL100_RXDARDYINT NO_OS_BIT(9)

#define	ADIOL100_DILEVELINT NO_OS_BIT(8)

#define	ADIOL100_LPERRINT NO_OS_BIT(7)

#define	ADIOL100_LPUVINT NO_OS_BIT(6)

#define	ADIOL100_CQDRVERRINT NO_OS_BIT(5)

#define	ADIOL100_CQTHEINT NO_OS_BIT(4)

#define	ADIOL100_CQCURLIMINT NO_OS_BIT(3)

#define	ADIOL100_CQVWINT NO_OS_BIT(2)

#define	ADIOL100_CQRXWINT NO_OS_BIT(1)

#define	ADIOL100_CQLEVELINT NO_OS_BIT(0)

#define	ADIOL100_TRANSMERR NO_OS_BIT(15)

#define	ADIOL100_TERRSEND NO_OS_BIT(14)

#define	ADIOL100_TCHKSMERR NO_OS_BIT(13)

#define	ADIOL100_TSIZEERR NO_OS_BIT(12)

#define	ADIOL100_RCHKSMERR NO_OS_BIT(11)

#define	ADIOL100_RSIZEERR NO_OS_BIT(10)

#define	ADIOL100_FRAMEERR NO_OS_BIT(9)

#define	ADIOL100_PARITYERR NO_OS_BIT(8)

#define	ADIOL100_RXFIFOLVL_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_COMLOST NO_OS_BIT(13)

#define	ADIOL100_RXDARDY NO_OS_BIT(9)

#define	ADIOL100_DILEVEL NO_OS_BIT(8)

#define	ADIOL100_LPERR NO_OS_BIT(7)

#define	ADIOL100_LPUV NO_OS_BIT(6)

#define	ADIOL100_CQDRVERR NO_OS_BIT(5)

#define	ADIOL100_CQLEVEL NO_OS_BIT(0)

#define	ADIOL100_IEC3TH NO_OS_BIT(15)

#define	ADIOL100_SOURCESINK NO_OS_BIT(14)

#define	ADIOL100_SINKSEL_MSK NO_OS_GENMASK(13, 12)

#define	ADIOL100_GLITCHFILTER_MSK NO_OS_GENMASK(11, 10)

#define	ADIOL100_CQSLEW_MSK NO_OS_GENMASK(9, 8)

#define	ADIOL100_NPN NO_OS_BIT(7)

#define	ADIOL100_PUSHPUL NO_OS_BIT(6)

#define	ADIOL100_DRVEN NO_OS_BIT(5)

#define	ADIOL100_CQEXT NO_OS_BIT(3)

#define	ADIOL100_INVCQ NO_OS_BIT(2)

#define	ADIOL100_TXEN NO_OS_BIT(1)

#define	ADIOL100_LPFETREVEN NO_OS_BIT(15)

#define	ADIOL100_LPEN NO_OS_BIT(8)

#define	ADIOL100_LPCLNOM_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_LPFETPWRMAX_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_LPCURRMAX_MSK NO_OS_GENMASK(15, 8)

#define	ADIOL100_LPCURRMIN_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_LPOLTIMOUT_MSK NO_OS_GENMASK(15, 8)

#define	ADIOL100_LPCLTIMOUT_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_LPSLOPE_MSK NO_OS_GENMASK(15, 8)

#define	ADIOL100_LPSLOPEBL_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_LPARTIM_MSK NO_OS_GENMASK(13, 8)

#define	ADIOL100_LPAR_MSK NO_OS_GENMASK(3, 0)

#define	ADIOL100_WDGTIMEBASE_MSK NO_OS_GENMASK(11, 10)

#define	ADIOL100_WDGTIME_MSK NO_OS_GENMASK(9, 4)

#define	ADIOL100_WDGLOCK NO_OS_BIT(3)

#define	ADIOL100_WDGMODE NO_OS_BIT(2)

#define	ADIOL100_WDGENABLE NO_OS_BIT(1)

#define	ADIOL100_WDGCLEAR NO_OS_BIT(0)

#define	ADIOL100_SPICRCEN NO_OS_BIT(7)

#define	ADIOL100_CLKOEN NO_OS_BIT(4)

#define	ADIOL100_CLKDIV_MSK NO_OS_GENMASK(3, 2)

#define	ADIOL100_CLOCKCFG_MSK NO_OS_GENMASK(1, 0)

#define	ADIOL100_CQVTHRH_MSK NO_OS_GENMASK(15, 14)

#define	ADIOL100_CQVTHRL_MSK NO_OS_GENMASK(13, 12)

#define	ADIOL100_RXVTHRH_MSK NO_OS_GENMASK(11, 10)

#define	ADIOL100_RXVTHRL_MSK NO_OS_GENMASK(9, 8)

#define	ADIOL100_CQCL_MSK NO_OS_GENMASK(7, 5)

#define	ADIOL100_CLBL_MSK NO_OS_GENMASK(4, 3)

#define	ADIOL100_ARTTMO_MSK NO_OS_GENMASK(2, 1)

#define	ADIOL100_ARTEN NO_OS_BIT(0)

#define	ADIOL100_REG_CQFETPWRCFG_A 0x1F18

#define	ADIOL100_REG_CQCURRENTCFG_A 0x1F19

#define	ADIOL100_REG_CQFETPROTECT_A 0x1F1A

#define	ADIOL100_REG_CQSLOPE_A 0x1F1B

#define	ADIOL100_REG_CQRETRY_A 0x1F1C

#define	ADIOL100_REG_CQFETPWRCFG_B 0x1F28

#define	ADIOL100_REG_CQCURRENTCFG_B 0x1F29

#define	ADIOL100_REG_CQFETPROTECT_B 0x1F2A

#define	ADIOL100_REG_CQSLOPE_B 0x1F2B

#define	ADIOL100_REG_CQRETRY_B 0x1F2C

#define	ADIOL100_CQFETPWRMAX_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_CQCURRMAX_MSK NO_OS_GENMASK(15, 8)

#define	ADIOL100_CQCURRMIN_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_CQOLTIMOUT_MSK NO_OS_GENMASK(15, 8)

#define	ADIOL100_CQCLTIMOUT_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_CQFETSLOPE_MSK NO_OS_GENMASK(15, 8)

#define	ADIOL100_CQFETSLOPEBL_MSK NO_OS_GENMASK(7, 0)

#define	ADIOL100_CQARTIM_MSK NO_OS_GENMASK(13, 8)

#define	ADIOL100_CQAR_MSK NO_OS_GENMASK(3, 0)

#define	ADIOL100_REG_V24VOLT 0x1F30

#define	ADIOL100_REG_V24VOLTMIN 0x1F31

#define	ADIOL100_REG_V24VOLTMAX 0x1F32

#define	ADIOL100_REG_TEMP 0x1F33

#define	ADIOL100_REG_TEMPMIN 0x1F34

#define	ADIOL100_REG_TEMPMAX 0x1F35

#define	ADIOL100_REG_CQAVOLT 0x1F40

#define	ADIOL100_REG_CQAVOLTMIN 0x1F41

#define	ADIOL100_REG_CQAVOLTMAX 0x1F42

#define	ADIOL100_REG_CQACUR 0x1F43

#define	ADIOL100_REG_CQACURMIN 0x1F44

#define	ADIOL100_REG_CQACURMAX 0x1F45

#define	ADIOL100_REG_LPAVOLT 0x1F46

#define	ADIOL100_REG_LPAVOLTMIN 0x1F47

#define	ADIOL100_REG_LPAVOLTMAX 0x1F48

#define	ADIOL100_REG_LPACUR 0x1F49

#define	ADIOL100_REG_LPACURMIN 0x1F4A

#define	ADIOL100_REG_LPACURMAX 0x1F4B

#define	ADIOL100_REG_CQBVOLT 0x1F50

#define	ADIOL100_REG_CQBVOLTMIN 0x1F51

#define	ADIOL100_REG_CQBVOLTMAX 0x1F52

#define	ADIOL100_REG_CQBCUR 0x1F53

#define	ADIOL100_REG_CQBCURMIN 0x1F54

#define	ADIOL100_REG_CQBCURMAX 0x1F55

#define	ADIOL100_REG_LPBVOLT 0x1F56

#define	ADIOL100_REG_LPBVOLTMIN 0x1F57

#define	ADIOL100_REG_LPBVOLTMAX 0x1F58

#define	ADIOL100_REG_LPBCUR 0x1F59

#define	ADIOL100_REG_LPBCURMIN 0x1F5A

#define	ADIOL100_REG_LPBCURMAX 0x1F5B

#define	ADIOL100_REG_CQMEASCONF 0x1F5F

#define	ADIOL100_TEMPRESSTAT NO_OS_BIT(5)

#define	ADIOL100_RESV24STAT NO_OS_BIT(4)

#define	ADIOL100_RESLPSTATB NO_OS_BIT(3)

#define	ADIOL100_RESLPSTATA NO_OS_BIT(2)

#define	ADIOL100_RESCQSTATB NO_OS_BIT(1)

#define	ADIOL100_RESCQSTATA NO_OS_BIT(0)

#define	ADIOL100_ADC_DATA_MSK NO_OS_GENMASK(12, 0)

#define	ADIOL100_ADC_CHB_OFFSET 0x10

#define	ADIOL100_REG_LED12BGT 0x1F60

#define	ADIOL100_REG_LED1RSEQ 0x1F61

#define	ADIOL100_REG_LED1GSEQ 0x1F62

#define	ADIOL100_REG_LED2RSEQ 0x1F63

#define	ADIOL100_REG_LED2GSEQ 0x1F64

#define	ADIOL100_REG_LED34BGT 0x1F65

#define	ADIOL100_REG_LED3RSEQ 0x1F66

#define	ADIOL100_REG_LED3GSEQ 0x1F67

#define	ADIOL100_REG_LED4RSEQ 0x1F68

#define	ADIOL100_REG_LED4GSEQ 0x1F69

#define	ADIOL100_REG_LEDCONFIG 0x1F6A

#define	ADIOL100_LED_HI_GREEN_MSK NO_OS_GENMASK(15, 12)

#define	ADIOL100_LED_HI_RED_MSK NO_OS_GENMASK(11, 8)

#define	ADIOL100_LED_LO_GREEN_MSK NO_OS_GENMASK(7, 4)

#define	ADIOL100_LED_LO_RED_MSK NO_OS_GENMASK(3, 0)

#define	ADIOL100_LED4CFG_MSK NO_OS_GENMASK(14, 12)

#define	ADIOL100_LED3CFG_MSK NO_OS_GENMASK(10, 8)

#define	ADIOL100_LED2CFG_MSK NO_OS_GENMASK(6, 4)

#define	ADIOL100_LED1CFG_MSK NO_OS_GENMASK(2, 0)

#define	ADIOL100_DEVICE_ID 0x0100

#define	ADIOL101_DEVICE_ID 0x0101

#define	ADIOL100_TX_HDR_LEN 3

#define	ADIOL100_TX_MSG_MAX_LEN 66

#define	ADIOL100_TX_MAX_LEN (ADIOL100_TX_HDR_LEN + ADIOL100_TX_MSG_MAX_LEN)

#define	ADIOL100_RX_HDR_LEN 2

#define	ADIOL100_RX_MSG_MAX_LEN 65

#define	ADIOL100_RX_MAX_LEN (ADIOL100_RX_HDR_LEN + ADIOL100_RX_MSG_MAX_LEN)

#define	ADIOL100_CHIP_ADDR_MAX 3

#define	ADIOL100_LED_GSEQ_REG_OFFSET 1

#define	ADIOL100_READ 1

#define	ADIOL100_WRITE 0

#define	ADIOL100_ADDR_SHIFT 6

#define	ADIOL100_REG_SHIFT 1

#define	ADIOL100_SPI_CMD(addr, reg, rw)

#define	ADIOL100_SPI_DIRECT_LEN 3

#define	ADIOL100_SPI_PAGED_LEN 4

#define	ADIOL100_REG_PAGE_MSK 0xFF00

#define	ADIOL100_REG_PAGE_OFFSET(reg)

Enumerations
enum	adiol100_channel { ADIOL100_CH_A = 0 , ADIOL100_CH_B = 1 }

enum	adiol100_cq_current_limit { ADIOL100_CQCL_10MA = 0 , ADIOL100_CQCL_15MA = 1 , ADIOL100_CQCL_20MA = 2 , ADIOL100_CQCL_50MA = 3 , ADIOL100_CQCL_100MA = 4 , ADIOL100_CQCL_200MA = 5 , ADIOL100_CQCL_300MA = 6 , ADIOL100_CQCL_500MA = 7 }

enum	adiol100_blanking_time { ADIOL100_CLBL_150US = 0 , ADIOL100_CLBL_500US = 1 , ADIOL100_CLBL_1MS = 2 , ADIOL100_CLBL_5MS = 3 }

enum	adiol100_autoretry_timeout { ADIOL100_ARTTMO_5MS = 0 , ADIOL100_ARTTMO_10MS = 1 , ADIOL100_ARTTMO_50MS = 2 , ADIOL100_ARTTMO_100MS = 3 }

enum	adiol100_voltage_threshold { ADIOL100_VTHR_2V = 0 , ADIOL100_VTHR_4V = 1 , ADIOL100_VTHR_6V = 2 , ADIOL100_VTHR_8V = 3 }

enum	adiol100_cq_mode { ADIOL100_CQ_NPN = 0 , ADIOL100_CQ_PUSHPULL = 1 }

enum	adiol100_cq_drv { ADIOL100_CQ_DRV_DIS = 0 , ADIOL100_CQ_DRV_EN = 1 }

enum	adiol100_autoretry { ADIOL100_AUTORETRY_DIS = 0 , ADIOL100_AUTORETRY_EN = 1 }

enum	adiol100_lp_en { ADIOL100_LP_DIS = 0 , ADIOL100_LP_EN = 1 }

enum	adiol100_lp_rev { ADIOL100_LP_REV_DIS = 0 , ADIOL100_LP_REV_EN = 1 }

enum	adiol100_ins_chks { ADIOL100_CHKS_DIS = 0 , ADIOL100_CHKS_EN = 1 }

enum	adiol100_framer { ADIOL100_FRAMER_DIS = 0 , ADIOL100_FRAMER_EN = 1 }

enum	adiol100_uart_par { ADIOL100_UARTPAR_DIS = 0 , ADIOL100_UARTPAR_EN = 1 }

enum	adiol100_uart_en { ADIOL100_UART_DIS = 0 , ADIOL100_UART_EN = 1 }

enum	adiol100_safe_pulse_det { ADIOL100_SAFEPULS_DIS = 0 , ADIOL100_SAFEPULS_EN = 1 }

enum	adiol100_uart_baud { ADIOL100_UART_230400 = 0 , ADIOL100_UART_115200 = 1 , ADIOL100_UART_38400 = 2 , ADIOL100_UART_19200 = 3 , ADIOL100_UART_4800 = 4 , ADIOL100_UART_2400 = 5 }

enum	adiol100_ckt_err_inh { ADIOL100_CKTERR_SEND = 0 , ADIOL100_CKTERR_DISCARD = 1 }

enum	adiol100_msg_repeat { ADIOL100_MSGREP_DIS = 0 , ADIOL100_MSGREP_EN = 1 }

enum	adiol100_bdelay { ADIOL100_BDELAY_0TBIT = 0 , ADIOL100_BDELAY_1TBIT = 1 , ADIOL100_BDELAY_2TBIT = 2 , ADIOL100_BDELAY_3TBIT = 3 }

enum	adiol100_tsize_err_inh { ADIOL100_TSIZEERR_SEND = 0 , ADIOL100_TSIZEERR_DISCARD = 1 }

enum	adiol100_wdg_timebase { ADIOL100_WDG_100US = 0 , ADIOL100_WDG_500US = 1 , ADIOL100_WDG_2MS = 2 }

enum	adiol100_wdg_mode { ADIOL100_WDG_MODE_SPI = 0 , ADIOL100_WDG_MODE_CLEAR = 1 }

enum	adiol100_wdg_en { ADIOL100_WDG_DIS = 0 , ADIOL100_WDG_EN = 1 }

enum	adiol100_wdg_lock { ADIOL100_WDG_UNLOCKED = 0 , ADIOL100_WDG_LOCKED = 1 }

enum	adiol100_keep_msg { ADIOL100_DISCARD_MSG = 0 , ADIOL100_KEEP_MSG = 1 }

enum	adiol100_cq_slew_rate { ADIOL100_CQSLEW_250NS = 0 , ADIOL100_CQSLEW_500NS = 1 , ADIOL100_CQSLEW_1250NS = 2 , ADIOL100_CQSLEW_5000NS = 3 }

enum	adiol100_sink_sel { ADIOL100_SINKSEL_OFF = 0 , ADIOL100_SINKSEL_5MA = 1 , ADIOL100_SINKSEL_2MA = 2 , ADIOL100_SINKSEL_150UA = 3 }

enum	adiol100_iec3th { ADIOL100_IEC3TH_DIS = 0 , ADIOL100_IEC3TH_EN = 1 }

enum	adiol100_source_sink { ADIOL100_CQ_SINK = 0 , ADIOL100_CQ_SOURCE = 1 }

enum	adiol100_glitch_filter { ADIOL100_GLITCH_DIS = 0 , ADIOL100_GLITCH_1 = 1 , ADIOL100_GLITCH_2 = 2 , ADIOL100_GLITCH_3 = 3 }

enum	adiol100_cq_npn { ADIOL100_CQ_PNP = 0 , ADIOL100_CQ_NPN_EN = 1 }

enum	adiol100_cq_ext { ADIOL100_CQEXT_DIS = 0 , ADIOL100_CQEXT_EN = 1 }

enum	adiol100_inv_cq { ADIOL100_INVCQ_DIS = 0 , ADIOL100_INVCQ_EN = 1 }

enum	adiol100_cq_txen { ADIOL100_TXEN_DIS = 0 , ADIOL100_TXEN_EN = 1 }

enum	adiol100_inv_di { ADIOL100_INVDI_DIS = 0 , ADIOL100_INVDI_EN = 1 }

enum	adiol100_auto_cycler_dis { ADIOL100_AUTOCYCLER_KEEP = 0 , ADIOL100_AUTOCYCLER_DIS = 1 }

enum	adiol100_trig_val { ADIOL100_TRIG_GLOBAL = 0 , ADIOL100_TRIG_1 = 1 , ADIOL100_TRIG_2 = 2 , ADIOL100_TRIG_3 = 3 , ADIOL100_TRIG_4 = 4 , ADIOL100_TRIG_5 = 5 , ADIOL100_TRIG_6 = 6 , ADIOL100_TRIG_7 = 7 , ADIOL100_TRIG_8 = 8 , ADIOL100_TRIG_9 = 9 , ADIOL100_TRIG_10 = 10 , ADIOL100_TRIG_11 = 11 , ADIOL100_TRIG_12 = 12 , ADIOL100_TRIG_13 = 13 , ADIOL100_TRIG_14 = 14 , ADIOL100_TRIG_15 = 15 }

enum	adiol100_trig_en { ADIOL100_TRIG_DIS = 0 , ADIOL100_TRIG_EN = 1 }

enum	adiol100_clock_src { ADIOL100_CLK_INTERNAL = 0 , ADIOL100_CLK_CRYSTAL = 1 , ADIOL100_CLK_EXTERNAL = 2 }

enum	adiol100_adc_global { ADIOL100_ADC_V24_VOLT = 0x1F30 , ADIOL100_ADC_V24_VOLT_MIN = 0x1F31 , ADIOL100_ADC_V24_VOLT_MAX = 0x1F32 , ADIOL100_ADC_TEMP = 0x1F33 , ADIOL100_ADC_TEMP_MIN = 0x1F34 , ADIOL100_ADC_TEMP_MAX = 0x1F35 }

enum	adiol100_adc_chan { ADIOL100_ADC_CQ_VOLT = 0x1F40 , ADIOL100_ADC_CQ_VOLT_MIN = 0x1F41 , ADIOL100_ADC_CQ_VOLT_MAX = 0x1F42 , ADIOL100_ADC_CQ_CUR = 0x1F43 , ADIOL100_ADC_CQ_CUR_MIN = 0x1F44 , ADIOL100_ADC_CQ_CUR_MAX = 0x1F45 , ADIOL100_ADC_LP_VOLT = 0x1F46 , ADIOL100_ADC_LP_VOLT_MIN = 0x1F47 , ADIOL100_ADC_LP_VOLT_MAX = 0x1F48 , ADIOL100_ADC_LP_CUR = 0x1F49 , ADIOL100_ADC_LP_CUR_MIN = 0x1F4A , ADIOL100_ADC_LP_CUR_MAX = 0x1F4B }

enum	adiol100_led { ADIOL100_LED1 = 0 , ADIOL100_LED2 = 1 , ADIOL100_LED3 = 2 , ADIOL100_LED4 = 3 }

enum	adiol100_led_mode { ADIOL100_LED_BLINK = 0 , ADIOL100_LED_BLINK_EDGE = 1 , ADIOL100_LED_ON_HIGH = 2 , ADIOL100_LED_ON_LOW = 3 , ADIOL100_LED_BLINK_FAST = 4 }

enum	adiol100_led_brightness { ADIOL100_LED_BGT_6 = 0 , ADIOL100_LED_BGT_12 = 1 , ADIOL100_LED_BGT_18 = 2 , ADIOL100_LED_BGT_25 = 3 , ADIOL100_LED_BGT_31 = 4 , ADIOL100_LED_BGT_37 = 5 , ADIOL100_LED_BGT_43 = 6 , ADIOL100_LED_BGT_50 = 7 , ADIOL100_LED_BGT_56 = 8 , ADIOL100_LED_BGT_62 = 9 , ADIOL100_LED_BGT_68 = 10 , ADIOL100_LED_BGT_75 = 11 , ADIOL100_LED_BGT_81 = 12 , ADIOL100_LED_BGT_87 = 13 , ADIOL100_LED_BGT_93 = 14 , ADIOL100_LED_BGT_100 = 15 }

enum	adiol100_led_seq { ADIOL100_LED_SEQ_OFF = 0x0000 , ADIOL100_LED_SEQ_ON = 0xFFFF , ADIOL100_LED_SEQ_BLINK_SLOW = 0xFF00 , ADIOL100_LED_SEQ_BLINK_FAST = 0xF0F0 , ADIOL100_LED_SEQ_PULSE = 0x8000 }

Functions
int	adiol100_read_revid (struct adiol100_dev dev, uint16_t rev_id)
	Read the chip RevisionID register.

int	adiol100_read_devid (struct adiol100_dev dev, uint16_t dev_id)
	Read the chip DeviceID register.

int	adiol100_setup_clock (struct adiol100_dev *dev, uint8_t clock_src, uint8_t clk_div)
	Configure the clock source, divider, and enable clock output.

int	adiol100_init (struct adiol100_dev *dev, struct adiol100_init_param ip)
	Initialize the ADIOL100 device.

int	adiol100_remove (struct adiol100_dev *dev)
	Free resources allocated by adiol100_init().

int	adiol100_read (struct adiol100_dev dev, uint16_t reg, uint16_t value)
	Read a 16-bit register. Handles paged access automatically.

int	adiol100_write (struct adiol100_dev *dev, uint16_t reg, uint16_t value)
	Write a 16-bit register. Handles paged access automatically.

int	adiol100_update (struct adiol100_dev *dev, uint16_t reg, uint16_t mask, uint16_t value)
	Read-modify-write a register using a bit mask.

int	adiol100_load_msg (struct adiol100_dev dev, enum adiol100_channel ch, const uint8_t data, uint8_t txbytes, uint8_t rxbytes, enum adiol100_keep_msg keep)
	Load IO-Link payload into TxFIFO without triggering CQSend.

int	adiol100_send_msg (struct adiol100_dev *dev, enum adiol100_channel ch)
	Assert CQSend to trigger transmission of the message in the TxFIFO.

int	adiol100_load_and_send_msg (struct adiol100_dev dev, enum adiol100_channel ch, uint8_t data, uint8_t txbytes, uint8_t rxbytes, enum adiol100_keep_msg keep, uint16_t framctrl1)
	Load IO-Link payload into TxFIFO and trigger CQSend in one SPI burst.

int	adiol100_read_msg (struct adiol100_dev dev, enum adiol100_channel ch, uint8_t data, uint8_t data_len)
	Read device response from RxFIFO, stripping the MsgID/RxBytesAct header.

int	adiol100_reset_leds (struct adiol100_dev *dev)
	Turn off all four LEDs by clearing their sequences and resetting modes.

int	adiol100_global_reset (struct adiol100_dev *dev)
	Disable global interrupts, clear trigger, read-clear all IRQ registers, and turn off all LEDs.

int	adiol100_reset_tx_fifo (struct adiol100_dev *dev, enum adiol100_channel ch)
	Reset the transmit FIFO for a channel.

int	adiol100_reset_rx_fifo (struct adiol100_dev *dev, enum adiol100_channel ch)
	Reset the receive FIFO for a channel.

int	adiol100_reset_channel (struct adiol100_dev *dev, enum adiol100_channel ch)
	Assert CHANRST to reset all channel-specific registers.

int	adiol100_config_cq (struct adiol100_dev *dev, enum adiol100_channel ch, enum adiol100_cq_mode mode, enum adiol100_cq_drv drv_en, enum adiol100_sink_sel sink_sel, enum adiol100_cq_slew_rate slew_rate, enum adiol100_iec3th iec3th, enum adiol100_source_sink source_sink, enum adiol100_glitch_filter glitch_filter, enum adiol100_cq_npn npn, enum adiol100_cq_ext cq_ext, enum adiol100_inv_cq inv_cq, enum adiol100_cq_txen txen)
	Configure the CQ driver.

int	adiol100_config_cq_protection (struct adiol100_dev *dev, enum adiol100_channel ch, enum adiol100_cq_current_limit current_limit, enum adiol100_blanking_time blanking, enum adiol100_autoretry_timeout retry_tmo, enum adiol100_autoretry retry_en, enum adiol100_voltage_threshold tx_vthr_h, enum adiol100_voltage_threshold tx_vthr_l, enum adiol100_voltage_threshold rx_vthr_h, enum adiol100_voltage_threshold rx_vthr_l)
	Configure CQ protection: current limit, blanking, thresholds, autoretry.

int	adiol100_config_lp (struct adiol100_dev *dev, enum adiol100_channel ch, enum adiol100_lp_en enable, enum adiol100_lp_rev rev_en)
	Configure the L+ sensor supply: enable and reverse polarity protection.

int	adiol100_config_lp_protection (struct adiol100_dev *dev, enum adiol100_channel ch, uint8_t cl_nom, uint8_t pwr_max, uint8_t curr_max, uint8_t curr_min, uint8_t ol_timeout, uint8_t cl_timeout, uint8_t slope, uint8_t slope_bl, uint8_t ar_time, uint8_t ar_count)
	Configure L+ FET protection: current, power, timeouts, slope, retry.

int	adiol100_config_cq_protection_ext (struct adiol100_dev *dev, enum adiol100_channel ch, uint8_t cl_nom, uint8_t pwr_max, uint8_t curr_max, uint8_t curr_min, uint8_t ol_timeout, uint8_t cl_timeout, uint8_t slope, uint8_t slope_bl, uint8_t ar_time, uint8_t ar_count)
	Configure CQ external high-side FET protection.

int	adiol100_config_di (struct adiol100_dev *dev, enum adiol100_channel ch, enum adiol100_iec3th iec3th, enum adiol100_source_sink source_sink, enum adiol100_sink_sel sink_sel, enum adiol100_glitch_filter glitch_filter, enum adiol100_inv_di inv_di)
	Configure the digital input (DICfgA/B).

int	adiol100_config_framer (struct adiol100_dev *dev, enum adiol100_channel ch, enum adiol100_ins_chks ins_chks, enum adiol100_framer framer_en, enum adiol100_ckt_err_inh ckt_err_inh, enum adiol100_msg_repeat msg_repeat, enum adiol100_bdelay bdelay, uint8_t ddelay, enum adiol100_tsize_err_inh tsize_err_inh, enum adiol100_uart_par uart_par, enum adiol100_uart_baud uart_baud, enum adiol100_uart_en uart_en, enum adiol100_safe_pulse_det safe_pulse_det)
	Configure the IO-Link framer (FramCtrl1 + FramCtrl2).

int	adiol100_wakeup_request (struct adiol100_dev *dev, enum adiol100_channel ch)
	Generate a wake-up pulse (WURQ) on a channel.

int	adiol100_clear_estcom_fails (struct adiol100_dev *dev, enum adiol100_channel ch)
	Clear the establish-communication fail counter in StatusA/B.

int	adiol100_config_trigger (struct adiol100_dev *dev, enum adiol100_channel ch, enum adiol100_auto_cycler_dis auto_cycler_dis, enum adiol100_trig_val trig_val, enum adiol100_trig_en trig_en)
	Configure trigger assignment for a channel.

int	adiol100_fire_trigger (struct adiol100_dev *dev, enum adiol100_trig_val trig_val)
	Fire an SPI trigger to start transmission on matching channels.

int	adiol100_led_sync (struct adiol100_dev *dev)
	Synchronize LED drivers across multiple devices.

int	adiol100_set_burst_len (struct adiol100_dev *dev, enum adiol100_channel ch, uint8_t write_len, uint8_t read_len)
	Set the SPI burst length for FIFO access.

int	adiol100_get_comrt (struct adiol100_dev dev, enum adiol100_channel ch, uint8_t comrt)
	Get the communication rate determined by EstCom (COM1/2/3).

int	adiol100_set_cycle_tmr (struct adiol100_dev *dev, enum adiol100_channel ch, uint8_t value)
	Set the IO-Link cycle timer value.

int	adiol100_get_cycle_tmr (struct adiol100_dev dev, enum adiol100_channel ch, uint16_t value)
	Get the current cycle timer register value.

int	adiol100_enable_cycle_timer (struct adiol100_dev *dev, enum adiol100_channel ch)
	Enable the cycle timer for autonomous cyclic operation.

int	adiol100_disable_cycle_timer (struct adiol100_dev *dev, enum adiol100_channel ch)
	Disable the cycle timer.

int	adiol100_get_channel_irq (struct adiol100_dev dev, enum adiol100_channel ch, uint16_t flags)
	Read and accumulate channel interrupt flags.

int	adiol100_get_global_irq (struct adiol100_dev dev, uint16_t flags)
	Read and accumulate global interrupt flags.

void	adiol100_clear_channel_irq (struct adiol100_dev *dev, enum adiol100_channel ch, uint16_t mask)
	Clear specific bits from the accumulated channel interrupt flags.

void	adiol100_clear_global_irq (struct adiol100_dev *dev, uint16_t mask)
	Clear specific bits from the accumulated global interrupt flags.

int	adiol100_enable_global_irq (struct adiol100_dev *dev, uint16_t mask)
	Set the global interrupt enable mask.

int	adiol100_enable_channel_irq (struct adiol100_dev *dev, enum adiol100_channel ch, uint16_t mask)
	Set the channel interrupt enable mask.

int	adiol100_read_channel_burst (struct adiol100_dev dev, enum adiol100_channel ch, uint16_t rxstat, uint16_t irq, uint16_t status, uint8_t *data, uint8_t data_len)
	Burst-read RxFIFOStat, Interrupt, Status, and RxFIFO in one SPI cycle.

int	adiol100_get_fifo_status (struct adiol100_dev dev, enum adiol100_channel ch, uint16_t flags)
	Read the RxFIFO status register (level + error flags).

int	adiol100_get_status (struct adiol100_dev dev, enum adiol100_channel ch, uint16_t flags)
	Read the channel status register.

int	adiol100_config_watchdog (struct adiol100_dev *dev, enum adiol100_wdg_timebase timebase, uint8_t time, enum adiol100_wdg_mode mode, enum adiol100_wdg_en enable, enum adiol100_wdg_lock lock)
	Configure the watchdog timer.

int	adiol100_clear_watchdog (struct adiol100_dev *dev)
	Clear the watchdog timer (write-1-to-clear).

int	adiol100_estcom (struct adiol100_dev *dev, enum adiol100_channel ch)
	Run EstablishCommunication: reset FIFOs, set EstCom, poll for result.

int	adiol100_read_adc_global (struct adiol100_dev dev, enum adiol100_adc_global source, uint16_t value)
	Read a raw 13-bit global ADC measurement (V24 voltage or temperature).

int	adiol100_read_adc_chan (struct adiol100_dev dev, enum adiol100_adc_chan source, enum adiol100_channel ch, uint16_t value)
	Read a raw 13-bit per-channel ADC measurement (CQ/LP voltage or current).

int	adiol100_reset_adc_stats (struct adiol100_dev *dev)
	Reset all ADC min/max statistics (V24, Temp, CQ and LP for both channels).

int	adiol100_set_led_brightness (struct adiol100_dev *dev, enum adiol100_led led, enum adiol100_led_brightness red_bgt, enum adiol100_led_brightness green_bgt)
	Set the brightness for one LED.

int	adiol100_set_led_sequence (struct adiol100_dev *dev, enum adiol100_led led, enum adiol100_led_seq red_seq, enum adiol100_led_seq green_seq)
	Set the blink sequence for one LED.

int	adiol100_set_led_mode (struct adiol100_dev *dev, enum adiol100_led led, enum adiol100_led_mode mode)
	Set the operating mode for one LED.

Detailed Description

ADIOL100 IO-Link transceiver driver definitions.

Author: Liviu Stan (liviu.nosp@m..sta.nosp@m.n@ana.nosp@m.log..nosp@m.com)

SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

◆ ADIOL100_ADC_CHB_OFFSET

#define ADIOL100_ADC_CHB_OFFSET 0x10

◆ ADIOL100_ADC_DATA_MSK

#define ADIOL100_ADC_DATA_MSK NO_OS_GENMASK(12, 0)

◆ ADIOL100_ADDR_SHIFT

#define ADIOL100_ADDR_SHIFT 6

◆ ADIOL100_ARTEN

#define ADIOL100_ARTEN NO_OS_BIT(0)

◆ ADIOL100_ARTTMO_MSK

#define ADIOL100_ARTTMO_MSK NO_OS_GENMASK(2, 1)

◆ ADIOL100_AUTOCYCLERDIS

#define ADIOL100_AUTOCYCLERDIS NO_OS_BIT(8)

◆ ADIOL100_BDELAY_MSK

#define ADIOL100_BDELAY_MSK NO_OS_GENMASK(9, 8)

◆ ADIOL100_BURST_RDLEN_MSK

#define ADIOL100_BURST_RDLEN_MSK NO_OS_GENMASK(15, 8)

◆ ADIOL100_BURST_WRLEN_MSK

#define ADIOL100_BURST_WRLEN_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_CHANRST

#define ADIOL100_CHANRST NO_OS_BIT(15)

◆ ADIOL100_CHIP_ADDR_MAX

#define ADIOL100_CHIP_ADDR_MAX 3

◆ ADIOL100_CKTERRINH

#define ADIOL100_CKTERRINH NO_OS_BIT(11)

◆ ADIOL100_CLBL_MSK

#define ADIOL100_CLBL_MSK NO_OS_GENMASK(4, 3)

◆ ADIOL100_CLKDIV_MSK

#define ADIOL100_CLKDIV_MSK NO_OS_GENMASK(3, 2)

◆ ADIOL100_CLKOEN

#define ADIOL100_CLKOEN NO_OS_BIT(4)

◆ ADIOL100_CLOCKCFG_MSK

#define ADIOL100_CLOCKCFG_MSK NO_OS_GENMASK(1, 0)

◆ ADIOL100_COMLOST

#define ADIOL100_COMLOST NO_OS_BIT(13)

◆ ADIOL100_COMRT_MSK

#define ADIOL100_COMRT_MSK NO_OS_GENMASK(7, 6)

◆ ADIOL100_CQAR_MSK

#define ADIOL100_CQAR_MSK NO_OS_GENMASK(3, 0)

◆ ADIOL100_CQARTIM_MSK

#define ADIOL100_CQARTIM_MSK NO_OS_GENMASK(13, 8)

◆ ADIOL100_CQCL_L

#define ADIOL100_CQCL_L NO_OS_BIT(12)

◆ ADIOL100_CQCL_MSK

#define ADIOL100_CQCL_MSK NO_OS_GENMASK(7, 5)

◆ ADIOL100_CQCL_S

#define ADIOL100_CQCL_S NO_OS_BIT(13)

◆ ADIOL100_CQCLTIMOUT_MSK

#define ADIOL100_CQCLTIMOUT_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_CQCURLIMINT

#define ADIOL100_CQCURLIMINT NO_OS_BIT(3)

◆ ADIOL100_CQCURRMAX_MSK

#define ADIOL100_CQCURRMAX_MSK NO_OS_GENMASK(15, 8)

◆ ADIOL100_CQCURRMIN_MSK

#define ADIOL100_CQCURRMIN_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_CQDRVERR

#define ADIOL100_CQDRVERR NO_OS_BIT(5)

◆ ADIOL100_CQDRVERRINT

#define ADIOL100_CQDRVERRINT NO_OS_BIT(5)

◆ ADIOL100_CQEXT

#define ADIOL100_CQEXT NO_OS_BIT(3)

◆ ADIOL100_CQEXTCLNOM_MSK

#define ADIOL100_CQEXTCLNOM_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_CQFETPWRMAX_MSK

#define ADIOL100_CQFETPWRMAX_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_CQFETSLOPE_MSK

#define ADIOL100_CQFETSLOPE_MSK NO_OS_GENMASK(15, 8)

◆ ADIOL100_CQFETSLOPEBL_MSK

#define ADIOL100_CQFETSLOPEBL_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_CQLEVEL

#define ADIOL100_CQLEVEL NO_OS_BIT(0)

◆ ADIOL100_CQLEVELINT

#define ADIOL100_CQLEVELINT NO_OS_BIT(0)

◆ ADIOL100_CQOL_L

#define ADIOL100_CQOL_L NO_OS_BIT(9)

◆ ADIOL100_CQOLTIMOUT_MSK

#define ADIOL100_CQOLTIMOUT_MSK NO_OS_GENMASK(15, 8)

◆ ADIOL100_CQRXWINT

#define ADIOL100_CQRXWINT NO_OS_BIT(1)

◆ ADIOL100_CQSEND

#define ADIOL100_CQSEND NO_OS_BIT(0)

◆ ADIOL100_CQSLEW_MSK

#define ADIOL100_CQSLEW_MSK NO_OS_GENMASK(9, 8)

◆ ADIOL100_CQSLOERR_L

#define ADIOL100_CQSLOERR_L NO_OS_BIT(10)

◆ ADIOL100_CQTHEINT

#define ADIOL100_CQTHEINT NO_OS_BIT(4)

◆ ADIOL100_CQTO_L

#define ADIOL100_CQTO_L NO_OS_BIT(11)

◆ ADIOL100_CQVTHRH_MSK

#define ADIOL100_CQVTHRH_MSK NO_OS_GENMASK(15, 14)

◆ ADIOL100_CQVTHRL_MSK

#define ADIOL100_CQVTHRL_MSK NO_OS_GENMASK(13, 12)

◆ ADIOL100_CQVWINT

#define ADIOL100_CQVWINT NO_OS_BIT(2)

◆ ADIOL100_CYCLETMREN

#define ADIOL100_CYCLETMREN NO_OS_BIT(1)

◆ ADIOL100_CYCLTMR_MSK

#define ADIOL100_CYCLTMR_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_DDELAY_MSK

#define ADIOL100_DDELAY_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_DELAYERRINT

#define ADIOL100_DELAYERRINT NO_OS_BIT(15)

◆ ADIOL100_DEVICE_ID

#define ADIOL100_DEVICE_ID 0x0100

◆ ADIOL100_DILEVEL

#define ADIOL100_DILEVEL NO_OS_BIT(8)

◆ ADIOL100_DILEVELINT

#define ADIOL100_DILEVELINT NO_OS_BIT(8)

◆ ADIOL100_DRVEN

#define ADIOL100_DRVEN NO_OS_BIT(5)

◆ ADIOL100_ESTCOM

#define ADIOL100_ESTCOM NO_OS_BIT(5)

◆ ADIOL100_ESTCOM_TIMEOUT_MS

#define ADIOL100_ESTCOM_TIMEOUT_MS 160

◆ ADIOL100_ESTCOMFACLR

#define ADIOL100_ESTCOMFACLR NO_OS_BIT(13)

◆ ADIOL100_ESTCOMFAILINT

#define ADIOL100_ESTCOMFAILINT NO_OS_BIT(10)

◆ ADIOL100_ESTCOMSUCINT

#define ADIOL100_ESTCOMSUCINT NO_OS_BIT(11)

◆ ADIOL100_EXTCLKMISINT

#define ADIOL100_EXTCLKMISINT NO_OS_BIT(12)

◆ ADIOL100_EXTCLKMISINTEN

#define ADIOL100_EXTCLKMISINTEN NO_OS_BIT(12)

◆ ADIOL100_EXTCLKMISST

#define ADIOL100_EXTCLKMISST NO_OS_BIT(4)

◆ ADIOL100_EXTCLKOKINT

#define ADIOL100_EXTCLKOKINT NO_OS_BIT(15)

◆ ADIOL100_EXTCLKOKINTEN

#define ADIOL100_EXTCLKOKINTEN NO_OS_BIT(15)

◆ ADIOL100_EXTCLKOKST

#define ADIOL100_EXTCLKOKST NO_OS_BIT(7)

◆ ADIOL100_FRAMEERR

#define ADIOL100_FRAMEERR NO_OS_BIT(9)

◆ ADIOL100_FRAMEREN

#define ADIOL100_FRAMEREN NO_OS_BIT(2)

◆ ADIOL100_GLITCHFILTER_MSK

#define ADIOL100_GLITCHFILTER_MSK NO_OS_GENMASK(11, 10)

◆ ADIOL100_GLITCHFILTERDI_MSK

#define ADIOL100_GLITCHFILTERDI_MSK NO_OS_GENMASK(11, 10)

◆ ADIOL100_IEC3TH

#define ADIOL100_IEC3TH NO_OS_BIT(15)

◆ ADIOL100_IEC3THDI

#define ADIOL100_IEC3THDI NO_OS_BIT(15)

◆ ADIOL100_INSCHKS

#define ADIOL100_INSCHKS NO_OS_BIT(12)

◆ ADIOL100_INVCQ

#define ADIOL100_INVCQ NO_OS_BIT(2)

◆ ADIOL100_INVDI

#define ADIOL100_INVDI NO_OS_BIT(2)

◆ ADIOL100_LED1CFG_MSK

#define ADIOL100_LED1CFG_MSK NO_OS_GENMASK(2, 0)

◆ ADIOL100_LED2CFG_MSK

#define ADIOL100_LED2CFG_MSK NO_OS_GENMASK(6, 4)

◆ ADIOL100_LED3CFG_MSK

#define ADIOL100_LED3CFG_MSK NO_OS_GENMASK(10, 8)

◆ ADIOL100_LED4CFG_MSK

#define ADIOL100_LED4CFG_MSK NO_OS_GENMASK(14, 12)

◆ ADIOL100_LED_GSEQ_REG_OFFSET

#define ADIOL100_LED_GSEQ_REG_OFFSET 1

◆ ADIOL100_LED_HI_GREEN_MSK

#define ADIOL100_LED_HI_GREEN_MSK NO_OS_GENMASK(15, 12)

◆ ADIOL100_LED_HI_RED_MSK

#define ADIOL100_LED_HI_RED_MSK NO_OS_GENMASK(11, 8)

◆ ADIOL100_LED_LO_GREEN_MSK

#define ADIOL100_LED_LO_GREEN_MSK NO_OS_GENMASK(7, 4)

◆ ADIOL100_LED_LO_RED_MSK

#define ADIOL100_LED_LO_RED_MSK NO_OS_GENMASK(3, 0)

◆ ADIOL100_LEDSYNC

#define ADIOL100_LEDSYNC NO_OS_BIT(7)

◆ ADIOL100_LPAR_MSK

#define ADIOL100_LPAR_MSK NO_OS_GENMASK(3, 0)

◆ ADIOL100_LPARTIM_MSK

#define ADIOL100_LPARTIM_MSK NO_OS_GENMASK(13, 8)

◆ ADIOL100_LPCLNOM_MSK

#define ADIOL100_LPCLNOM_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_LPCLTIMOUT_MSK

#define ADIOL100_LPCLTIMOUT_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_LPCURRMAX_MSK

#define ADIOL100_LPCURRMAX_MSK NO_OS_GENMASK(15, 8)

◆ ADIOL100_LPCURRMIN_MSK

#define ADIOL100_LPCURRMIN_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_LPEN

#define ADIOL100_LPEN NO_OS_BIT(8)

◆ ADIOL100_LPERR

#define ADIOL100_LPERR NO_OS_BIT(7)

◆ ADIOL100_LPERRINT

#define ADIOL100_LPERRINT NO_OS_BIT(7)

◆ ADIOL100_LPFETPWRMAX_MSK

#define ADIOL100_LPFETPWRMAX_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_LPFETREVEN

#define ADIOL100_LPFETREVEN NO_OS_BIT(15)

◆ ADIOL100_LPOLTIMOUT_MSK

#define ADIOL100_LPOLTIMOUT_MSK NO_OS_GENMASK(15, 8)

◆ ADIOL100_LPSLOPE_MSK

#define ADIOL100_LPSLOPE_MSK NO_OS_GENMASK(15, 8)

◆ ADIOL100_LPSLOPEBL_MSK

#define ADIOL100_LPSLOPEBL_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_LPUV

#define ADIOL100_LPUV NO_OS_BIT(6)

◆ ADIOL100_LPUVINT

#define ADIOL100_LPUVINT NO_OS_BIT(6)

◆ ADIOL100_MSGREPEAT

#define ADIOL100_MSGREPEAT NO_OS_BIT(10)

◆ ADIOL100_NPN

#define ADIOL100_NPN NO_OS_BIT(7)

◆ ADIOL100_NUM_CHANNELS

#define ADIOL100_NUM_CHANNELS 2

◆ ADIOL100_PAGED_BASE

#define ADIOL100_PAGED_BASE 0x1F00

◆ ADIOL100_PARITYERR

#define ADIOL100_PARITYERR NO_OS_BIT(8)

◆ ADIOL100_PUSHPUL

#define ADIOL100_PUSHPUL NO_OS_BIT(6)

◆ ADIOL100_RCHKSMERR

#define ADIOL100_RCHKSMERR NO_OS_BIT(11)

◆ ADIOL100_READ

#define ADIOL100_READ 1

◆ ADIOL100_REG_CLOCKCFG

#define ADIOL100_REG_CLOCKCFG 0x1F01

◆ ADIOL100_REG_CQACUR

#define ADIOL100_REG_CQACUR 0x1F43

◆ ADIOL100_REG_CQACURMAX

#define ADIOL100_REG_CQACURMAX 0x1F45

◆ ADIOL100_REG_CQACURMIN

#define ADIOL100_REG_CQACURMIN 0x1F44

◆ ADIOL100_REG_CQAVOLT

#define ADIOL100_REG_CQAVOLT 0x1F40

◆ ADIOL100_REG_CQAVOLTMAX

#define ADIOL100_REG_CQAVOLTMAX 0x1F42

◆ ADIOL100_REG_CQAVOLTMIN

#define ADIOL100_REG_CQAVOLTMIN 0x1F41

◆ ADIOL100_REG_CQBCUR

#define ADIOL100_REG_CQBCUR 0x1F53

◆ ADIOL100_REG_CQBCURMAX

#define ADIOL100_REG_CQBCURMAX 0x1F55

◆ ADIOL100_REG_CQBCURMIN

#define ADIOL100_REG_CQBCURMIN 0x1F54

◆ ADIOL100_REG_CQBVOLT

#define ADIOL100_REG_CQBVOLT 0x1F50

◆ ADIOL100_REG_CQBVOLTMAX

#define ADIOL100_REG_CQBVOLTMAX 0x1F52

◆ ADIOL100_REG_CQBVOLTMIN

#define ADIOL100_REG_CQBVOLTMIN 0x1F51

◆ ADIOL100_REG_CQCURLIM_A

#define ADIOL100_REG_CQCURLIM_A 0x000A

◆ ADIOL100_REG_CQCURLIM_B

#define ADIOL100_REG_CQCURLIM_B 0x001A

◆ ADIOL100_REG_CQCURRENTCFG_A

#define ADIOL100_REG_CQCURRENTCFG_A 0x1F19

◆ ADIOL100_REG_CQCURRENTCFG_B

#define ADIOL100_REG_CQCURRENTCFG_B 0x1F29

◆ ADIOL100_REG_CQEXTCFG_A

#define ADIOL100_REG_CQEXTCFG_A 0x000B

◆ ADIOL100_REG_CQEXTCFG_B

#define ADIOL100_REG_CQEXTCFG_B 0x001B

◆ ADIOL100_REG_CQFETPROTECT_A

#define ADIOL100_REG_CQFETPROTECT_A 0x1F1A

◆ ADIOL100_REG_CQFETPROTECT_B

#define ADIOL100_REG_CQFETPROTECT_B 0x1F2A

◆ ADIOL100_REG_CQFETPWRCFG_A

#define ADIOL100_REG_CQFETPWRCFG_A 0x1F18

◆ ADIOL100_REG_CQFETPWRCFG_B

#define ADIOL100_REG_CQFETPWRCFG_B 0x1F28

◆ ADIOL100_REG_CQMEASCONF

#define ADIOL100_REG_CQMEASCONF 0x1F5F

◆ ADIOL100_REG_CQRETRY_A

#define ADIOL100_REG_CQRETRY_A 0x1F1C

◆ ADIOL100_REG_CQRETRY_B

#define ADIOL100_REG_CQRETRY_B 0x1F2C

◆ ADIOL100_REG_CQSET_A

#define ADIOL100_REG_CQSET_A 0x0009

◆ ADIOL100_REG_CQSET_B

#define ADIOL100_REG_CQSET_B 0x0019

◆ ADIOL100_REG_CQSLOPE_A

#define ADIOL100_REG_CQSLOPE_A 0x1F1B

◆ ADIOL100_REG_CQSLOPE_B

#define ADIOL100_REG_CQSLOPE_B 0x1F2B

◆ ADIOL100_REG_CYCLTMR_A

#define ADIOL100_REG_CYCLTMR_A 0x0007

◆ ADIOL100_REG_CYCLTMR_B

#define ADIOL100_REG_CYCLTMR_B 0x0017

◆ ADIOL100_REG_DEVICEID

#define ADIOL100_REG_DEVICEID 0x1F03

◆ ADIOL100_REG_DICFG_A

#define ADIOL100_REG_DICFG_A 0x000C

◆ ADIOL100_REG_DICFG_B

#define ADIOL100_REG_DICFG_B 0x001C

◆ ADIOL100_REG_EXTRAPAGE

#define ADIOL100_REG_EXTRAPAGE 0x001F

◆ ADIOL100_REG_FRAMCTRL1_A

#define ADIOL100_REG_FRAMCTRL1_A 0x0005

◆ ADIOL100_REG_FRAMCTRL1_B

#define ADIOL100_REG_FRAMCTRL1_B 0x0015

◆ ADIOL100_REG_FRAMCTRL2_A

#define ADIOL100_REG_FRAMCTRL2_A 0x0006

◆ ADIOL100_REG_FRAMCTRL2_B

#define ADIOL100_REG_FRAMCTRL2_B 0x0016

◆ ADIOL100_REG_INTEN_A

#define ADIOL100_REG_INTEN_A 0x000E

◆ ADIOL100_REG_INTEN_B

#define ADIOL100_REG_INTEN_B 0x001E

◆ ADIOL100_REG_INTERRUPT_A

#define ADIOL100_REG_INTERRUPT_A 0x0002

◆ ADIOL100_REG_INTERRUPT_B

#define ADIOL100_REG_INTERRUPT_B 0x0012

◆ ADIOL100_REG_INTERRUPTG

#define ADIOL100_REG_INTERRUPTG 0x0000

◆ ADIOL100_REG_INTERRUPTG_EN

#define ADIOL100_REG_INTERRUPTG_EN 0x1F00

◆ ADIOL100_REG_LED12BGT

#define ADIOL100_REG_LED12BGT 0x1F60

◆ ADIOL100_REG_LED1GSEQ

#define ADIOL100_REG_LED1GSEQ 0x1F62

◆ ADIOL100_REG_LED1RSEQ

#define ADIOL100_REG_LED1RSEQ 0x1F61

◆ ADIOL100_REG_LED2GSEQ

#define ADIOL100_REG_LED2GSEQ 0x1F64

◆ ADIOL100_REG_LED2RSEQ

#define ADIOL100_REG_LED2RSEQ 0x1F63

◆ ADIOL100_REG_LED34BGT

#define ADIOL100_REG_LED34BGT 0x1F65

◆ ADIOL100_REG_LED3GSEQ

#define ADIOL100_REG_LED3GSEQ 0x1F67

◆ ADIOL100_REG_LED3RSEQ

#define ADIOL100_REG_LED3RSEQ 0x1F66

◆ ADIOL100_REG_LED4GSEQ

#define ADIOL100_REG_LED4GSEQ 0x1F69

◆ ADIOL100_REG_LED4RSEQ

#define ADIOL100_REG_LED4RSEQ 0x1F68

◆ ADIOL100_REG_LEDCONFIG

#define ADIOL100_REG_LEDCONFIG 0x1F6A

◆ ADIOL100_REG_LPACUR

#define ADIOL100_REG_LPACUR 0x1F49

◆ ADIOL100_REG_LPACURMAX

#define ADIOL100_REG_LPACURMAX 0x1F4B

◆ ADIOL100_REG_LPACURMIN

#define ADIOL100_REG_LPACURMIN 0x1F4A

◆ ADIOL100_REG_LPAVOLT

#define ADIOL100_REG_LPAVOLT 0x1F46

◆ ADIOL100_REG_LPAVOLTMAX

#define ADIOL100_REG_LPAVOLTMAX 0x1F48

◆ ADIOL100_REG_LPAVOLTMIN

#define ADIOL100_REG_LPAVOLTMIN 0x1F47

◆ ADIOL100_REG_LPBCUR

#define ADIOL100_REG_LPBCUR 0x1F59

◆ ADIOL100_REG_LPBCURMAX

#define ADIOL100_REG_LPBCURMAX 0x1F5B

◆ ADIOL100_REG_LPBCURMIN

#define ADIOL100_REG_LPBCURMIN 0x1F5A

◆ ADIOL100_REG_LPBVOLT

#define ADIOL100_REG_LPBVOLT 0x1F56

◆ ADIOL100_REG_LPBVOLTMAX

#define ADIOL100_REG_LPBVOLTMAX 0x1F58

◆ ADIOL100_REG_LPBVOLTMIN

#define ADIOL100_REG_LPBVOLTMIN 0x1F57

◆ ADIOL100_REG_LPCFG_A

#define ADIOL100_REG_LPCFG_A 0x000D

◆ ADIOL100_REG_LPCFG_B

#define ADIOL100_REG_LPCFG_B 0x001D

◆ ADIOL100_REG_LPCURRENTCFG_A

#define ADIOL100_REG_LPCURRENTCFG_A 0x1F11

◆ ADIOL100_REG_LPCURRENTCFG_B

#define ADIOL100_REG_LPCURRENTCFG_B 0x1F21

◆ ADIOL100_REG_LPFETPROTECT_A

#define ADIOL100_REG_LPFETPROTECT_A 0x1F12

◆ ADIOL100_REG_LPFETPROTECT_B

#define ADIOL100_REG_LPFETPROTECT_B 0x1F22

◆ ADIOL100_REG_LPFETPWRCFG_A

#define ADIOL100_REG_LPFETPWRCFG_A 0x1F10

◆ ADIOL100_REG_LPFETPWRCFG_B

#define ADIOL100_REG_LPFETPWRCFG_B 0x1F20

◆ ADIOL100_REG_LPRETRY_A

#define ADIOL100_REG_LPRETRY_A 0x1F14

◆ ADIOL100_REG_LPRETRY_B

#define ADIOL100_REG_LPRETRY_B 0x1F24

◆ ADIOL100_REG_LPSLOPE_A

#define ADIOL100_REG_LPSLOPE_A 0x1F13

◆ ADIOL100_REG_LPSLOPE_B

#define ADIOL100_REG_LPSLOPE_B 0x1F23

◆ ADIOL100_REG_PAGE_MSK

#define ADIOL100_REG_PAGE_MSK 0xFF00

◆ ADIOL100_REG_PAGE_OFFSET

#define ADIOL100_REG_PAGE_OFFSET ( reg )

Value:

((reg) & 0xFF)

◆ ADIOL100_REG_REVISIONID

#define ADIOL100_REG_REVISIONID 0x1F02

◆ ADIOL100_REG_RXFIFOSTAT_A

#define ADIOL100_REG_RXFIFOSTAT_A 0x0001

◆ ADIOL100_REG_RXFIFOSTAT_B

#define ADIOL100_REG_RXFIFOSTAT_B 0x0011

◆ ADIOL100_REG_SHIFT

#define ADIOL100_REG_SHIFT 1

◆ ADIOL100_REG_SPIFIFO_A_BURST

#define ADIOL100_REG_SPIFIFO_A_BURST 0x1F04

◆ ADIOL100_REG_SPIFIFO_B_BURST

#define ADIOL100_REG_SPIFIFO_B_BURST 0x1F05

◆ ADIOL100_REG_STATUS_A

#define ADIOL100_REG_STATUS_A 0x0003

◆ ADIOL100_REG_STATUS_B

#define ADIOL100_REG_STATUS_B 0x0013

◆ ADIOL100_REG_TEMP

#define ADIOL100_REG_TEMP 0x1F33

◆ ADIOL100_REG_TEMPMAX

#define ADIOL100_REG_TEMPMAX 0x1F35

◆ ADIOL100_REG_TEMPMIN

#define ADIOL100_REG_TEMPMIN 0x1F34

◆ ADIOL100_REG_TRIGASSIGN_A

#define ADIOL100_REG_TRIGASSIGN_A 0x0008

◆ ADIOL100_REG_TRIGASSIGN_B

#define ADIOL100_REG_TRIGASSIGN_B 0x0018

◆ ADIOL100_REG_TRIGGER

#define ADIOL100_REG_TRIGGER 0x0010

◆ ADIOL100_REG_TXRXDATA_A

#define ADIOL100_REG_TXRXDATA_A 0x0004

◆ ADIOL100_REG_TXRXDATA_B

#define ADIOL100_REG_TXRXDATA_B 0x0014

◆ ADIOL100_REG_V24VOLT

#define ADIOL100_REG_V24VOLT 0x1F30

◆ ADIOL100_REG_V24VOLTMAX

#define ADIOL100_REG_V24VOLTMAX 0x1F32

◆ ADIOL100_REG_V24VOLTMIN

#define ADIOL100_REG_V24VOLTMIN 0x1F31

◆ ADIOL100_REG_WATCHDOG

#define ADIOL100_REG_WATCHDOG 0x000F

◆ ADIOL100_RESCQSTATA

#define ADIOL100_RESCQSTATA NO_OS_BIT(0)

◆ ADIOL100_RESCQSTATB

#define ADIOL100_RESCQSTATB NO_OS_BIT(1)

◆ ADIOL100_RESLPSTATA

#define ADIOL100_RESLPSTATA NO_OS_BIT(2)

◆ ADIOL100_RESLPSTATB

#define ADIOL100_RESLPSTATB NO_OS_BIT(3)

◆ ADIOL100_RESV24STAT

#define ADIOL100_RESV24STAT NO_OS_BIT(4)

◆ ADIOL100_RSIZEERR

#define ADIOL100_RSIZEERR NO_OS_BIT(10)

◆ ADIOL100_RX_HDR_LEN

#define ADIOL100_RX_HDR_LEN 2

◆ ADIOL100_RX_MAX_LEN

#define ADIOL100_RX_MAX_LEN (ADIOL100_RX_HDR_LEN + ADIOL100_RX_MSG_MAX_LEN)

◆ ADIOL100_RX_MSG_MAX_LEN

#define ADIOL100_RX_MSG_MAX_LEN 65

◆ ADIOL100_RXDARDY

#define ADIOL100_RXDARDY NO_OS_BIT(9)

◆ ADIOL100_RXDARDYINT

#define ADIOL100_RXDARDYINT NO_OS_BIT(9)

◆ ADIOL100_RXERRINT

#define ADIOL100_RXERRINT NO_OS_BIT(12)

◆ ADIOL100_RXFIFOLVL_MSK

#define ADIOL100_RXFIFOLVL_MSK NO_OS_GENMASK(7, 0)

◆ ADIOL100_RXFIFORSTN

#define ADIOL100_RXFIFORSTN NO_OS_BIT(12)

◆ ADIOL100_RXVTHRH_MSK

#define ADIOL100_RXVTHRH_MSK NO_OS_GENMASK(11, 10)

◆ ADIOL100_RXVTHRL_MSK

#define ADIOL100_RXVTHRL_MSK NO_OS_GENMASK(9, 8)

◆ ADIOL100_SAFEPULSDET

#define ADIOL100_SAFEPULSDET NO_OS_BIT(14)

◆ ADIOL100_SAFEPULSRINT

#define ADIOL100_SAFEPULSRINT NO_OS_BIT(14)

◆ ADIOL100_SINKSEL_MSK

#define ADIOL100_SINKSEL_MSK NO_OS_GENMASK(13, 12)

◆ ADIOL100_SINKSELDI_MSK

#define ADIOL100_SINKSELDI_MSK NO_OS_GENMASK(13, 12)

◆ ADIOL100_SOURCESINK

#define ADIOL100_SOURCESINK NO_OS_BIT(14)

◆ ADIOL100_SOURCESINKDI

#define ADIOL100_SOURCESINKDI NO_OS_BIT(14)

◆ ADIOL100_SPI_CMD

#define ADIOL100_SPI_CMD	(	addr,
		reg,
		rw )

Value:

(((addr) << ADIOL100_ADDR_SHIFT) | ((reg) << ADIOL100_REG_SHIFT) | (rw))

ADIOL100_REG_SHIFT

#define ADIOL100_REG_SHIFT

Definition adiol100.h:401

ADIOL100_ADDR_SHIFT

#define ADIOL100_ADDR_SHIFT

Definition adiol100.h:400

◆ ADIOL100_SPI_DIRECT_LEN

#define ADIOL100_SPI_DIRECT_LEN 3

◆ ADIOL100_SPI_PAGED_LEN

#define ADIOL100_SPI_PAGED_LEN 4

◆ ADIOL100_SPICRCEN

#define ADIOL100_SPICRCEN NO_OS_BIT(7)

◆ ADIOL100_SPICRCERRINT

#define ADIOL100_SPICRCERRINT NO_OS_BIT(13)

◆ ADIOL100_SPICRCERRINTEN

#define ADIOL100_SPICRCERRINTEN NO_OS_BIT(13)

◆ ADIOL100_SPICRCERRSTST

#define ADIOL100_SPICRCERRSTST NO_OS_BIT(5)

◆ ADIOL100_TCHKSMERR

#define ADIOL100_TCHKSMERR NO_OS_BIT(13)

◆ ADIOL100_TCYCLBS_MSK

#define ADIOL100_TCYCLBS_MSK NO_OS_GENMASK(7, 6)

◆ ADIOL100_TCYCLM_MSK

#define ADIOL100_TCYCLM_MSK NO_OS_GENMASK(5, 0)

◆ ADIOL100_TEMPRESSTAT

#define ADIOL100_TEMPRESSTAT NO_OS_BIT(5)

◆ ADIOL100_TERRSEND

#define ADIOL100_TERRSEND NO_OS_BIT(14)

◆ ADIOL100_THSHDNINT

#define ADIOL100_THSHDNINT NO_OS_BIT(11)

◆ ADIOL100_THSHDNINTEN

#define ADIOL100_THSHDNINTEN NO_OS_BIT(11)

◆ ADIOL100_THSHDNST

#define ADIOL100_THSHDNST NO_OS_BIT(3)

◆ ADIOL100_THWARNINT

#define ADIOL100_THWARNINT NO_OS_BIT(10)

◆ ADIOL100_THWARNINTEN

#define ADIOL100_THWARNINTEN NO_OS_BIT(10)

◆ ADIOL100_THWARNST

#define ADIOL100_THWARNST NO_OS_BIT(2)

◆ ADIOL100_TRANSMERR

#define ADIOL100_TRANSMERR NO_OS_BIT(15)

◆ ADIOL100_TRIGA_MSK

#define ADIOL100_TRIGA_MSK NO_OS_GENMASK(7, 4)

◆ ADIOL100_TRIGEN

#define ADIOL100_TRIGEN NO_OS_BIT(0)

◆ ADIOL100_TRIGGER_MSK

#define ADIOL100_TRIGGER_MSK NO_OS_GENMASK(3, 0)

◆ ADIOL100_TSIZEERR

#define ADIOL100_TSIZEERR NO_OS_BIT(12)

◆ ADIOL100_TSIZEERRINH

#define ADIOL100_TSIZEERRINH NO_OS_BIT(14)

◆ ADIOL100_TX_HDR_LEN

#define ADIOL100_TX_HDR_LEN 3

◆ ADIOL100_TX_MAX_LEN

#define ADIOL100_TX_MAX_LEN (ADIOL100_TX_HDR_LEN + ADIOL100_TX_MSG_MAX_LEN)

◆ ADIOL100_TX_MSG_MAX_LEN

#define ADIOL100_TX_MSG_MAX_LEN 66

◆ ADIOL100_TXEN

#define ADIOL100_TXEN NO_OS_BIT(1)

◆ ADIOL100_TXERRINT

#define ADIOL100_TXERRINT NO_OS_BIT(13)

◆ ADIOL100_TXFIFORSTN

#define ADIOL100_TXFIFORSTN NO_OS_BIT(13)

◆ ADIOL100_TXKEEPMSG

#define ADIOL100_TXKEEPMSG NO_OS_BIT(3)

◆ ADIOL100_UARTBAUD_MSK

#define ADIOL100_UARTBAUD_MSK NO_OS_GENMASK(11, 9)

◆ ADIOL100_UARTEN

#define ADIOL100_UARTEN NO_OS_BIT(8)

◆ ADIOL100_UARTPAREN

#define ADIOL100_UARTPAREN NO_OS_BIT(15)

◆ ADIOL100_V24ERRINT

#define ADIOL100_V24ERRINT NO_OS_BIT(9)

◆ ADIOL100_V24ERRINTEN

#define ADIOL100_V24ERRINTEN NO_OS_BIT(9)

◆ ADIOL100_V24ERRST

#define ADIOL100_V24ERRST NO_OS_BIT(1)

◆ ADIOL100_V24WARNINT

#define ADIOL100_V24WARNINT NO_OS_BIT(8)

◆ ADIOL100_V24WARNINTEN

#define ADIOL100_V24WARNINTEN NO_OS_BIT(8)

◆ ADIOL100_V24WARNST

#define ADIOL100_V24WARNST NO_OS_BIT(0)

◆ ADIOL100_WDGCLEAR

#define ADIOL100_WDGCLEAR NO_OS_BIT(0)

◆ ADIOL100_WDGENABLE

#define ADIOL100_WDGENABLE NO_OS_BIT(1)

◆ ADIOL100_WDGINT

#define ADIOL100_WDGINT NO_OS_BIT(14)

◆ ADIOL100_WDGINTEN

#define ADIOL100_WDGINTEN NO_OS_BIT(14)

◆ ADIOL100_WDGLOCK

#define ADIOL100_WDGLOCK NO_OS_BIT(3)

◆ ADIOL100_WDGMODE

#define ADIOL100_WDGMODE NO_OS_BIT(2)

◆ ADIOL100_WDGST

#define ADIOL100_WDGST NO_OS_BIT(6)

◆ ADIOL100_WDGTIME_MSK

#define ADIOL100_WDGTIME_MSK NO_OS_GENMASK(9, 4)

◆ ADIOL100_WDGTIMEBASE_MSK

#define ADIOL100_WDGTIMEBASE_MSK NO_OS_GENMASK(11, 10)

◆ ADIOL100_WRITE

#define ADIOL100_WRITE 0

◆ ADIOL100_WUPULS

#define ADIOL100_WUPULS NO_OS_BIT(4)

◆ ADIOL101_DEVICE_ID

#define ADIOL101_DEVICE_ID 0x0101

Enumeration Type Documentation

◆ adiol100_adc_chan

enum adiol100_adc_chan

Enumerator
ADIOL100_ADC_CQ_VOLT
ADIOL100_ADC_CQ_VOLT_MIN
ADIOL100_ADC_CQ_VOLT_MAX
ADIOL100_ADC_CQ_CUR
ADIOL100_ADC_CQ_CUR_MIN
ADIOL100_ADC_CQ_CUR_MAX
ADIOL100_ADC_LP_VOLT
ADIOL100_ADC_LP_VOLT_MIN
ADIOL100_ADC_LP_VOLT_MAX
ADIOL100_ADC_LP_CUR
ADIOL100_ADC_LP_CUR_MIN
ADIOL100_ADC_LP_CUR_MAX

◆ adiol100_adc_global

enum adiol100_adc_global

Enumerator
ADIOL100_ADC_V24_VOLT
ADIOL100_ADC_V24_VOLT_MIN
ADIOL100_ADC_V24_VOLT_MAX
ADIOL100_ADC_TEMP
ADIOL100_ADC_TEMP_MIN
ADIOL100_ADC_TEMP_MAX

◆ adiol100_auto_cycler_dis

enum adiol100_auto_cycler_dis

Enumerator
ADIOL100_AUTOCYCLER_KEEP
ADIOL100_AUTOCYCLER_DIS

◆ adiol100_autoretry

enum adiol100_autoretry

Enumerator
ADIOL100_AUTORETRY_DIS
ADIOL100_AUTORETRY_EN

◆ adiol100_autoretry_timeout

enum adiol100_autoretry_timeout

Enumerator
ADIOL100_ARTTMO_5MS
ADIOL100_ARTTMO_10MS
ADIOL100_ARTTMO_50MS
ADIOL100_ARTTMO_100MS

◆ adiol100_bdelay

enum adiol100_bdelay

Enumerator
ADIOL100_BDELAY_0TBIT
ADIOL100_BDELAY_1TBIT
ADIOL100_BDELAY_2TBIT
ADIOL100_BDELAY_3TBIT

◆ adiol100_blanking_time

enum adiol100_blanking_time

Enumerator
ADIOL100_CLBL_150US
ADIOL100_CLBL_500US
ADIOL100_CLBL_1MS
ADIOL100_CLBL_5MS

◆ adiol100_channel

enum adiol100_channel

Enumerator
ADIOL100_CH_A
ADIOL100_CH_B

◆ adiol100_ckt_err_inh

enum adiol100_ckt_err_inh

Enumerator
ADIOL100_CKTERR_SEND
ADIOL100_CKTERR_DISCARD

◆ adiol100_clock_src

enum adiol100_clock_src

Enumerator
ADIOL100_CLK_INTERNAL
ADIOL100_CLK_CRYSTAL
ADIOL100_CLK_EXTERNAL

◆ adiol100_cq_current_limit

enum adiol100_cq_current_limit

Enumerator
ADIOL100_CQCL_10MA
ADIOL100_CQCL_15MA
ADIOL100_CQCL_20MA
ADIOL100_CQCL_50MA
ADIOL100_CQCL_100MA
ADIOL100_CQCL_200MA
ADIOL100_CQCL_300MA
ADIOL100_CQCL_500MA

◆ adiol100_cq_drv

enum adiol100_cq_drv

Enumerator
ADIOL100_CQ_DRV_DIS
ADIOL100_CQ_DRV_EN

◆ adiol100_cq_ext

enum adiol100_cq_ext

Enumerator
ADIOL100_CQEXT_DIS
ADIOL100_CQEXT_EN

◆ adiol100_cq_mode

enum adiol100_cq_mode

Enumerator
ADIOL100_CQ_NPN
ADIOL100_CQ_PUSHPULL

◆ adiol100_cq_npn

enum adiol100_cq_npn

Enumerator
ADIOL100_CQ_PNP
ADIOL100_CQ_NPN_EN

◆ adiol100_cq_slew_rate

enum adiol100_cq_slew_rate

Enumerator
ADIOL100_CQSLEW_250NS
ADIOL100_CQSLEW_500NS
ADIOL100_CQSLEW_1250NS
ADIOL100_CQSLEW_5000NS

◆ adiol100_cq_txen

enum adiol100_cq_txen

Enumerator
ADIOL100_TXEN_DIS
ADIOL100_TXEN_EN

◆ adiol100_framer

enum adiol100_framer

Enumerator
ADIOL100_FRAMER_DIS
ADIOL100_FRAMER_EN

◆ adiol100_glitch_filter

enum adiol100_glitch_filter

Enumerator
ADIOL100_GLITCH_DIS
ADIOL100_GLITCH_1
ADIOL100_GLITCH_2
ADIOL100_GLITCH_3

◆ adiol100_iec3th

enum adiol100_iec3th

Enumerator
ADIOL100_IEC3TH_DIS
ADIOL100_IEC3TH_EN

◆ adiol100_ins_chks

enum adiol100_ins_chks

Enumerator
ADIOL100_CHKS_DIS
ADIOL100_CHKS_EN

◆ adiol100_inv_cq

enum adiol100_inv_cq

Enumerator
ADIOL100_INVCQ_DIS
ADIOL100_INVCQ_EN

◆ adiol100_inv_di

enum adiol100_inv_di

Enumerator
ADIOL100_INVDI_DIS
ADIOL100_INVDI_EN

◆ adiol100_keep_msg

enum adiol100_keep_msg

Enumerator
ADIOL100_DISCARD_MSG
ADIOL100_KEEP_MSG

◆ adiol100_led

enum adiol100_led

Enumerator
ADIOL100_LED1
ADIOL100_LED2
ADIOL100_LED3
ADIOL100_LED4

◆ adiol100_led_brightness

enum adiol100_led_brightness

Enumerator
ADIOL100_LED_BGT_6
ADIOL100_LED_BGT_12
ADIOL100_LED_BGT_18
ADIOL100_LED_BGT_25
ADIOL100_LED_BGT_31
ADIOL100_LED_BGT_37
ADIOL100_LED_BGT_43
ADIOL100_LED_BGT_50
ADIOL100_LED_BGT_56
ADIOL100_LED_BGT_62
ADIOL100_LED_BGT_68
ADIOL100_LED_BGT_75
ADIOL100_LED_BGT_81
ADIOL100_LED_BGT_87
ADIOL100_LED_BGT_93
ADIOL100_LED_BGT_100

◆ adiol100_led_mode

enum adiol100_led_mode

Enumerator
ADIOL100_LED_BLINK
ADIOL100_LED_BLINK_EDGE
ADIOL100_LED_ON_HIGH
ADIOL100_LED_ON_LOW
ADIOL100_LED_BLINK_FAST

◆ adiol100_led_seq

enum adiol100_led_seq

Enumerator
ADIOL100_LED_SEQ_OFF
ADIOL100_LED_SEQ_ON
ADIOL100_LED_SEQ_BLINK_SLOW
ADIOL100_LED_SEQ_BLINK_FAST
ADIOL100_LED_SEQ_PULSE

◆ adiol100_lp_en

enum adiol100_lp_en

Enumerator
ADIOL100_LP_DIS
ADIOL100_LP_EN

◆ adiol100_lp_rev

enum adiol100_lp_rev

Enumerator
ADIOL100_LP_REV_DIS
ADIOL100_LP_REV_EN

◆ adiol100_msg_repeat

enum adiol100_msg_repeat

Enumerator
ADIOL100_MSGREP_DIS
ADIOL100_MSGREP_EN

◆ adiol100_safe_pulse_det

enum adiol100_safe_pulse_det

Enumerator
ADIOL100_SAFEPULS_DIS
ADIOL100_SAFEPULS_EN

◆ adiol100_sink_sel

enum adiol100_sink_sel

Enumerator
ADIOL100_SINKSEL_OFF
ADIOL100_SINKSEL_5MA
ADIOL100_SINKSEL_2MA
ADIOL100_SINKSEL_150UA

◆ adiol100_source_sink

enum adiol100_source_sink

Enumerator
ADIOL100_CQ_SINK
ADIOL100_CQ_SOURCE

◆ adiol100_trig_en

enum adiol100_trig_en

Enumerator
ADIOL100_TRIG_DIS
ADIOL100_TRIG_EN

◆ adiol100_trig_val

enum adiol100_trig_val

Enumerator
ADIOL100_TRIG_GLOBAL
ADIOL100_TRIG_1
ADIOL100_TRIG_2
ADIOL100_TRIG_3
ADIOL100_TRIG_4
ADIOL100_TRIG_5
ADIOL100_TRIG_6
ADIOL100_TRIG_7
ADIOL100_TRIG_8
ADIOL100_TRIG_9
ADIOL100_TRIG_10
ADIOL100_TRIG_11
ADIOL100_TRIG_12
ADIOL100_TRIG_13
ADIOL100_TRIG_14
ADIOL100_TRIG_15

◆ adiol100_tsize_err_inh

enum adiol100_tsize_err_inh

Enumerator
ADIOL100_TSIZEERR_SEND
ADIOL100_TSIZEERR_DISCARD

◆ adiol100_uart_baud

enum adiol100_uart_baud

Enumerator
ADIOL100_UART_230400
ADIOL100_UART_115200
ADIOL100_UART_38400
ADIOL100_UART_19200
ADIOL100_UART_4800
ADIOL100_UART_2400

◆ adiol100_uart_en

enum adiol100_uart_en

Enumerator
ADIOL100_UART_DIS
ADIOL100_UART_EN

◆ adiol100_uart_par

enum adiol100_uart_par

Enumerator
ADIOL100_UARTPAR_DIS
ADIOL100_UARTPAR_EN

◆ adiol100_voltage_threshold

enum adiol100_voltage_threshold

Enumerator
ADIOL100_VTHR_2V
ADIOL100_VTHR_4V
ADIOL100_VTHR_6V
ADIOL100_VTHR_8V

◆ adiol100_wdg_en

enum adiol100_wdg_en

Enumerator
ADIOL100_WDG_DIS
ADIOL100_WDG_EN

◆ adiol100_wdg_lock

enum adiol100_wdg_lock

Enumerator
ADIOL100_WDG_UNLOCKED
ADIOL100_WDG_LOCKED

◆ adiol100_wdg_mode

enum adiol100_wdg_mode

Enumerator
ADIOL100_WDG_MODE_SPI
ADIOL100_WDG_MODE_CLEAR

◆ adiol100_wdg_timebase

enum adiol100_wdg_timebase

Enumerator
ADIOL100_WDG_100US
ADIOL100_WDG_500US
ADIOL100_WDG_2MS

Function Documentation

◆ adiol100_clear_channel_irq()

void adiol100_clear_channel_irq	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint16_t	mask )

Clear specific bits from the accumulated channel interrupt flags.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
mask	- Bitmask of flags to clear.

◆ adiol100_clear_estcom_fails()

int adiol100_clear_estcom_fails	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch )

Clear the establish-communication fail counter in StatusA/B.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_clear_global_irq()

void adiol100_clear_global_irq	(	struct adiol100_dev *	dev,
		uint16_t	mask )

Clear specific bits from the accumulated global interrupt flags.

Parameters

dev	- The device structure.
mask	- Bitmask of flags to clear.

◆ adiol100_clear_watchdog()

int adiol100_clear_watchdog ( struct adiol100_dev * dev )

Clear the watchdog timer (write-1-to-clear).

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_config_cq()

int adiol100_config_cq	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		enum adiol100_cq_mode	mode,
		enum adiol100_cq_drv	drv_en,
		enum adiol100_sink_sel	sink_sel,
		enum adiol100_cq_slew_rate	slew_rate,
		enum adiol100_iec3th	iec3th,
		enum adiol100_source_sink	source_sink,
		enum adiol100_glitch_filter	glitch_filter,
		enum adiol100_cq_npn	npn,
		enum adiol100_cq_ext	cq_ext,
		enum adiol100_inv_cq	inv_cq,
		enum adiol100_cq_txen	txen )

Configure the CQ driver.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
mode	- Push-pull or open-drain driver mode.
drv_en	- Enable or disable the CQ driver.
sink_sel	- Input sink/source current level.
slew_rate	- CQ output slew rate.
iec3th	- IEC 61131-2 type 2/3 threshold (0 for IO-Link).
source_sink	- Current source or sink on CQ.
glitch_filter	- CQ receiver glitch filter.
npn	- NPN/PNP mode (ignored if push-pull).
cq_ext	- Use external high-side FET.
inv_cq	- Invert CQ output polarity.
txen	- CQ transmitter enable (SIO only, 0 with framer).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_config_cq_protection()

int adiol100_config_cq_protection	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		enum adiol100_cq_current_limit	current_limit,
		enum adiol100_blanking_time	blanking,
		enum adiol100_autoretry_timeout	retry_tmo,
		enum adiol100_autoretry	retry_en,
		enum adiol100_voltage_threshold	tx_vthr_h,
		enum adiol100_voltage_threshold	tx_vthr_l,
		enum adiol100_voltage_threshold	rx_vthr_h,
		enum adiol100_voltage_threshold	rx_vthr_l )

Configure CQ protection: current limit, blanking, thresholds, autoretry.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
current_limit	- CQ driver current limit.
blanking	- Current limit blanking time.
retry_tmo	- Autoretry timeout after current limit event.
retry_en	- Enable or disable autoretry.
tx_vthr_h	- CQ transmit high voltage threshold.
tx_vthr_l	- CQ transmit low voltage threshold.
rx_vthr_h	- CQ receive high voltage threshold.
rx_vthr_l	- CQ receive low voltage threshold.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_config_cq_protection_ext()

int adiol100_config_cq_protection_ext	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint8_t	cl_nom,
		uint8_t	pwr_max,
		uint8_t	curr_max,
		uint8_t	curr_min,
		uint8_t	ol_timeout,
		uint8_t	cl_timeout,
		uint8_t	slope,
		uint8_t	slope_bl,
		uint8_t	ar_time,
		uint8_t	ar_count )

Configure CQ external high-side FET protection.

Configure CQ external high-side FET protection: current, power, timeouts, slope, retry.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
cl_nom	- Nominal current limit (CQExtCfg, 8-bit, 20mA/step with 10mOhm Rsense).
pwr_max	- Maximum power dissipation (8-bit, 1W/step).
curr_max	- Maximum current (8-bit, 20mA/step).
curr_min	- Minimum current at turn-on (8-bit, 20mA/step).
ol_timeout	- Overload timeout (8-bit, 2ms/step).
cl_timeout	- Current limit timeout (8-bit, 2ms/step).
slope	- Minimum voltage slope (8-bit, 19.5V/s per step).
slope_bl	- Slope blanking time (8-bit, 2ms/step).
ar_time	- Autoretry time (6-bit, 25ms/step).
ar_count	- Autoretry count (4-bit, 0 = unlimited).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_config_di()

int adiol100_config_di	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		enum adiol100_iec3th	iec3th,
		enum adiol100_source_sink	source_sink,
		enum adiol100_sink_sel	sink_sel,
		enum adiol100_glitch_filter	glitch_filter,
		enum adiol100_inv_di	inv_di )

Configure the digital input (DICfgA/B).

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
iec3th	- IEC 61131-2 type 2/3 threshold select.
source_sink	- Current sink or source select.
sink_sel	- Sink/source current level.
glitch_filter	- Glitch filter setting.
inv_di	- Invert DI logic output.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_config_framer()

int adiol100_config_framer	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		enum adiol100_ins_chks	ins_chks,
		enum adiol100_framer	framer_en,
		enum adiol100_ckt_err_inh	ckt_err_inh,
		enum adiol100_msg_repeat	msg_repeat,
		enum adiol100_bdelay	bdelay,
		uint8_t	ddelay,
		enum adiol100_tsize_err_inh	tsize_err_inh,
		enum adiol100_uart_par	uart_par,
		enum adiol100_uart_baud	uart_baud,
		enum adiol100_uart_en	uart_en,
		enum adiol100_safe_pulse_det	safe_pulse_det )

Configure the IO-Link framer (FramCtrl1 + FramCtrl2).

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
ins_chks	- Enable or disable checksum insertion.
framer_en	- Enable or disable the framer.
ckt_err_inh	- Suppress or send message on CKT error.
msg_repeat	- Auto-repeat last message if FIFO not reloaded.
bdelay	- Additional byte delay (0–3 TBIT).
ddelay	- Device answer delay. Wait time = 4 + ddelay * 2 TBIT. Set 3 for IO-Link standard (10 TBIT). Range 0–255.
tsize_err_inh	- Inhibit TX size error checking.
uart_par	- UART parity bit enable.
uart_baud	- UART baud rate (ignored in IO-Link mode).
uart_en	- UART mode enable (0 for IO-Link mode).
safe_pulse_det	- Enable safety pulse detection.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_config_lp()

int adiol100_config_lp	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		enum adiol100_lp_en	enable,
		enum adiol100_lp_rev	rev_en )

Configure the L+ sensor supply: enable and reverse polarity protection.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
enable	- Enable or disable L+ supply.
rev_en	- Enable or disable reverse polarity protection.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_config_lp_protection()

int adiol100_config_lp_protection	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint8_t	cl_nom,
		uint8_t	pwr_max,
		uint8_t	curr_max,
		uint8_t	curr_min,
		uint8_t	ol_timeout,
		uint8_t	cl_timeout,
		uint8_t	slope,
		uint8_t	slope_bl,
		uint8_t	ar_time,
		uint8_t	ar_count )

Configure L+ FET protection: current, power, timeouts, slope, retry.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
cl_nom	- Nominal current limit (LPCfg, 8-bit, 20mA/step with 10mOhm Rsense).
pwr_max	- Maximum power dissipation (8-bit, 1W/step).
curr_max	- Maximum current (8-bit, 20mA/step).
curr_min	- Minimum current at turn-on (8-bit, 20mA/step).
ol_timeout	- Overload timeout (8-bit, 2ms/step).
cl_timeout	- Current limit timeout (8-bit, 2ms/step).
slope	- Minimum voltage slope (8-bit, 19.5V/s per step).
slope_bl	- Slope blanking time (8-bit, 2ms/step).
ar_time	- Autoretry time (6-bit, 25ms/step).
ar_count	- Autoretry count (4-bit, 0 = unlimited).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_config_trigger()

int adiol100_config_trigger	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		enum adiol100_auto_cycler_dis	auto_cycler_dis,
		enum adiol100_trig_val	trig_val,
		enum adiol100_trig_en	trig_en )

Configure trigger assignment for a channel.

Configure trigger assignment (TrigAssignA/B).

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
auto_cycler_dis	- Auto-disable cycler on COMLOST.
trig_val	- Trigger value (0–15). 0 is global trigger.
trig_en	- Enable SPI-based trigger synchronization.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_config_watchdog()

int adiol100_config_watchdog	(	struct adiol100_dev *	dev,
		enum adiol100_wdg_timebase	timebase,
		uint8_t	time,
		enum adiol100_wdg_mode	mode,
		enum adiol100_wdg_en	enable,
		enum adiol100_wdg_lock	lock )

Configure the watchdog timer.

Configure the watchdog timer: time base, period, mode, enable, lock.

Parameters

dev	- The device structure.
timebase	- Timer tick period (100us, 500us, or 2ms).
time	- Timeout multiplier (6-bit, 0–63).
mode	- SPI activity reset or explicit clear.
enable	- Enable or disable the watchdog.
lock	- Lock the watchdog configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_disable_cycle_timer()

int adiol100_disable_cycle_timer	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch )

Disable the cycle timer.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_enable_channel_irq()

int adiol100_enable_channel_irq	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint16_t	mask )

Set the channel interrupt enable mask.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
mask	- Bitmask of interrupts to enable.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_enable_cycle_timer()

int adiol100_enable_cycle_timer	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch )

Enable the cycle timer for autonomous cyclic operation.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_enable_global_irq()

int adiol100_enable_global_irq	(	struct adiol100_dev *	dev,
		uint16_t	mask )

Set the global interrupt enable mask.

Parameters

dev	- The device structure.
mask	- Bitmask of interrupts to enable.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_estcom()

int adiol100_estcom	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch )

Run EstablishCommunication: reset FIFOs, set EstCom, poll for result.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).

Returns: 0 on success, -ENODEV if no device responded, -ETIMEDOUT on timeout.

◆ adiol100_fire_trigger()

int adiol100_fire_trigger	(	struct adiol100_dev *	dev,
		enum adiol100_trig_val	trig_val )

Fire an SPI trigger to start transmission on matching channels.

Fire an SPI trigger (Trigger register).

Parameters

dev	- The device structure.
trig_val	- Trigger value (0–15).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_get_channel_irq()

int adiol100_get_channel_irq	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint16_t *	flags )

Read and accumulate channel interrupt flags.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
flags	- Pointer to store the accumulated interrupt flags.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_get_comrt()

int adiol100_get_comrt	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint8_t *	comrt )

Get the communication rate determined by EstCom (COM1/2/3).

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
comrt	- Pointer to store the COM rate value (1, 2, or 3).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_get_cycle_tmr()

int adiol100_get_cycle_tmr	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint16_t *	value )

Get the current cycle timer register value.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
value	- Pointer to store the cycle timer value.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_get_fifo_status()

int adiol100_get_fifo_status	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint16_t *	flags )

Read the RxFIFO status register (level + error flags).

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
flags	- Pointer to store the status flags.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_get_global_irq()

int adiol100_get_global_irq	(	struct adiol100_dev *	dev,
		uint16_t *	flags )

Read and accumulate global interrupt flags.

Parameters

dev	- The device structure.
flags	- Pointer to store the accumulated interrupt flags.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_get_status()

int adiol100_get_status	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint16_t *	flags )

Read the channel status register.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
flags	- Pointer to store the status flags.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_global_reset()

int adiol100_global_reset ( struct adiol100_dev * dev )

Disable global interrupts, clear trigger, read-clear all IRQ registers, and turn off all LEDs.

Disable global interrupts, clear trigger, read-clear all IRQ registers, and turn off LEDs.

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_init()

int adiol100_init	(	struct adiol100_dev **	dev,
		struct adiol100_init_param *	ip )

Initialize the ADIOL100 device.

Parameters

dev	- Pointer to the device descriptor (allocated internally).
ip	- Initialization parameters (SPI, address, clock).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_led_sync()

int adiol100_led_sync ( struct adiol100_dev * dev )

Synchronize LED drivers across multiple devices.

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_load_and_send_msg()

int adiol100_load_and_send_msg	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint8_t *	data,
		uint8_t	txbytes,
		uint8_t	rxbytes,
		enum adiol100_keep_msg	keep,
		uint16_t	framctrl1 )

Load IO-Link payload into TxFIFO and trigger CQSend in one SPI burst.

Writes TxFIFO data followed by FramCtrl1 (with CQSend asserted) in a single SPI transaction using register auto-increment. Caller must set burst length via adiol100_set_burst_len() and provide the current FramCtrl1 register value before calling.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
data	- IO-Link payload bytes (MC + CKT + OD).
txbytes	- Number of payload bytes to transmit.
rxbytes	- Number of response bytes expected from the device (including CKS).
keep	- Retain message in TxFIFO for cyclic re-sending.
framctrl1	- Current FramCtrl1 register value (framer config bits).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_load_msg()

int adiol100_load_msg	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		const uint8_t *	data,
		uint8_t	txbytes,
		uint8_t	rxbytes,
		enum adiol100_keep_msg	keep )

Load IO-Link payload into TxFIFO without triggering CQSend.

Caller must set burst length via adiol100_set_burst_len() before calling.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
data	- IO-Link payload bytes (MC + CKT + OD).
txbytes	- Number of payload bytes to transmit.
rxbytes	- Number of response bytes expected from the device (including CKS).
keep	- Retain message in TxFIFO for cyclic re-sending.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_read()

int adiol100_read	(	struct adiol100_dev *	dev,
		uint16_t	reg,
		uint16_t *	value )

Read a 16-bit register. Handles paged access automatically.

Parameters

dev	- The device structure.
reg	- Register address (0x1Fxx for paged registers).
value	- Pointer to store the read value.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_read_adc_chan()

int adiol100_read_adc_chan	(	struct adiol100_dev *	dev,
		enum adiol100_adc_chan	source,
		enum adiol100_channel	ch,
		uint16_t *	value )

Read a raw 13-bit per-channel ADC measurement (CQ/LP voltage or current).

Read a raw 13-bit per-channel ADC value (CQ/LP voltage or current).

Parameters

dev	- The device structure.
source	- Per-channel ADC source (CQ_VOLT/CUR or LP_VOLT/CUR with MIN/MAX).
ch	- Channel selection (A or B).
value	- Raw 13-bit value (2's complement).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_read_adc_global()

int adiol100_read_adc_global	(	struct adiol100_dev *	dev,
		enum adiol100_adc_global	source,
		uint16_t *	value )

Read a raw 13-bit global ADC measurement (V24 voltage or temperature).

Read a raw 13-bit global ADC value (V24 voltage or temperature).

Parameters

dev	- The device structure.
source	- Global ADC source (V24_VOLT/MIN/MAX or TEMP/MIN/MAX).
value	- Raw 13-bit value (2's complement).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_read_channel_burst()

int adiol100_read_channel_burst	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint16_t *	rxstat,
		uint16_t *	irq,
		uint16_t *	status,
		uint8_t *	data,
		uint8_t	data_len )

Burst-read RxFIFOStat, Interrupt, Status, and RxFIFO in one SPI cycle.

Uses register auto-increment from RxFIFOStat (0x01/0x11) through Status (0x03/0x13), then into the RxFIFO (0x04/0x14) for the configured burst read length. Reading the Interrupt register clears its flags. Caller must set burst length via adiol100_set_burst_len() before calling.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
rxstat	- Pointer to store RxFIFOStat (level + error flags).
irq	- Pointer to store Interrupt flags (read-to-clear).
status	- Pointer to store Status register.
data	- Buffer to store RxFIFO response bytes (after MsgID/RxBytesAct header).
data_len	- Number of response bytes to read from the FIFO.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_read_devid()

int adiol100_read_devid	(	struct adiol100_dev *	dev,
		uint16_t *	dev_id )

Read the chip DeviceID register.

Parameters

dev	- The device structure.
dev_id	- Pointer to store the device ID value.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_read_msg()

int adiol100_read_msg	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint8_t *	data,
		uint8_t	data_len )

Read device response from RxFIFO, stripping the MsgID/RxBytesAct header.

Caller must set burst length via adiol100_set_burst_len() before calling.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
data	- Buffer to store response bytes.
data_len	- Number of response bytes to read from the FIFO.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_read_revid()

int adiol100_read_revid	(	struct adiol100_dev *	dev,
		uint16_t *	rev_id )

Read the chip RevisionID register.

Parameters

dev	- The device structure.
rev_id	- Pointer to store the revision ID value.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_remove()

int adiol100_remove ( struct adiol100_dev * dev )

Free resources allocated by adiol100_init().

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_reset_adc_stats()

int adiol100_reset_adc_stats ( struct adiol100_dev * dev )

Reset all ADC min/max statistics (V24, Temp, CQ and LP for both channels).

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_reset_channel()

int adiol100_reset_channel	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch )

Assert CHANRST to reset all channel-specific registers.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_reset_leds()

int adiol100_reset_leds ( struct adiol100_dev * dev )

Turn off all four LEDs by clearing their sequences and resetting modes.

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_reset_rx_fifo()

int adiol100_reset_rx_fifo	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch )

Reset the receive FIFO for a channel.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_reset_tx_fifo()

int adiol100_reset_tx_fifo	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch )

Reset the transmit FIFO for a channel.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_send_msg()

int adiol100_send_msg	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch )

Assert CQSend to trigger transmission of the message in the TxFIFO.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_set_burst_len()

int adiol100_set_burst_len	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint8_t	write_len,
		uint8_t	read_len )

Set the SPI burst length for FIFO access.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
write_len	- Number of bytes in the write burst.
read_len	- Number of bytes in the read burst.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_set_cycle_tmr()

int adiol100_set_cycle_tmr	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch,
		uint8_t	value )

Set the IO-Link cycle timer value.

Set the IO-Link cycle timer value (IO-Link encoded byte).

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).
value	- IO-Link encoded cycle time byte.

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_set_led_brightness()

int adiol100_set_led_brightness	(	struct adiol100_dev *	dev,
		enum adiol100_led	led,
		enum adiol100_led_brightness	red_bgt,
		enum adiol100_led_brightness	green_bgt )

Set the brightness for one LED.

Parameters

dev	- The device structure.
led	- LED index (1–4).
red_bgt	- Red brightness (see enum adiol100_led_brightness).
green_bgt	- Green brightness (see enum adiol100_led_brightness).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_set_led_mode()

int adiol100_set_led_mode	(	struct adiol100_dev *	dev,
		enum adiol100_led	led,
		enum adiol100_led_mode	mode )

Set the operating mode for one LED.

Parameters

dev	- The device structure.
led	- LED index (1–4).
mode	- Operating mode (see enum adiol100_led_mode).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_set_led_sequence()

int adiol100_set_led_sequence	(	struct adiol100_dev *	dev,
		enum adiol100_led	led,
		enum adiol100_led_seq	red_seq,
		enum adiol100_led_seq	green_seq )

Set the blink sequence for one LED.

Set the blink sequence for one LED (16-bit pattern, each bit = 63ms).

Parameters

dev	- The device structure.
led	- LED index (1–4).
red_seq	- Red blink pattern (see enum adiol100_led_seq or custom).
green_seq	- Green blink pattern (see enum adiol100_led_seq or custom).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_setup_clock()

int adiol100_setup_clock	(	struct adiol100_dev *	dev,
		uint8_t	clock_src,
		uint8_t	clk_div )

Configure the clock source, divider, and enable clock output.

Parameters

dev	- The device structure.
clock_src	- Clock source selection (internal, crystal, or external).
clk_div	- Clock divider (ClkDiv[1:0]).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_update()

int adiol100_update	(	struct adiol100_dev *	dev,
		uint16_t	reg,
		uint16_t	mask,
		uint16_t	value )

Read-modify-write a register using a bit mask.

Parameters

dev	- The device structure.
reg	- Register address.
mask	- Bit mask of the field to modify.
value	- New value (pre-shifted to match mask position).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_wakeup_request()

int adiol100_wakeup_request	(	struct adiol100_dev *	dev,
		enum adiol100_channel	ch )

Generate a wake-up pulse (WURQ) on a channel.

Parameters

dev	- The device structure.
ch	- Channel selection (A or B).

Returns: 0 in case of success, negative error code otherwise.

◆ adiol100_write()

int adiol100_write	(	struct adiol100_dev *	dev,
		uint16_t	reg,
		uint16_t	value )

Write a 16-bit register. Handles paged access automatically.

Parameters

dev	- The device structure.
reg	- Register address (0x1Fxx for paged registers).
value	- The value to write.

Returns: 0 in case of success, negative error code otherwise.

Classes

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ ADIOL100_ADC_CHB_OFFSET

◆ ADIOL100_ADC_DATA_MSK

◆ ADIOL100_ADDR_SHIFT

◆ ADIOL100_ARTEN

◆ ADIOL100_ARTTMO_MSK

◆ ADIOL100_AUTOCYCLERDIS

◆ ADIOL100_BDELAY_MSK

◆ ADIOL100_BURST_RDLEN_MSK

◆ ADIOL100_BURST_WRLEN_MSK

◆ ADIOL100_CHANRST

◆ ADIOL100_CHIP_ADDR_MAX

◆ ADIOL100_CKTERRINH

◆ ADIOL100_CLBL_MSK

◆ ADIOL100_CLKDIV_MSK

◆ ADIOL100_CLKOEN

◆ ADIOL100_CLOCKCFG_MSK

◆ ADIOL100_COMLOST

◆ ADIOL100_COMRT_MSK

◆ ADIOL100_CQAR_MSK

◆ ADIOL100_CQARTIM_MSK

◆ ADIOL100_CQCL_L

◆ ADIOL100_CQCL_MSK

◆ ADIOL100_CQCL_S

◆ ADIOL100_CQCLTIMOUT_MSK

◆ ADIOL100_CQCURLIMINT

◆ ADIOL100_CQCURRMAX_MSK

◆ ADIOL100_CQCURRMIN_MSK

◆ ADIOL100_CQDRVERR

◆ ADIOL100_CQDRVERRINT

◆ ADIOL100_CQEXT

◆ ADIOL100_CQEXTCLNOM_MSK

◆ ADIOL100_CQFETPWRMAX_MSK

◆ ADIOL100_CQFETSLOPE_MSK

◆ ADIOL100_CQFETSLOPEBL_MSK

◆ ADIOL100_CQLEVEL

◆ ADIOL100_CQLEVELINT

◆ ADIOL100_CQOL_L

◆ ADIOL100_CQOLTIMOUT_MSK

◆ ADIOL100_CQRXWINT

◆ ADIOL100_CQSEND

◆ ADIOL100_CQSLEW_MSK

◆ ADIOL100_CQSLOERR_L

◆ ADIOL100_CQTHEINT

◆ ADIOL100_CQTO_L

◆ ADIOL100_CQVTHRH_MSK

◆ ADIOL100_CQVTHRL_MSK

◆ ADIOL100_CQVWINT

◆ ADIOL100_CYCLETMREN

◆ ADIOL100_CYCLTMR_MSK

◆ ADIOL100_DDELAY_MSK

◆ ADIOL100_DELAYERRINT

◆ ADIOL100_DEVICE_ID

◆ ADIOL100_DILEVEL

◆ ADIOL100_DILEVELINT

◆ ADIOL100_DRVEN

◆ ADIOL100_ESTCOM

◆ ADIOL100_ESTCOM_TIMEOUT_MS

◆ ADIOL100_ESTCOMFACLR

◆ ADIOL100_ESTCOMFAILINT

◆ ADIOL100_ESTCOMSUCINT

◆ ADIOL100_EXTCLKMISINT

◆ ADIOL100_EXTCLKMISINTEN

◆ ADIOL100_EXTCLKMISST

◆ ADIOL100_EXTCLKOKINT

◆ ADIOL100_EXTCLKOKINTEN

◆ ADIOL100_EXTCLKOKST

◆ ADIOL100_FRAMEERR

◆ ADIOL100_FRAMEREN

◆ ADIOL100_GLITCHFILTER_MSK

◆ ADIOL100_GLITCHFILTERDI_MSK

◆ ADIOL100_IEC3TH

◆ ADIOL100_IEC3THDI

◆ ADIOL100_INSCHKS

◆ ADIOL100_INVCQ