AD719X-ASDZ HDL project

The AD719X-ASDZ HDL project supports the EVAL-AD719XASDZ family, comprised of EVAL-AD7190ASDZ, EVAL-AD7193ASDZ, EVAL-AD7195ASDZ, as well as the EVAL-AD4131-8, EVAL-AD4130-8 and EVAL-AD4129-8.

Each evaluation kit features its own chip, the AD7190, AD7193, AD7195, AD4131-4, AD4131-8, AD4130-4, AD4129-4 and AD4129-8 respectively - 4.8 kHz ultralow noise sigma-delta ADC, each with its own particularities.

The on-chip low noise gain stage means that signals of small amplitude can interface directly to the ADC. The internal clock option provides a compact solution for low BW requirements.

Supported boards

• EVAL-AD7190ASDZ

• EVAL-AD7192ASDZ

• EVAL-AD7193ASDZ

• EVAL-AD7194ASDZ

• EVAL-AD7195ASDZ

• EVAL-AD4131-8

• EVAL-AD4130-8

• EVAL-AD4129-8

Supported devices

• AD7190

• AD7192

• AD7193

• AD7194

• AD7195

• AD4131-4

• AD4131-8

• AD4130-4

• AD4129-4

• AD4129-8

Supported carriers

Evaluation board	Carrier	Connector
EVAL-AD7190ASDZ	Cora Z7S	PMOD JA/Arduino shield
	DE10-Nano	Arduino shield
EVAL-AD7192ASDZ	Cora Z7S	PMOD JA/Arduino shield
	DE10-Nano	Arduino shield
EVAL-AD7193ASDZ	Cora Z7S	PMOD JA/Arduino shield
	DE10-Nano	Arduino shield
EVAL-AD7194ASDZ	Cora Z7S	PMOD JA/Arduino shield
	DE10-Nano	Arduino shield
EVAL-AD7195ASDZ	Cora Z7S	PMOD JA/Arduino shield
	DE10-Nano	Arduino shield
EVAL-AD4131-8	Cora Z7S	PMOD JA/Arduino shield
EVAL-AD4130-8	Cora Z7S	PMOD JA/Arduino shield
EVAL-AD4129-8	Cora Z7S	PMOD JA/Arduino shield

Block design

Block diagram

The data path and clock domains are depicted in the below diagram:

SPI connections

SPI type	SPI manager instance	SPI subordinate	CS
PS	SPI 0	AD719X	0

GPIOs

To know how the Software GPIO numbers are calculated, check out GPIOs - HDL Architecture page.

GPIO signal	Direction	HDL no.	Zynq-7000	DE10-Nano
ad719x_sync_n *	OUT	33	–	1
ad719x_spi_miso *	IN	32	–	0
adc_spi_miso_rdyn	IN	32	86	–
adc_syncn **	INOUT	33	87	–
adc_int **	IN	31	85	–

Legend

• GPIO signal = name of the GPIO in the HDL project

• Direction = from the FPGA point of view

• HDL no. = HDL GPIO EMIO

• Zynq-7000, DE10-Nano are Software GPIOs, to be used in device trees

• * - signals present only in the DE10-Nano project

• ** - signals present only in the Cora Z7S project when built with ARDZ_PMOD_N=1 (eval. board connected through the Arduino header)

• adc_spi_miso_rdyn is present in all Cora Z7S variants

Building the HDL project

The design is built upon ADI’s generic HDL reference design framework. ADI distributes the bit/elf files of these projects as part of the ADI Kuiper Linux. If you want to build the sources, ADI makes them available on the HDL repository. To get the source you must clone the HDL repository.

Cora Z7S

Linux/Cygwin/WSL

The default build configuration (ARDZ_PMOD_N=0) features the eval. boards connected to Cora Z7S through PMOD JA:

~$

cd hdl/projects/ad719x_asdz/coraz7s

~/hdl/projects/ad719x_asdz/coraz7s$

make

The other possible way to connect the supported boards to CoraZ7S, is through the Arduino header, for which the project needs to be built with the parameter ARDZ_PMOD_N=1.

The built project will be located at hdl/projects/ad719x_asdz/coraz7s/ARDZPMODN1.

~$

cd hdl/projects/ad719x_asdz/coraz7s

~/hdl/projects/ad719x_asdz/coraz7s$

make ARDZ_PMOD_N=1

DE10-Nano

Linux/Cygwin/WSL

The only configuration available is through the Arduino header, so this project is not parameterizable:

~$

cd hdl/projects/ad719x_asdz/de10nano

~/hdl/projects/ad719x_asdz/de10nano$

make

A more comprehensive build guide can be found in the Build an HDL project user guide.

Software considerations

The reference design when using the Arduino header, has an extra GPIO, compared to the other one — the SYNCN, which is used for synchronizing multiple devices.

Resources

Hardware related

• Product datasheets:

  • AD7190

  • AD7192

  • AD7193

  • AD7194

  • AD7195

  • AD4131-8

  • AD4131-4

  • AD4130-4

  • AD4129-4

  • AD4129-8

  • EVAL-AD7190ASDZ

  • EVAL-AD7192ASDZ

  • EVAL-AD7193ASDZ

  • EVAL-AD7194ASDZ

  • EVAL-AD7195ASDZ

  • EVAL-AD4131-8

  • EVAL-AD4130-8

  • EVAL-AD4129-8

HDL related

• ad719x_asdz HDL project source code

IP name	Source code link	Documentation link
axi_sysid	library/axi_sysid	AXI System ID
sysid_rom	library/sysid_rom	AXI System ID

Software related

• AD719X Linux driver

• AD7190/CoraZ7S Linux device tree

• AD7192/CoraZ7S Linux device tree

• AD7193/CoraZ7S Linux device tree

• AD7194/CoraZ7S Linux device tree

• AD7195/CoraZ7S Linux device tree

• AD719X no-OS project

• AD719X no-OS driver

• AD7190 - Microcontroller No-OS Driver

• Supported devices

More information

• ADI HDL User guide

Support

Analog Devices, Inc. will provide limited online support for anyone using the reference design with ADI components via the EngineerZone FPGA reference designs forum.

For questions regarding the ADI Linux device drivers, device trees, etc. from our Linux GitHub repository, the team will offer support on the EngineerZone Linux software drivers forum.

For questions concerning the ADI No-OS drivers, from our No-OS GitHub repository, the team will offer support on the EngineerZone microcontroller No-OS drivers forum.

It should be noted, that the older the tools’ versions and release branches are, the lower the chances to receive support from ADI engineers.